Abstract: Systems, methods, and apparatus are provided for automated identification of open space in a wireless communications spectrum, by identifying sources of signal emission in the spectrum by automatically detecting signals, analyzing signals, comparing signal data to historical and reference data, creating corresponding signal profiles, and determining information about the open space based upon the measured and analyzed data in near real-time.

Abstract: Pre-processing modules are configured to compensate for time and pitch scaling and shifting and provide compensated audio frames to a watermark detector. Audio frames are adjusted for time stretching and shrinking and for pitch shifting. Detection metrics are evaluated to identify candidates to a watermark detector. Various schemes are also detailed for tracking modifications made to audio stems mixed into audio tracks, and for accessing a history of modifications for facilitating identification of audio stems and audio tracks comprised of stems. Various approaches address interference from audio overlays added to channels of audio after embedding. One approach applies informed embedding based on phase differences between corresponding components of the channels. A detector extracts the watermark payload effectively from either additive or subtractive combination of the channels because the informed embedding ensures that the watermark survives both types of processing.

Abstract: The present invention relates an Integral analysis method of inter-well tracer tests, which integrates and performs continuous feedback to each of the major stage (design, operation and interpretation) allowing quantitative interpretation of these tests. It is presented as a tool to investigate the behavior of injection fluids for recovery of hydrocarbons, as well as for the dynamic characterization of reservoirs. The main advantage of this invention is that it allows a greater certainty in the tracer response and a marked improvement in the sensitivity and quantitative analysis of the test results, since the curves fit both with mathematical models and numerical models. Another outstanding attraction of this invention is the reduction in the costs of testing such applications.

Abstract: A system and method for rearranging algebraic expressions occurring in program code based on a scheme of ranking operands. The system scans program code to identify an algebraic expression specified by the program code. The expression includes binary operations, scalar operands and at least one array operand. The system operates on the algebraic expression to obtain a final expression by: computing a rank for each of the operands; and performing algebraic transformations on selected subexpressions of the algebraic expression so that in the final expression operands are combined in the order of their rank. The ranking scheme may be designed to force scalars to be combined before arrays, and/or, to force constants to be combined first, loop invariants second, and variants last. In some embodiments, the ranking scheme is a vector ranking scheme including two or more components (such as invariance rank, dimensional rank and data-size rank).

Abstract: A method and apparatus for profiling and identifying the source of a signal is provided. A first method includes receiving a signal produced by a known source and creating a matrix of wavelet coefficients corresponding to a wavelet transform of the signal. The method also includes profiling the signal according to an output of a wavelet transform utilizing a particular base function and a particular scale set. A second method includes performing a wavelet transform having a particular profile on a received signal and determining the presence of a particular signal-producing entity as a function of wavelet coefficients exceeding a threshold. An apparatus includes a receiver configured to receive a signal and a processor coupled to the receiver, such that the processor is configured to perform wavelet transforms on the signals. A database is coupled to the processor and configured to store wavelet transform profiles.

Abstract: Provided are, among other things, systems, apparatuses, methods and techniques for converting a continuous-time, continuously variable signal into a sampled and quantized signal. One such apparatus includes an input line for accepting an input signal that is continuous in time and continuously variable, multiple processing branches coupled to the input line, and an adder coupled to outputs of the processing branches. Each of the processing branches includes a continuous-time quantization-noise-shaping circuit, a sampling/quantization circuit coupled to an output of the continuous-time quantization-noise-shaping circuit, a digital bandpass filter coupled to an output of the sampling/quantization circuit, and a line coupling an output of the digital-to-analog converter circuit back into the continuous-time quantization-noise-shaping circuit.

Abstract: The method of decrypting a ciphertext includes: pre-storing a plurality of polynomial functions into which a secret key decrypting a ciphertext to a plaintext according to a public-key cryptography algorithm is broken down; receiving the ciphertext generated based on the secret key which is broken down into the plurality of polynomial functions from a ciphertext generating device; and decrypting the received ciphertext into the plaintext based on the pre-stored polynomial functions.

Abstract: A method for performing channel estimation in a millimeter wave wireless communication system. The method includes receiving complementary sequences at a receiver of the millimeter wave wireless communication system. The received complementary sequences are generated at a first sampling rate; producing special complementary sequences from the received complementary sequences; cross-correlating the special complementary sequences with an input signal related to the received complementary sequences. The cross-correlation is performed at a second sampling rate and the second sampling rate is higher than the first sampling rate; and analyzing the result of the cross-correlation to estimate at least characteristics of a channel between the receiver and a transmitter of the millimeter wave wireless communication system.

Abstract: A communication device including a receiving unit and a signal processing module having a simulation unit and a decision unit is provided. The receiving unit receives a first burst of a paging message provided from a base station. Base on a reference burst code and an estimated channel impulse response of the communication channel, the simulation unit generates a simulation burst. The decision unit then determines if the paging message is a dummy message in accordance with the first burst and the simulation burst. The decision unit requests the receiving unit to stop receiving the paging message once the paging message is determined to be a dummy message.

Abstract: The invention relates to a device for determining the temporal position of an analogue trigger signal with relation to an analogue clock signal, comprising an analogue cross-correlator (30), which carries out an analogue cross-correlation between the trigger signal and clock signal to provide a fine resolution.

Abstract: Methods implementable in a computer system for simulating the transmission of signals across a plurality of data channels (bus) are disclosed. The disclosed techniques simulate the effects of Intersymbol Interference (ISI), cross talk, and Simultaneous Switching Output (SSO) noise by generating Probability Distribution Functions (PDFs) for each. The resulting PDFs are convolved to arrive at a total PDF indicative of the reception of data subject to each of these non-idealities. The total PDF, and its underlying terms, can be indexed to particular channels of the bus as well as to particular logic states. Use of the disclosed technique allows bit error rates and sensing margins to be determined with minimal computation and simulation.

Abstract: An embedded control system capable of ensuring precision in arithmetic with data in the floating-point format and also avoiding a shortage of the storage area of a memory is provided. According to an embedded control system in the present invention, when discrete data in the floating-point format is stored in a read-only memory, the discrete data in the floating-point format is converted into data in a significand-reduced floating-point format before being stored. Here, a significand-reduced floating-point number is a number obtained by deleting low-order bits of the significand of a floating-point number. Further, an interpolation search is performed using discrete data, the discrete data in the significand-reduced floating-point format stored in the read-only memory is brought back to the discrete data in the floating-point format before an interpolation search being performed.

Abstract: An electronic filter operates as a correlator that provides a discrete approximation of an analog signal. The analog to digital conversion is integrated directly approximation calculation. An array of sample and hold circuits or single bit comparators provide outputs to a series of multipliers, the other input of which is a coefficient value of a Fourier series approximation of the desired frequency response. Each of the sample and hold circuits samples sequentially in time and holds its sample until the next cycle. Thus the sample point rotates in time through the array and each new sample is multiplied by a different coefficient. The output of the multipliers is summed for evaluation.

Abstract: A first device includes a linear transformation circuit to implement multiplication by a matrix D. The linear transformation circuit as an input to receive a vector having N digital values and an output to output N first output signals. The linear transformation circuit optionally includes a sign-adjustment circuit to adjust signs of a subset including at least M of the N first output signals in accordance with a set of coefficients H. The linear transformation circuit includes a digital-to-analog conversion (DAC) circuit coupled to the output of the sign-adjustment circuit. Outputs from the DAC circuit are summed to produce an output.

Abstract: An algorithm system to detect a broad class of signals in Gaussian noise using higher-order statistics. The algorithm system detects a number of different signal types. The signals may be in the base-band or the pass-band, single-carrier or multi-carrier, frequency hopping or non-hopping, broad-pulse or narrow-pulse etc. In a typical setting this algorithm system provides an error rate of 3/100 at a signal to noise ratio of 0 dB. This algorithm system gives the time frequency detection ratio that may be used to determine if the detected signal falls in Class Single-Carrier of Class Multi-Carrier. Additionally this algorithm system may be used for a number of different applications such as multiple signal identification, finding the basis functions of the received signal and the like.

Abstract: A first device is described. The first device may include a linear transformation circuit to implement multiplication by a matrix D. The linear transformation circuit may have an input to receive a vector having N digital values and an output to output N first output signals, a sign-adjustment circuit to adjust signs of a subset including at least M of the N first output signals in accordance with a set of coefficients H, and a conversion (DAC) circuit coupled to the sign-adjustment circuit. Outputs from the DAC circuit may be summed to produce an output.

Abstract: A reconfigurable multi-code correlation unit for correlating a sequence of chip samples comprising 1) a memory for storing the chip samples; 2) a plurality of add-subtract cells, each add-subtract cell receiving a plurality of real bits, a, and a plurality of imaginary bits, b, from a first chip sample and storing each real bit, a, and each imaginary bit, b, in a data store; and 3) a plurality of sign select units. Each sign select units receives from one add-subtract cell a plurality of first inputs equal to a sum (a+b) of the real bits, a, and the imaginary bits, b, and a plurality of second inputs equal to a difference (a?b) of the real bits, a, and the imaginary bits, b. Each sign select unit generates a plurality of real outputs and a plurality of imaginary outputs, wherein each of the real and imaginary outputs is equal to one of 1) the sum (a+b) multiplied by one of +1 and ?1 and 2) the difference (a?b) multiplied by one of +1 and ?1.

Abstract: A system and method for performing convolutions on image data using pre-computed acceleration data structures is disclosed. The method may include calculating intermediate convolution values for each of a plurality of blocks of pixels by performing an associative operation on the pixel values in each block. Each intermediate value may be associated with the block and indexed dependent on index values of pixels in the block. An image pyramid may include intermediate convolution values for multiple levels of acceleration by calculating intermediate convolution values for multiple block sizes. A convolution result for a kernel of an image may be produced by performing the associative operation on intermediate convolution values for non-overlapping blocks enclosed within the kernel and on pixel values associated with pixels in the kernel but not in one of the non-overlapping blocks. The methods may be implemented by program instructions executing in parallel on CPU(s) or GPUs.

Abstract: Apparatuses, methods, and articles of manufacture disclosing a filter with a plurality of convolver branches are described herein. Each of the plurality of convolver branches include a multiplier, integrator, and sampler and hold circuit. A sampled output of one branch may be fed back to another branch. Other embodiments may be described and claimed.

Abstract: A computer system for generating data structures for information retrieval of documents stored in a database. The computer system includes: a neighborhood patch generation system for defining patch of nodes having predetermined similarities in a hierarchy structure. The neighborhood patch generation subsystem includes a hierarchy generation subsystem for generating a hierarchy structure upon the document-keyword vectors and a patch definition subsystem. The computer system also comprises a cluster estimation subsystem for generating cluster data of the document-keyword vectors using the similarities of patches.

Abstract: A method and system for rank aggregation of entities based on supervised learning is provided. A rank aggregation system provides an order-based aggregation of rankings of entities by learning weights within an optimization framework for combining the rankings of the entities using labeled training data and the ordering of the individual rankings. The rank aggregation system is provided with multiple rankings of entities. The rank aggregation system is also provided with training data that indicates the relative ranking of pairs of entities. The rank aggregation system then learns weights for each of the ranking sources by attempting to optimize the difference between the relative rankings of pairs of entities using the weights and the relative rankings of pairs of entities of the training data.

Abstract: The present invention relates to the digital engineering method and the field of computer, and it puts forward a new digital engineering method which can remarkably increase the computation speed and greatly reduce the error rate of written calculation. The present invention uses the “method of hybrid numeral carry system and carry line”, in which K common Q-ary numerals that participate in the computation of addition and subtraction are transformed into K or 2K numerals of hybrid numeral carry system, then said K or 2K numerals are added for the sum in the hybrid numeral carry system. “Adding by place” is performed from the lowest place or at each place at the same time, and the number of the sum is written into the next computation layer; meanwhile, the obtained “hybrid numeral carry” is put into the next computation layer or at the empty place or zero place of the adjacent high place of any data line that has not undergone the computation in the present computation layer.

Abstract: A filter includes a tap multiplication circuit and a tap digital-to-analog (“DAC”) unit coupled to the tap multiplication circuit. Further, a plurality of clocks are provided that control timing associated with the tap multiplication circuit and that permit one tap multiplication to be output while another tap multiplication is being computed for a 1/N rate implementation.

Abstract: Harmonic interference caused by limit cycles occurs in the resultant signals of filters for noise conversion as a consequence of limit cycles. A feedback loop is connected downstream of the actual filter and is used to effectively suppress the limit cycles. A feedback signal yFB that is added to the output signal of the filter block is generated in the feedback loop. The invention can be implemented using both analog and digital technology.

Abstract: Briefly, in accordance with one embodiment of the invention, a programmable filter may implement an infinite impulse response filter so that a transceiver in which the filter is utilized may be programmable to operate in one or more modes in accordance with one or more communication standards. The programmable infinite impulse response filter may replace one or more analog filters of the transceiver so that a desired filter response may be programmed by a baseband processor. Delay functions of an infinite impulse response filter may be implemented using feedback and multiplexing.

Abstract: A method of mode detection for OFDM signals. The method comprises the steps of delaying the OFDM signal for a first and second number of samples, multiplying the two delayed signals by coefficient signals, and deriving a sum of the two products, deriving an error signal by subtracting the sum of the two products from the OFDM signal, extracting amplitudes of the coefficient signals, and accordingly deriving step size signals, updating the coefficient signals according to the error signal and step size signals, detecting edges of the amplitudes of the coefficient signals, and determining the guard interval length and transmission mode according to the detected edges.

Abstract: A method and system for physiological gating for radiation therapy is disclosed. A method and system for detecting and predictably estimating regular cycles of physiological activity or movements is disclosed. Another disclosed aspect of the invention is directed to predictive actuation of gating system components. Yet another disclosed aspect of the invention is directed to physiological gating of radiation treatment based upon the phase of the physiological activity.

Abstract: A channel select filter circuit is disclosed using a current-mode transconductance-capacitor (gm-C) architecture, which is tuned by digitally controlled capacitor arrays. The main filter includes at least one transconductor-capacitor (gm-C) filter and a transresistance amplifier. A replica transconductor-capacitor (gm-C) filter and a phase detector are used to establish any phase shift in an input signal, and a state machine adjusts capacitor arrays in the the replica transconductor-capacitor (gm-C) filter and the at least one transconductor-capacitor (gm-C) filter in order to set a cut-off frequency of the channel select filter.

Abstract: A demodulator for demodulating digital data includes a receiver for receiving a digital data signal, a determining device to determine if a fractional sample delay added to a demodulator's symbol sampling timing would improve synchronization timing, an implementing device implementing the fractional sample delay if the determining device determines that a fractional sample delay would improve the demodulation synchronization timing, and a demodulating device for demodulating the digital data signal. A method for demodulating digital data includes the steps of receiving a digital data signal, determining if a fractional sample delay added to a demodulator's symbol sampling timing would improve synchronization timing, implementing the fractional sample delay if it is determined in the determining step that a fractional sample delay would improve the demodulation synchronization timing, and demodulating the digital data signal.

Abstract: An electronic filter operates as a correlator that provides a discrete approximation of an analog signal. The analog to digital conversion is integrated directly approximation calculation. An array of sample and hold circuits or single bit comparators provide outputs to a series of multipliers, the other input of which is a coefficient value of a Fourier series approximation of the desired frequency response. Each of the sample and hold circuits samples sequentially in time and holds its sample until the next cycle. Thus the sample point rotates in time through the array and each new sample is multiplied by a different coefficient. The output of the multipliers is summed for evaluation.

Abstract: After one or both of a pair of images are obtained, an auto-correlation function for one of those images is generated to determine a smear amount and possibly a smear direction. The smear amount and direction are used to identify potential locations of a peak portion of the correlation function between the pair of images. The pair of images is then correlated only at offset positions corresponding to the one or more of the potential peak locations. In some embodiments, the pair of images is correlated according to a sparse set of image correlation function value points around the potential peak locations. In other embodiments, the pair of images is correlated at a dense set of correlation function value points around the potential peak locations. The correlation function values of these correlation function value points are then analyzed to determine the offset position of the true correlation function peak.

Abstract: A system and method preprocesses data, in a computer system where forecasting of computing resources is performed based on past and present observations of measurements related to the resources. The preprocessing includes decomposing the past and present observations into a smooth time sequence, a jump time sequence, a noise time sequence and a spike time sequence. The method (and system) includes detecting the spikes in a signal representing the measurements, detecting the jumps in the signal, removing spikes and jumps from the signal, and removing the noise from the signal, to obtain a smooth version of the signal.

Abstract: A system for detecting tactile information includes strain-gauge touch sensors and a controller. Based on the sum output from each of tough-sensor sensor units, an analyzer in the controller calculates touch force Fi(t) at each measurement point. An automatic gain control adjusts the voltage amplitude Ai(t) of a sine wave of frequency fi applied to the sensor units at each measurement point to bring the voltage amplitude measured at each measurement point in line with a target voltage. The adjusted voltage Ai(t) is applied to the bandpass filter with a composite sine wave y(t) which includes sine waves of each frequency corresponding to the adjusted voltage amplitude Ai(t). This makes it possible to reduce the number of lines between the controller and touch sensors that includes numerous measurement points, and enables the gain of the touch sensors constituted by strain gauges to be controlled within an appropriate range.

Abstract: A method and system for physiological gating for radiation therapy is disclosed. A method and system for detecting and predictably estimating regular cycles of physiological activity or movements is disclosed. Another disclosed aspect of the invention is directed to predictive actuation of gating system components. Yet another disclosed aspect of the invention is directed to physiological gating of radiation treatment based upon the phase of the physiological activity.

Abstract: A system to monitor the integrity of a railway track is provided. The system comprises a mechanical signal source and a correlation detector. The mechanical signal source coupled to the railway track and is configured for generating a mechanical signal pulse train over the railway track. The correlation detector monitors the integrity of the railway track by observing the pulse trains transmitted by the mechanical signal sources. If the railway track is intact, then the pulse train will travel to the correlation detector and afford the opportunity for repeatable detection.

Abstract: A correlation value calculating device which has a small scale of circuitry, and allows template vectors to be rewritten. One template vector is written to one row of DRAM memory cells. One memory cell pair is used for storing one template vector component. A high-level is written to one memory cell and a low-level is written to the other memory cell according to the value of the template vector component. When calculating a correlation value, one memory cell of each memory cell pair is respectively connected to corresponding bit line according to the corresponding input vector component. If the components of both vectors are matched, the memory cell of the high-level is connected to the bit line, and if both vectors are not matched, the memory cell of the low-level is connected to the bit line. The electric potential of bit lines each become to indicate the correlation value.

Abstract: A fast convolution method applicable to convolve a signal with a smooth kernel that can be approximated by a spline kernel, and a system configured to perform such method using software or signal processing circuitry. Unlike Fourier-based convolution methods which require on the order of N log N arithmetic operations for a signal of length N, the method of the invention requires only on the order of N arithmetic operations to do so. Unlike wavelet-based convolution approximations (which typically also require more arithmetic operations than are required in accordance with the invention to convolve the same signal), the method of the invention is exact for convolution kernels which are spline kernels. Moreover, convolution in accordance with the invention can be acyclic convolution (achieved without zero-padding) or cyclic convolution, and in both cases the invention imposes no restriction (such as evenness) on signal length.

Abstract: Techniques for arranging operations performable on information in an information processing system are provided. In a system having a plurality of information producers and a plurality of information subscribers, paths are identified over which information traverses, and within which the information is subject to select and/or transform operations. The present invention optimizes the system by reorganizing the sequence of select and transform operations so that transforms follow select operations; and by combining multiple select and transform operations into single select and transform operations, respectively. Using these optimizations, the processing resources of the system can be reorganized, and/or information flow graphs describing the system can be designed, so that the select operations are “pushed” toward the producers, and transform operations are “pushed” toward the subscribers. Efficient content-based routing systems can then be used to implement the select operations.

Abstract: In connection with blind source separation, proposed herein, inter alia, are: expectation-maximization equations to iteratively estimate unmixing filters and source density parameters in the context of convolutive independent component analysis where the sources are modeled with mixtures of Gaussians; a scheme to estimate the length of unmixing filters; and two alternative initialization schemes.

Abstract: Timing jitter sequences &Dgr;&phgr;j[n] and &Dgr;&phgr;k[n] of respective clock signals under measurement xj(t) and xk(t) are obtained, and a covariance &sgr;tj,tk=(1/N)&Sgr;i=1N&Dgr;&phgr;j[i]·&Dgr;&phgr;k[i] is obtained. In addition, root-mean-square values &sgr;tj and &sgr;tk of the respective &Dgr;&phgr;j[n] and &Dgr;&phgr;k[n] are obtained, and a cross-correlation coefficient &rgr;=&sgr;tj,tk/(&sgr;tj·&sgr;tk) between the xj(t) and xk(t) is calculated.

Abstract: Methods and systems are provided whereby correlations between a received signal sample set and a plurality of potential codeword data set are determined and a potential codeword with the highest correlation value is selected as the decoded codeword. The correlation of a potential codeword may be determined by computing a squared magnitude of correlation values between the potential codeword and the received sample set starting at various time points and then summing the squared magnitudes of the correlation values at those points. The number of time points used for correlation computation and summing depends on the time spread of the received symbol pulse. Furthermore, the correlations may be weighted before summing.

Abstract: An electronic filter operates as a correlator that provides a discrete approximation of an analog signal. The analog to digital conversion is integrated directly approximation calculation. An array of sample and hold circuits or single bit comparators provide outputs to a series of multipliers, the other input of which is a coefficient value of a Fourier series approximation of the desired frequency response. Each of the sample and hold circuits samples sequentially in time and holds its sample until the next cycle. Thus the sample point rotates in time through the array and each new sample is multiplied by a different coefficient. The output of the multipliers is summed for evaluation.

Abstract: In a direct sequence spread spectrum receiver an “as received” signal is decoded by correlation. Phase shift key, complementary code key modulated signals are correlated by transforming samples of the signal in a series of butterfly transform processors producing a number of correlations equal to the number of possible transmitted codewords. The largest correlation is selected as the transmitted signal. To reduce the number of processors required to transform a multi-level phase shift key signal, a correlation method and apparatus are disclosed wherein the butterfly transforms are modified with additional twiddle factors selected from a set of twiddle factors. In the alternative, the inputs to the butterfly processors of a correlator can be weighted as a function the additional twiddle factors. A set of signal samples is correlated for each combination of the set of additional twiddle factors and the largest correlation selected as the signal.

Abstract: A method for generating data characterizing an item described by an ordered string of characters, comprises the steps of: (i) for a set of separation metrics each representing a unique number of positions of separation between arbitrary characters in a character group in the ordered string of characters, associating first with each separation metric; generating a set of character groups, wherein each character group comprises at least two characters contained within the ordered string of characters; and (ii) for at least one given character group in the set of character groups, for each given separation metric in the set of separation metrics, generating second data representing number of occurrences that the given character group satisfies the given separation metric; generating third data associated with the given character group, wherein the third data is based upon the second data and the first data; and storing the third data in memory for subsequent use.

Abstract: A correlation value calculating device which has a small scale of circuitry, and allows template vectors to be rewritten. One template vector is written to one row of DRAM memory cells. One memory cell pair is used for storing one template vector component. A high-level is written to one memory cell and a low-level is written to the other memory cell according to the value of the template vector component. When calculating a correlation value, one memory cell of each memory cell pair is respectively connected to corresponding bit line according to the corresponding input vector component. If the components of both vectors are matched, the memory cell of the high-level is connected to the bit line, and if both vectors are not matched, the memory cell of the low-level is connected to the bit line. The electric potential of bit lines each become to indicate the correlation value.