Abstract: An extension to the Universal Serial Bus (USB) protocol that utilizes reserved bits in the OHCI Endpoint Descriptors to signal which root hub port(s) should transmit the data. Typically, all ports transmit (broadcast) data. The present invention encodes transmission information that can be used by the hardware to effectively control which port(s) need to be tri-stated. However, by setting, the “on” bits for all the ports, the present invention retains standard USB functionality. Also provided is a method to increase the bandwidth of low speed devices connected to the USB bus by increasing the data payload for such devices.

Abstract: A processing system and method for transferring data in a processing system. The processing system includes a bus mastering device, a plurality of slave devices, and a bus interconnect configured to switch the bus mastering device between the slave devices. Each of the slave devices has a plurality of addresses. The bus interconnect includes a DMA controller configured to transfer data from a first one of the addresses to a second one of the addresses in response to a single bus command from the bus mastering device.

Abstract: A device includes a task context controller, at least one transport engine connected to the task context controller, and at least one comparator connected to the transport engine. The comparator to compare a data offset from a receive frame with a current data offset and a result is used to determine frame processing order.

Abstract: A system and method for control management of shared peripheral circuits by a plurality of controllers is provided. Control of the peripherals is mediated through a shared signal controller which uses mask registers to ensure that only one controller may control a peripheral at any one time, and that the type of peripheral is matched to the type of controller.

Abstract: An information processing apparatus according to an embodiment of the present invention includes: a CPU; a plurality of peripheral devices connected to the CPU through a bus; and a peripheral access protection setting unit storing access protection information representing whether an access to each of the peripheral devices is permitted or inhibited in accordance with a task to be performed by the CPU, wherein an access by the CPU to the peripheral devices is limited based on the access protection information and address information of the peripheral device.

Abstract: An apparatus and method of speculatively decoding non-memory read commands. A command register and decoder, within the apparatus, compares high-order command bits provided on a serial bus with corresponding bits of recognized non-memory read commands. An early non-memory read command is asserted when incoming command bits match a non-memory read command. Early responsive data is prepared speculatively during the time the remainder of command bits is received and decoded. A determination of command speculation correctness is made after receipt of the full command. If the full command received is not the speculated non-memory read command, the prepared data is discarded. Earlier prepared data is produced as the subsystem response if the full command matches the speculative non-memory read command. For incoming commands with operands, such as an address, the same speculative determination based on high-order operand bits is performed.

Abstract: A method and apparatus is presented allowing multiple data pointers or addresses to be transferred without acknowledgment to Memory Controller (506) and Memory Controller (510) of Data Controller (500). Data is then transferred in response to the data pointers from BUFFER (512) and Buffer (514) and may be stalled during the transfer in favor of a second data transfer. Once the second data transfer finishes, the first data transfer may be completed.

Abstract: A cellular phone. The cellular phone comprises a connector, a first memory module, a second memory module, and a controller. The connector is used for physically connecting the cellular phone to an external device. The first memory module stores phone data. The second memory module stores application data received from the external device. The controller determines whether the connector is connected to the external device. If the connector is not connected to the external device, access right of both the first and second memory modules is granted exclusively to the cellular phone. If the connector is connected to the external device, access right of the first memory is granted exclusively to the cellular phone, and access right of the second memory module is granted exclusively to the external device.

Abstract: A system includes an information processing apparatus and a peripheral which are connected to each other. Initially, the information processing apparatus transmits, to the peripheral, a request to use a service provided by the peripheral. The peripheral determines whether to grant use permission to the received request, and notifies the information processing apparatus which has transmitted the request of the determination result. The peripheral stores information associated with the information processing apparatus to which use permission is granted in response to the request. The information processing apparatus then receives, from the peripheral, a response to the request.

Abstract: The transmission of data is distributed evenly and predictably over a given number of communication channels using a hash function.

Abstract: An improved KVM switch is provided which enables computers to be connected to the KVM switch by reduced numbers of cables. It also supports transmission of digital audio signals between the computers and the KVM switch. A single USB port is provided to transmit keyboard, mouse, speaker and microphone signals between the KVM switch and each computer. The improved KVM switch is provided with one or more USB hubs to separate the keyboard/mouse signals and the digital audio signals, and one or more audio codecs to convert the audio signals from a digital form to an analog form and vice versa.

Abstract: An enhanced fibre channel adapter with multiple queues for use by different server processors or partitions. For a non-partitioned server, the OS owns the adapter, controls the adapter queues, and updates the queue table(s). An OS operator can obtain information from the fibre channel network about the fibre channel storage data zones available to the physical fibre channel adapter port and can specify that one or more zones can be accessed by a specific processor or group of processors. The processor or group of processors is given an adapter queue to access the zone or zones of storage data. This queue is given a new World Wide Port Name or new N-Port ID Virtualization identifier, to differentiate this queue from another queue that might have access to a different storage data zone or zones. For a partitioned server, one partition owns the adapter, controls the adapter queues, and updates the queue table(s).

Abstract: A mechanism that allows a single physical I/O adapter, such as a PCI, PCI-X, or PCI-E adapter, to perform I/O transactions using the PCI host bus, device, and function numbers to validate that an I/O transaction originated from the proper host is provided. Additionally, a method for facilitating identification of a transaction source partition is provided. An input/output transaction that is directed to a physical adapter is originated from a system image of a plurality of system images. The host data processing system adds an identifier of the system image to the input/output transaction. The input/output transaction is then conveyed to the physical adapter for processing of the input/output transaction.

Abstract: Embodiments of the invention include a method and apparatus for managing SAS zoning using initiator isolation. The method includes assigning initiator devices in the SAS domain to a first initiator zone group, assigning target devices in the SAS domain to a second target zone group, and establishing an access control policy in which each of the initiator devices assigned to the first initiator zone group can communicate with each of the target devices assigned to the second target zone group but no initiator devices assigned to the first initiator zone group can communicate with any other initiator devices assigned to the first initiator zone group. Assignment of devices can be based on attachment information associated with each device, such as the ZPSDS entry point of the device, the SAS address of the device, and the phy of the zoning expander device in the SAS domain that is closest to the device.

Abstract: A unified setting interface that enables a management application to configure network manageable devices, regardless of their type or manufacturer. Configuration of a network manageable device requires that certain information be provided to the network manageable device. For different types of devices from different manufacturers, this information and its format can vary. A management application using the unified setting interface does not require the individual interfaces for configuring network manageable devices from different manufacturers.

Abstract: A communications device includes a communications circuit, a memory, an identifier generator, and a latency controller. The communications circuit exchanges serial data with a host computer and a downstream device, and includes a first input, a first output, a second input, and a second output. The first input receives data from the host computer. The first output transmits data to the host computer. The second input receives data from the downstream device. The second output transmits data to the downstream device. The memory is accessible through the communications circuit. The identifier generator generates an identifier number unique to the communications device in response to an identifier setup request received at the first input. The latency controller determines, based on the generated identifier number, a period of latency required to access the memory through the communications circuit.

Abstract: Methods and apparatus for allocating access to a buffer of a host device to buffer data transferred between a controller of the host device and one or more remote devices are disclosed. The host device is configured to couple to each of the one or more remote devices through one or more corresponding dedicated lanes. Buffer access is allocated by determining, for each of one or more remote devices coupled to the host device, a number of dedicated lanes between the host device and each of the one or more remote devices and allocating access to the buffer of the host device for each of the one or more remote devices responsive to the determined number of dedicated lanes.

Abstract: In a data processing system which runs a plurality of operating systems, a channel device can be shared by the plurality of operating systems. In addition, a channel device which supports port multiplexing can also be shared by a plurality of operating systems. The channel device includes a plurality of IDs each indicating that the channel device is a medium for performing input/output processing, and an input/output processing controller for assigning one operating system to each of the IDs, and controlling a data transfer independently for each ID to control a plurality of data transfers. Further, in a channel device which has a plurality of ports, an input/output processing controller is provided for assigning an operating system to each of the ports, and transferring data independently for each port to control the plurality of ports.

Abstract: An input/output subsystem is configured as a plurality of input/output subsystem images, each of which appears to a program as an independent input/output subsystem. An input/output subsystem image is identified by an input/output subsystem image identifier, which is used by various programs to designate the particular input/output subsystem image for which an I/O operation is to be performed. An input/output subsystem image includes, for instance, one or more input/output paths. An input/output path of an input/output subsystem image is identified by an input/output path identifier, as well as a physical input/output path identifier.

Abstract: A data storage system having a first chassis, such first chassis having a pair of SAS expanders and a second chassis having a pair of SAS expanders. The first one of the pair of SAS expanders is connected to only an expansion port of a first one of a pair of signal processor printed circuit boards in the first one of the chassis. An expansion port of a second one of the pair of SAS expander is connected to only the expansion port of a second one of the pair of signal processor printed circuit boards in the second one of the chassis.

Abstract: A system and method are provided for reducing a potential thief's motivation to steal an electronic device, by rendering the device inoperative at some time after it is stolen. The mechanism used to deter theft may include a modified primary integrated circuit chip in the electronic device, such as the central processing unit (CPU), a memory controller chip, or a primary input/output (I/O) chip. The chip may be important enough to the normal operation of the electronic device such that without normal operation of the chip, the electronic device also would not operate normally, thus rendering the electronic device partially or fully disabled. A “recharger” device may be used to recharge, or reset the operability of the chip.

Abstract: A peripheral connectable to a processing device includes a housing and network interface circuitry at least partially enclosed within the housing, the network interface circuitry being utilizable by the processing device to establish a connection between the processing device and a network. The peripheral further includes peripheral circuitry disposed within the housing and adapted to perform at least a portion of at least one of an input function and an output function for the processing device in a manner unrelated to utilization of the network interface circuitry by the processing device. In an illustrative embodiment, the network interface circuitry comprises a wireless local area network (LAN) interface card, module or access point, the processing device comprises a computer, and the peripheral comprises a keyboard, monitor, speaker, docking station or other peripheral connectable to the computer.

Abstract: A data processing apparatus includes an arithmetic circuit and a peripheral device protection circuit that controls access of the arithmetic circuit to the peripheral devices. The peripheral device protection circuit has a first protection preset value and a second protection preset value set as a protection level higher than that of the first protection preset value. The peripheral device protection circuit includes: a setting selection circuit that generates access permission/denial information by referring to the first protection preset value and the second protection preset value when the arithmetic circuit operates at a first operation authority level, or by referring to the second protection preset value when the arithmetic circuit operates at the second operation authority level. An access protection circuit that determines permission/denial of access to the peripheral devices based on access information output from the arithmetic circuit and the access permission/denial information.

Abstract: An electronic apparatus includes a memory, first and second bus masters, a counting unit and a control unit. The first and second bus masters are capable of accessing the memory. The counting unit counts an amount of addresses reserved by the second bus master for accessing the memory. The control unit controls to avoid permitting a request made by the second bus master if a value counted by the counting unit becomes larger than a first threshold value, until the value counted by the counting unit becomes smaller than a second threshold value. The request made by the second bus master is used to reserve addresses of the memory, and the second threshold value is smaller than the first threshold value.

Abstract: Some embodiments include apparatus and method to allocate ports of host bus adapters in computer systems to multiple operating systems in the computer systems. Other embodiments are described and claimed.

Abstract: An information processing device, a device access control method, and a device access control program are provided. When a device built in or mounted on the information processing device is controlled, the OS manages access to the device driver, so as to restrict the use of the device. When issuing a control instruction to a device driver (22) that controls a device (4), an application (1) accesses a system call unit (21) in the OS (2). The system call unit (21) inquires at an access determining unit (31), so as to confirm that the application (1) is allowed to access the device driver (22). After confirming that the application (1) is allowed to access the device driver (22), the system call unit (21) transfers the control instruction to the device driver (22). When a new device (4) is connected, the access determining unit (31) determines whether the application (1) is allowed to control the device (4).

Abstract: A hub switch allows a high-speed USB peripheral or set of peripherals to be shared between multiple USB hosts. Multiple USB ports are configured to connect to different USB peripheral devices and USB hosts. Switching logic is located between at least some of the USB ports and USB logic. The switching logic selectively connects the USB peripheral devices to different selectable ones of the USB hosts.

Abstract: Attempts by drivers of a virtualized legacy computer game to communicate with nonexistent legacy game system hardware are converted into calls to actual hardware of the host computer game system. An access control list (ACL) restricting and/or reducing page permissions is used to explicitly forbid the drivers of the legacy computer game operating on the virtualized legacy computer game platform from writing to the MMIO addresses of the legacy computer game system. When the operating system of the virtualized legacy computer game platform attempts to touch its driver memory by writing to the MMIO addresses, the operating system of the host computer game system perceives a memory access violation, suspends the virtual machine implementing the virtualized computer game platform, and passes the intended write to an exception handler of the host operating system.

Abstract: An apparatus, system, and method are disclosed for grouping connection paths for lock attention data. A grouping request module is included to receive a request to establish a group of connection paths. Each connection path is configured to communicate lock attention data between a host and a control unit. The control unit is configured to control a storage device containing data accessible to a plurality of processes. A connection path selection module is included to select a plurality of connection paths between the host and the control unit and a grouping assignment module configured to assign the plurality of connection paths to a group. In one embodiment, an attention selection module is included to select an attention connection path for communicating lock attention data from any of the connection paths in the group. The attention selection module may select an attention connection path using a load balancing function.

Abstract: Potentially identical objects (e.g., files) are located across multiple computers based on stochastic partitioning of workload. For each of a plurality of objects stored on a plurality of computers in a network, a portion of object information corresponding to the object is selected. The object information can be generated in a variety of manners (e.g., based on hashing the object, based on characteristics of the object, and so forth). Any of a variety of portions of the object information can be used (e.g., the least significant bits of the object information). A stochastic partitioning process is then used to identify which of the plurality of computers to communicate the object information to for identification of potentially identical objects on the plurality of computers.

Abstract: To be able to transmit a response packet to a target, which is the original request source node, even if, after issuing a request from a node to another, a bus ID/a device ID is replaced in the PCI-Express switch before said another node makes a response to the request source node in a PCI-Express communication system, which uses a PCI-Express switch. For that purpose, a unique node ID for indicating each node is set to the nodes, a channel ID is set to each channel used for data transfer, and the node ID of the transfer destination module, the channel ID of a channel used for the data transfer, and the packet type indicating that the packet is a request or a response are set in an address field of a packet of data transfer. For the data transfer, only a memory write request packet routed by address routing is used.

Abstract: A mixed architecture system on chip is provided by combining a CoreConnect system on chip architecture with an AMBA system on chip architecture. To eliminate data transfer and bus error that could occur in the mixed architecture, an additional peripheral bus and bridge are provided to manage communication with AHB resources.

Abstract: Single and dual ported devices are interfaced to a system via a 2:2 multiplexing device. The multiplexing device is coupled to two system ports and two device ports. The multiplexing device includes an active multiplexer coupled to the two system ports and a multiplexed port. The multiplexing device also includes bypass circuitry coupled to the two system ports and two bypass ports. In operation, when the multiplexing device is coupled via one of the device ports to a single ported device such as a single ported disk drive, the active multiplexer is activated and the bypass circuitry is deactivated and the multiplexed port is coupled to the device port. When the multiplexing device is coupled via both device ports to a dual ported device, the active multiplexer is deactivated and the bypass circuitry is activated and the bypass ports are coupled to the two device ports.

Abstract: A switching device for controlling a connection between a private computer, a shared computer, and a terminal, including: a connecting unit that connects each terminal to a corresponding private computer in a default status, and switches a connection destination of the terminal to a private computer corresponding to the terminal or the shared computer when a connection switching request transmitted from the terminal has been received; and a security unit that executes for each terminal, identification processing on the data that has been received from any one terminal and output to the at least one private computer or the shared computer.

Abstract: A method, computer program product, and distributed data processing system that enables host software or firmware to map PCI adapter virtual resources to PCI bus addresses that are associated with a system image is provided. Virtual addresses maintained in a protection table segment assigned to a system image are mapped to physical addresses defined in entries of an address table segment assigned to the system image. Discontiguous memory regions identified in entries of the address table segment may thus be mapped to a contiguous virtual address space.

Abstract: When an active data copy process relative to a logical storage device is performed without involving a computer, an access permission/rejection of the computer to the logical storage device is checked by referring to a correspondence between WWN of the computer and a logical storage device identifier LUN to thereby determine whether an access to a copy source logical storage device and a copy destination logical storage device is permitted or not. It is therefore possible to prevent an outflow of illegal data from a storage subsystem to be caused by an active copy instruction command.

Abstract: When transfer condition information is set and the start of automatic control transfer is instructed, a transfer controller (host controller) automatically issues a setup stage transaction and automatically transfers a setup stage packet, then, if there is data to be transferred, it automatically issues a data stage transaction and automatically transfers a data stage packet. It then automatically issues a status stage transaction and automatically transfers a status stage packet. Device request data, the total size of transfer data, data stage present/absent information, transfer direction in the data stage, and maximum packet size are set in transfer condition registers. A pipe region is allocated in the packet buffer during host operation of USB On-The-Go.

Abstract: A random access memory system has a memory controller, a first memory device, a second memory device, and a memory bus. The memory controller is configured to control access to a plurality of memory devices. The memory bus is configured to alternatively couple the memory controller to the first memory device and to couple the memory controller to the second memory.

Abstract: A method and system for allowing a media player to determine if it supports the capabilities of an accessory are disclosed. The method and system comprise requesting information about the capabilities of the accessory by the media player and providing information about the capabilities of the accessory by the accessory to the media player. The method and system further include utilizing the information to determine if the capabilities of the accessory are supported by the media player. Accordingly, a method and system in accordance with the present invention provides a system that allows a media player to obtain information from an accessory about the accessory's capability. A media player can then utilize this information to allow for the maximum functionality of the accessory when connected to the media player.

Abstract: Dynamically creating a communication path between first and second storage devices, includes creating a connection to a source volume on the first storage device and indicating that the source volume is not ready to transmit data on the communication path, after successfully creating the connection to the source volume, creating a connection to a destination volume on the second storage device and initially indicating that portions of one of: the destination volume and the source volume do not contain valid copies of data, where the destination volume accepts data from the source volume, and after successfully creating the connections to the source and destination volumes, indicating that the source volume is ready to transmit data on the communication path. Dynamically creating a communication path between first and second storage devices, may also include creating at least one of: the source volume and the destination volume.

Abstract: A method, computer program product, and distributed data processing system that allows a system image within a multiple system image virtual server to directly expose a portion, or all, of its associated system memory to a shared PCI adapter without having to go through a trusted component, such as a Hypervisor. Specifically, the present invention is directed to a mechanism for sharing conventional PCI I/O adapters, PCI-X I/O Adapters, PCI-Express I/O Adapters, and, in general, any I/O adapter that uses a memory mapped I/O interface for communications.

Abstract: A mechanism that allows a single physical I/O adapter, such as a PCI, PCI-X, or PCI-E adapter, to perform I/O transactions using the PCI host bus, device, and function numbers to validate that an I/O transaction originated from the proper host is provided. Additionally, a method for facilitating identification of a transaction source partition is provided. An input/output transaction that is directed to a physical adapter is originated from a system image of a plurality of system images. The host data processing system adds an identifier of the system image to the input/output transaction. The input/output transaction is then conveyed to the physical adapter for processing of the input/output transaction.

Abstract: A storage control system has a host computer having one or more initiators; a storage controller having one or more targets and storage areas, and also having a security property for defining access relationships between the targets and the storage areas; and a management module for storing access correspondence relationships between the initiators and the targets. When the security property is set in the storage controller, the storage controller sets the access correspondence relationships in the management module based on the security property.

Abstract: The object of the present invention is to make information necessary for judging whether control output is possible closer to the latest information than in the conventional method or made the latest, and shorten the time from control start to control execution. In a control and monitoring system for a power system which controls monitoring control objects by supplying a control instruction from a master unit 6 to a plurality of input/output terminal devices BCU1, BCU2, and so on provided for each of the plurality of monitoring control objects in a power system, the master unit 6 starts operations to acquire information necessary for judging whether control output to the input/output terminal devices BCU1, BCU2, and so on is possible at the time of control object selection notification from the master unit 6 to the input/output terminal devices BCU1, BCU2, and so on.

Abstract: A method, computer program product, and distributed data processing system that allows a single physical I/O adapter to validate that a memory mapped I/O address referenced by an incoming I/O operation is associated with a virtual host that initiated the incoming memory mapped I/O operation is provided. Specifically, the present invention is directed to a mechanism for sharing a PCI family I/O adapter and, in general, any I/O adapter that uses a memory mapped I/O interface for communications. A mechanism is provided that allows a single physical I/O adapter to validate that a memory mapped I/O address referenced by an incoming memory mapped I/O operation used to initiate an I/O transaction is associated with a virtual host that initiated the incoming memory mapped I/O operation.

Abstract: A mechanism is provided for locking an end device for the period of time that the device is needed, thus disabling access by any other application or process. Having the device locked, rather than the bus, allows other applications to use the bus to access other devices at the same time. This is achieved by providing a virtual bus arbitration, which arbitrates applications' use of the physical bus. The virtual bus arbitration algorithms allow bus operations from different applications to overlap on the physical bus as long as their target devices and associated bus locks are on different end devices.

Abstract: A communication apparatus includes a radio frequency circuit that operates on a radio frequency signal and a digital processing circuit coupled to the radio frequency circuit. The digital processing circuit includes a plurality of bus masters coupled to a shared bus. A bus arbiter is provided for arbitrating between requests to access the bus by a first bus master and one or more other bus masters. Accesses by the one or more other bus masters to the bus are restricted in response to a signal indicative of a change in a mode of operation of the RF circuit. In one particular implementation, a communication apparatus employs time domain isolation wherein the digital processing circuit may be placed in a shutdown mode when the radio frequency circuit is active.

Abstract: A method, computer program product, and distributed data processing system that enables host software or firmware to allocate virtual resources to one or more system images from a single physical I/O adapter, such as a PCI, PCI-X, or PCI-E adapter, is provided. Adapter resource groups are assigned to respective system images. An adapter resource group is exclusively available to the system image to which the adapter resource group assignment was made. Assignment of adapter resource groups may be made per a relative resource assignment or an absolute resource assignment. In another embodiment, adapter resource groups are assigned to system images on a first come, first served basis.

Abstract: A method and system for protecting portable computer data from unauthorized transfer or using portable computers to download unauthorized data. The invention is applicable to any computer capable of transferring data, but in one embodiment a portable computer is described. Authorization is enabled by an interface permitting synchronization of the portable computer with a host computer by authentication of the particular portable computer identity. For instance, in one embodiment, when a portable computer is docked with a compatible interface connected to a host desktop computer, it is sensed and identified by the interface. If the particular portable computer identity is authenticated as authorized for that desktop, then synchronization will be enabled by the interface. The computers may then transfer data. However, if the identity is not an authorized one, then authentication will not occur, synchronization is correspondingly disabled, and data transfer is prevented.

Abstract: Described is a distributed lock processing technique that may be used to coordinate access to globally accessed resource between endpoints using the connecting message fabric. Processors in a data storage system communicate using the message switch of the message fabric. Each processor is an endpoint within a data storage system. Each endpoint, prior to requesting a lock, dynamically determines a current lock owner of the lock to be requested in accordance with a determination of which endpoints are available as lock owners at the current time. The lock request is issued to the current lock owner with a requested time period used by the lock owner to determine an expiration time. The lock expires automatically at the expiration time even if the lock holder becomes unavailable. If the current lock owner becomes unavailable, a new lock owner is determined prior to the next request for that lock.