Abstract: An apparatus for forming a color image has at least a first, a second, and a third illumination source, each illumination source energizable to provide continuous illumination of a first, a second, or a third wavelength band, respectively, to an optical multiplexer. The optical multiplexer is actuable to cyclically switch received light from each one of the illumination sources, in turn, to each one of at least a first, a second, and a third projector channel in a repeated sequence. The first projector channel connects to a first projector apparatus, the second projector channel connects to a second projector apparatus, and the third projector channel connects to a third projector apparatus. Each projector apparatus has a light modulator that is energizable to form an image from the light of the first, second, or third wavelength band that is cyclically switched onto its projector channel from the optical multiplexer.

Abstract: The present invention discloses a method for accessing multiple card slots and an apparatus for the same, which relate to data communication field. The method comprises establishing a connection from a CCID to a host, declaring at least a pair of IN/OUT endpoints used for implementing a response pipe and a command pipe as BULK-IN and BULK-OUT endpoints, declaring at least one IN endpoint used for implementing an event notification pipe as an interrupt endpoint, and declaring, by the CCID, the CCID itself as a device compliant with a CCID standard and the number of card slots supported by the CCID to the host; accessing the CCID by the host; receiving, by the CCID, a BULK-OUT packet and determining, by the CCID, a type of a CCID command issued by the host according to the BULK-OUT packet; in case the CCID command is a channel extension command, determining if it is a channel switch command; and if so, parsing the channel switch command and activating a card slot the host tries to access.

Abstract: A computerized switching system for coupling a workstation to a remotely located computer. A signal conditioning unit receives keyboard and mouse signals generated by a workstation and generates a data packet which is transmitted to a central crosspoint switch. The packet is routed through a crosspoint switch to another signal conditioning unit located at a remotely located computer. The second signal conditioning unit applies the keyboard and mouse commands to the keyboard and mouse connectors of the computer as if the keyboard and mouse were directly coupled to the remote computer. Video signals produced by the remote computer are transmitted through the crosspoint switch to the workstation. Horizontal and vertical sync signals are encoded on to the video signals to reduce the number of cables that extend between the workstation and the remote computer.

Abstract: A method to adjust a multi-path device reservation by supplying a computing device and a storage controller interconnected with a communication link. The method further reserves a data storage device in communication with the storage controller, where that data storage device reservation is held by a first communication path group comprising a first plurality of communication paths configured in the communication link. If the method detects a failed communication path configured in the first communication path group, the method configures a second communication path group by removing the failed communication path from the first communication path group, wherein the second communication path group maintains the data storage device reservation.

Abstract: To provide a job scheduler, a job scheduling method, and a job control program that are capable of, even with an incapable CPU not equipped with a real-time OS, meeting basic real-time property that is required in a system. The job scheduler is a job scheduler 5 for calling each of a plurality of jobs for controlling an appliance to a main loop and causing each job to be executed. The job scheduler 5 carries out calling control including: dividing the jobs into a plurality of groups according to a degree of need for real-time processing of each jobs; setting a priority on a group basis; and restricting a calling frequency, per cycle, of a job belonging to a group of low priority to a minimum tolerated frequency.

Abstract: A disk array apparatus using an SAS can transfer data without lowering a transfer efficiency of data even if rates of a plurality of physical links connected to a controller and storage device are different. A plurality of HDDs are connected to a controller through an expander. Data are transferred from the controller to the expander and then to HDD. In this connection, the controller and the expander transfers a set of transfer data in a plurality of the HDD-side physical links. The controller-side physical link integrates the transfer data, and multiplexes them to transfer. A plurality of HDDs-side physical links separates the transfer data to transfer in parallel.

Abstract: The present invention relates to a method for data output control, which comprises: obtaining the length of idle bits in the cache queue of a data output interface, and if the idle-bit length is equal to or longer than the length of the data to be sent on the interface, putting the data into the cache queue of the interface. In addition, this present invention discloses another data output control method, and two types of data output control apparatuses. Using this invention can avoid flow interruption.

Abstract: A composite input signal having an audio component and a video component is routed from an input to an output by separating a stream of audio data words at an average frequency F1 from the video component and supplying the separated stream of audio data words sequentially to a FIFO input register. The output of the FIFO input register is polled at a frequency F2, greater than F1, and, in the event that an audio data word is available at the output of the FIFO input register, the audio data word is conveyed from the output of the FIFO input register to an input of a signal path. Otherwise a null data word is conveyed to the input of the signal path. The signal path thereby conveys a stream of data words that comprises both audio data words and null data words. The audio data words of the stream conveyed by the path are combined with the video component of the composite input signal.

Abstract: A Method to redirect SRB routines from otherwise non-zIIP eligible processes on an IBM z/OS series mainframe to a zIIP eligible enclave is disclosed. This redirection is achieved by intercepting otherwise blocked operations and allowing them to complete processing without errors imposed by the zIIP processor configuration. After appropriately intercepting and redirecting these blocked operations more processing may be performed on the more financially cost effective zIIP processor by users of mainframe computing environments.

Abstract: A Method to redirect SRB routines from otherwise non-zIIP eligible processes on an IBM z/OS series mainframe to a zIIP eligible enclave is disclosed. This redirection is achieved by intercepting otherwise blocked operations and allowing them to complete processing without errors imposed by the zIIP processor configuration. After appropriately intercepting and redirecting these blocked operations more processing may be performed on the more financially cost effective zIIP processor by users of mainframe computing environments.

Abstract: A FIFO device crossing a first and a second power domains is provided. The device comprises: a plurality of input registers belonging to the first power domain for receiving the input signal, and each of the input register having a first output; a first controller belonging to the first power domain for enabling the registers according to specific order and generating an initial signal; a multiplexer receiving the first outputs according to the specific order to generate a second output; a second controller belonging to second power domain, receiving the initial signal through an asynchronous interface and controlling the multiplexer to output second output; and an output register belonging to second power domain receiving the second output. First power domain operates according to a first clock signal. Second power domain operates according to a second clock signal. The first and second clock signals are asynchronous.

Abstract: The present invention relates to a system and method for capturing, sharing, annotating, archiving, and reviewing phone calls and related computer video output in a computer document format. The system creates a portable, transferable computer file recording of a phone call & computer video (“phone voice recording,” or “PVD”) that contains attached data to help identify, sort, and archive the file while maintaining the integrity of the file. Another aspect of the invention includes a method of using the system comprising initiating a phone call between two parties; beginning a recording of the call and initiating a PVD for the recording; and terminating the call and creating the PVD for the call. Another aspect of the invention includes a method of accessing a PVD by a user, reviewing and/or modifying the PVD, capturing the modified PVD, and sharing the PVD with another user.

Abstract: A method for communication between an initiator system and a block storage cluster may include receiving a first input/output (I/O) request from the initiator system. The method may also include sending a referral response from a first storage system included in a plurality of storage systems of the block storage cluster to the initiator system when data associated with the first I/O request is stored in more than one storage system of the plurality of storage systems of the block storage cluster. Additionally, the method may include directing a referral I/O to the first storage system and the second storage system for transferring data to or transferring data from the first storage system and the second storage system, and transferring data associated with the referral I/O to or transferring data associated with the referral I/O from the first storage system and the second storage system.

Abstract: A quality of service (QoS) notification module can provide detection and notification of violation of allocated QoS to a transmission queue. The QoS notification module can be located on a network adapter and send notifications to a host computer coupled to the network adapter. QoS notifications can indicate that one or more host transmission queues are being underserved, i.e., the bandwidth guaranteed to the one or more host queues is not being met despite the queues not being empty. Notification module can send notification to the host by writing to a memory location or a notification register in the memory of the host. Alternatively, the notification module can send an interrupt to the host processor, the interrupt including QoS notification information. The notification module can also be located in a switch for generating notifications of QoS violations of bandwidth guarantees for transmission queues associated with transmission ports of the switch.

Abstract: An apparatus and a method for setting a primary port on a PCI multi-port bridge. More specifically, there is provided a method that comprises detecting a configuration signal at the PCI multi-port bridge and automatically setting the primary port on the PCI multi-port bridge based on the configuration signal. A system for implementing the method is also provided.

Abstract: One embodiment of the invention comprises a non-transitory, tangible computer readable storage medium encoded with processor readable instructions to perform a method of transferring SDIO data. One method comprises buffering multiple IP packets to transfer from one of a SDCC host and a SDIO client to the other of the SDCC host and the SDIO client. A multiplexing header is attached to each of the multiple IP packets and one of at least one SDIO read command and at least one SDIO write command issued. The multiple IP packets are then transferred in a single SDIO transfer between the one of a SDCC host and a SDIO client to the other of the SDCC host and the SDIO client.

Abstract: A data transmission/reception method in Near Field Communications (NFC) for improving data throughput is provided. Communications between a first NFC device and a second NFC device which perform NFC includes (a) transmitting, by the first NFC device, a data frame to the second NFC device, (b) setting, by the second NFC device, an indication of presence or absence of more-data in a bit of a Logical Link Control (LLC) information frame and transmitting the LLC information frame as a response frame responding to the data frame transmitted from the first NFC device, and (c) checking, by the first NFC device, the bit of the response frame and waiting for predetermined time or immediately transmitting a next transmission data bit without waiting for the predetermined time according to the check result.

Abstract: Disclosed is a method for reducing latency between two clock domains in a digital electronic device. The time between a write to a queue position and a corresponding read of the queue position is reduced by up to one clock cycle by including a delay in the time before first writing data to a First In First Out (FIFO) queue used to buffer and synchronize data between two clock domains. The two clock domains have the same frequency, but may be out of phase. Reducing the latency between the write and the corresponding read reduces the required size of the FIFO queue and also results in more efficient system operation.

Abstract: An interface device, such as for a System-on-Chip (SoC) bus, transfers data from an input queue through an output to a target. The interface device includes a buffer network for buffering input data when the target is not available for receiving the data. A multiplexer switches between a first operating condition for directing to the target the data from the input queue, and a second operating condition for directing to the target the buffered data from the buffer network. A finite-state machine selectively switches the multiplexer between the first operating condition and the second operating condition based on an acknowledgement signal received from the target. This indicates the availability of the target for receiving the data.

Abstract: Solid state storage devices and methods for operation of solid state storage devices are disclosed. In one such method, a master memory controller is comprised of a plurality of memory communication channels. At least one of the memory communication channels is used to communicate with one or more slave memory controllers. The master and slave memory controllers can operate in a parallel operation mode to communicate with a plurality of memory devices coupled to the memory communication channels of each memory controller.

Abstract: Disclosed are a method, a system and a computer program product for operating a cache system. The cache system can include multiple cache lines, and a first cache line of the multiple of cache lines can include multiple cache cells, and a bus coupled to the multiple cache cells. In one or more embodiments, the bus can include a switch that is operable to receive a first control signal and to split the bus into first and second portions or aggregate the bus into a whole based on the first control signal. When the bus is split, a first cache cell and a second cache cell of the multiple cache cells are coupled to respective first and second portions of the bus. Data from the first and second cache cells can be selected through respective portions of the bus and outputted through a port of the cache system.

Abstract: A selective connection device allowing the connection of at least one peripheral to a target computer and a selective control system comprising such a device. It relates to the field of devices for the selective connection of a control device composed of input/output peripherals to various target computers. The selective connection device affords security guarantees by preventing communication between the various target computers that may be controlled.

Abstract: A high-radix interprocessor communications system and method having a plurality of processor nodes, a plurality of first routers and a plurality of second routers. Each first router is connected to a processor node and to two or more second routers. Each first router includes input ports, output ports, row busses, columns channels and a plurality of subswitches arranged in a n x p matrix. Each row bus receives data from one of the plurality of input ports and distributes the data to two or more of the plurality of subswitches. Each column distributes data from one or more subswitches to one or more output ports. Each row bus includes a route selector, wherein the route selector includes a routing table which selects an output port for each packet and which routes the packet through one of the row busses to the selected output port.

Abstract: A data communication method for semiconductor chips including transmitting load control data, pilot data and a transmission clock signal from a first semiconductor chip to one or more second semiconductor chips that are each coupled to one or more electrical loads, driving the electrical loads based on a timing defined by the load control data, deriving a transmission rate by dividing the transmission clock signal by a division factor prescribed by the pilot data, and transmitting diagnostic data at the transmission rate from the one or more second semiconductor chips to the first semiconductor chip.

Abstract: Disclosed herein is a memory control apparatus including: a plurality of buffers configured to store data; a plurality of input ports configured to input the data to be written into the buffers; a plurality of output ports configured to output the data read from the buffers; a write control circuit configured to write the data inputted via each of the input ports into an unused one of the buffers; and a read control circuit configured to read the data written into the unused buffer, and supply the read data to a particular one of the output ports corresponding to a destination of the data.

Abstract: A system and corresponding method for transferring data. Data may be selectively communicated via a USB port of a device. An indication of a device type may be received at the USB port from an external interface. USB protocol data or uncompressed high definition media data may be caused to be selectively supplied to the USB port as a function of the indication. The selected data may be transmitted via the USB port to an external interface. The uncompressed high definition media data may include at least one lane of media data or multimedia data in accordance with a DisplayPort standard. In some embodiments, either USB protocol data or multimedia data comprising audio data and uncompressed high definition video data may be caused to be selectively supplied to the USB port as a function of the indication. The indication may be a data format signal.

Abstract: A computer system for software development and debugging for an embedded system includes a Universal Serial Bus (USB), a host computer comprising a USB driver interfaced with the USB, wherein the USB driver can multiplex application data and debug data to and from the USB, and an embedded system comprising a USB module interfaced with the USB. The USB module can multiplex the application data and the debug data to and from the host computer via the USB.

Abstract: A computer system for software development and debugging for an embedded system includes a Universal Serial Bus (USB), a host computer comprising a USB driver interfaced with the USB, wherein the USB driver can multiplex application data and debug data to and from the USB, and an embedded system comprising a USB module interfaced with the USB. The USB module can multiplex the application data and the debug data to and from the host computer via the USB.

Abstract: A memory device is provided. The memory device includes a preamble disable memory and a memory controller. The preamble disable memory is arranged to store preamble disable data. The preamble disable data includes an indication as to whether a read preamble should be enabled or disabled. In response to a read command, if the preamble disable data includes an indication that the read preamble should be enabled, the memory controller provides the read preamble. Alternatively, in response to the read command, if the preamble disable data includes an indication that the read preamble should be disabled, the memory controller disables the read preamble.

Abstract: Methods, systems, and devices providing single user-interface control of multiple computers and displays. Direct communication links to multiple computers are provided to automatically transmit peripheral computer device position and peripheral computer device commands to one of the multiple computers using, for example, a single computer mouse and/or a single computer keyboard device, based on a configuration map which maps mouse position to display position of the multiple computers and displays as the current mouse position is automatically tracked.

Abstract: A control module for controlling a communication network includes a master control unit generating a master control signal and a master pulse signal, a slave control unit generating a slave control signal; and a switch unit electrically connected to the master control unit, the slave control unit, and the communication network. The switch unit includes a timer and a multiplexer. The timer receives the master pulse signal, generates a first selecting signal when the master pulse signal exists, or generates a second selecting signal when the master pulse signal stops. The multiplexer receives the master control signal, the slave control signal, and the first/second selecting signal, transmits the master control signal to the communication network when receiving the first selecting signal, or transmits the slave control signal to the communication network when receiving the second selecting signal.

Abstract: Systems, devices, and methods for multiplexing one or more services are disclosed. Such systems and devices may have an architecture that includes communication interfaces, processors, storage devices, and software applications that generate virtual machines. Each of the virtual machines may receive a first set of service data for a service of the one or more services; process the first set of service data using the one or more software applications to generate a second set of service data and data instructions associated with the second set of service data; provides a service security function for the service; provide a service operating system; mine the first set of service data, including analytical information; and transmit the second set of service data and data instructions associated with the second set of service data to a display interface that may be a communication interface.

Abstract: A semiconductor device coupled to input/output pins includes a first core to operate a first function and a second core to operate a second function. A multiplexer is arranged to set the input/output pins to the first function or to the second function, and an arbiter is configured to receive requests from the cores to use the input/output pins and to grant use of the input/output pins to a selected core. A register is arranged to store a value indicative of a delay to be applied by the arbiter when granting use of the input/output pins to the second core.

Abstract: A microcontroller is disclosed, which includes a memory, a first storage unit, a plurality of second storage units, a multiplexer and a micro-controller unit (MCU). The first storage unit is for being written into with a first code. The second storage units are for being written into with a plurality of second codes. The multiplexer writes the first code and one of the said second codes into the memory according to a control signal so that the memory generates a system code. The MCU reads out the system code come from the memory to perform operations.

Abstract: According to one aspect there is disclosed an apparatus. The apparatus may include a first device.

Abstract: An apparatus and method for supporting a plurality of external memories in a portable terminal are provided. The apparatus includes a first memory mounted in a first memory slot, a second memory mounted in a second memory slot, a control unit for creating a list of data items stored in at least one of the external memories and for outputting a command for selecting one of the external memories, and a switching unit for determining and selecting one of the external memories storing next data to reproduce during the reproduction of data included in the list, wherein the switching unit includes a multiplexer to which a command (CMD) interface for issuing a command to the selected external memory and a data (DAT) interface capable of reading/writing stored data are connected.

Abstract: A method for enhancing the memory bandwidth available through a memory module of a memory system is provided. The memory system includes a memory hub device integrated in a memory module. The memory system includes a first memory device data interface integrated in the memory hub device that communicates with a first set of memory devices integrated in the memory module. The memory system also includes a second memory device data interface integrated in the memory hub device that communicates with a second set of memory devices integrated in the memory module. In the memory system, the first set of memory devices are separate from the second set of memory devices. In the memory system, the first and second set of memory devices are communicated with by the memory hub device via the separate first and second memory device data interfaces.

Abstract: A computer-implemented method, system and computer program product for managing USB ports on blades in a blade center are presented. A set of remotely-transmitted instructions causes a multiplexer to physically disconnect one or more selected USB ports on a blade. In one embodiment, the same one or more selected USB ports are also software-disabled by a USB software-based controller.

Abstract: A module with isolated analog inputs for a programmable controller, the module including plural input pathways that are each isolated with aid of at least one optical isolation static relay controlled selectively with the aid of a controller. The module further includes a multiplexer including plural channels each controlled to open or to close, a channel of the multiplexer being placed in series with an isolated input pathway of the module.

Abstract: Apparatus, methods, systems, and computer-readable media are provided for remotely controlling the connection between a host computer and a multitude of connected devices. One apparatus described herein includes a multiplexer that has a host port for connection to a host computer, device ports for connection to the devices, and control lines. The multiplexer is operative to connect a device port to the host port based upon the status of the control lines. The apparatus further includes a controller connected to the multiplexer. The controller has an input interface and is operative to receive control data on the input interface that identifies a device port on the apparatus that should be connected to the host port. In response to receiving such control data, the controller is operative to place signals on the control lines that cause the multiplexer to connect the identified device port to the host port.

Abstract: A semiconductor device coupled to input/output pins includes a first core to operate a first function and a second core to operate a second function. A multiplexer is arranged to set the input/output pins to the first function or to the second function, and an arbiter is configured to receive requests from the cores to use the input/output pins and to grant use of the input/output pins to a selected core. A register is arranged to store a value indicative of a delay to be applied by the arbiter when granting use of the input/output pins to the second core.

Abstract: In one embodiment, the present invention includes a method for selecting first data received in a first die of a multi-chip package (MCP) from a second die of the MCP via an intra-package link for output from a selector during a first clock period of a first clock signal, selecting second data transmitted from the second die to the first die for output from the selector during a second clock period, and transmitting the first and second data from the MCP via an external link. Other embodiments are described and claimed.

Abstract: An apparatus includes a socket, a computer-readable medium, and a controller. The socket is capable of interfacing with different types of storage medium. The computer-readable medium is operable for storing a computer-executable universal driver associated with a first operation mode and compatible with each of the types of storage medium, and for storing a computer-executable dedicated driver associated with a second operation mode and compatible with only a subset of the types of storage medium. The controller is operable for selecting a selected driver from the universal driver and the dedicated driver if a storage medium is inserted into the socket and for operating in a corresponding operation mode to exchange data information with the storage medium according to the selected driver. The selected driver includes the dedicated driver if the storage medium is a member of the subset and otherwise the selected driver includes the universal driver.

Abstract: A buffer is associated with each of a plurality of data lanes of a multi-lane serial data bus. Data words are timed through the buffers of active ones of the data lanes. Words timed through buffers of active data lanes are merged onto a parallel bus such that data words from each of the active data lanes are merged onto the parallel bus in a pre-defined repeating sequence of data lanes. This approach allows other, non-active, data lanes to remain in a power conservation state.

Abstract: Described embodiments provide a transceiver for transferring data between a media controller and a host device through a communication link. The transceiver includes a first interrupt generator configured to i) generate a first interrupt when a command is received from the host device and ii) provide the received command to a receive buffer. A command processing module i) retrieves the received command from the receive buffer, ii) processes the received command, and iii) provides data request data in response to the received command to a transmit buffer. A datagram generator is configured to provide datagram data to the transmit buffer and a second interrupt generator is configured to generate a second interrupt when data in the transmit buffer is ready for transmission. The transmit buffer interleaves i) the data request data in response to the received command and ii) the datagram data, when provided to the communication link.

Abstract: A method and structure for determining when a frame of information comprised of one or more buffers of data being transmitted in a network processor has completed transmission is provided. The network processor includes several control blocks, one for each data buffer, each containing control information linking one buffer to another. Each control block has a last bit feature which is a single bit settable to “one” or “zero” and indicates when the data buffer having the last bit is transmitted. The last bit is in a first position when an additional data buffer is to be chained to a previous data buffer indicating an additional data buffer is to be transmitted and a second position when no additional data buffer is to be chained to a previous data buffer. The position of the last bit is communicated to the network processor indicating the ending of a particular frame.

Abstract: An analog/digital switching circuit for connecting a primary electronic device to a peripheral electronic device, including D+ and D? signal lines connected to a primary electronic device, a first analog/digital switch connected to the D+ signal line, for multiplexing an input D+ signal to an output USB data signal or audio left or right signal, the multiplexed signal feeding into a peripheral device connector for connecting the primary device to a peripheral electronic device, a second analog/digital switch connected to the D? signal line, for multiplexing an input D? signal to an output USB data signal or audio right or left signal, the multiplexed signal feeding into the peripheral device connector, a headset left signal line connected to the primary device and to the output audio left signal of the first analog/digital switch, a headset right signal line connected to the primary device and to the output audio right signal of the second analog/digital switch, a first USB signal line connected to a USB conn

Abstract: An auxiliary processing state of a computing device provides an auxiliary display within a primary display device of the computing device. As such, a computing device can switch from a primary processing state (e.g., full power, full operating system, full functionality) to an auxiliary processing state and yet still provide a user interface through the primary display device. The auxiliary processing state may employ a different processor than the primary processing state. Alternatively, auxiliary processing state and the primary processing state may employ different processing modes of the same processor. Transitions between the auxiliary display of the auxiliary processing state and the primary display of the primary processing state may be transitioned to preserve some consistency between the two displays.

Abstract: A communication interface device, system, method, and design structure for providing dynamic segment sparing and repair in a memory system. The communication interface device includes drive-side switching logic including driver multiplexers to select driver data for transmitting on link segments of a bus, and receive-side switching logic including receiver multiplexers to select received data from the link segments of the bus. The bus includes multiple data link segments, a clock link segment, and at least two spare link segments selectable by the drive-side switching logic and the receive-side switching logic to replace one or more of the data link segments and the clock link segment.

Abstract: Apparatus, methods, systems, and computer-readable media are provided for remotely controlling the connection between a host computer and a multitude of connected devices. One apparatus described herein includes a multiplexer that has a host port for connection to a host computer, device ports for connection to the devices, and control lines. The multiplexer is operative to connect a device port to the host port based upon the status of the control lines. The apparatus further includes a controller connected to the multiplexer. The controller has an input interface and is operative to receive control data on the input interface that identifies a device port on the apparatus that should be connected to the host port. In response to receiving such control data, the controller is operative to place signals on the control lines that cause the multiplexer to connect the identified device port to the host port.