Abstract: A processor saves micro-architectural contexts to increase the efficiency of code execution and power management. A save instruction is executed to store a micro-architectural state and an architectural state of a processor in a common buffer of a memory upon a context switch that suspends the execution of a process. The micro-architectural state contains performance data resulting from the execution of the process. A restore instruction is executed to retrieve the micro-architectural state and the architectural state from the common buffer upon a resumed execution of the process. Power management hardware then uses the micro-architectural state as an intermediate starting point for the resumed execution.

Abstract: The present disclosure describes methods and systems for measuring crosswind speed by optical measurement of laser scintillation. One method includes projecting radiation into a medium, receiving, over time, with a photodetector receiver, a plurality of scintillation patterns of scattered radiation, comparing cumulative a radiation intensity for each received scintillation pattern of the received plurality of scintillation patterns, and measuring a cumulative weighted average cross-movement within the medium using the compared cumulative radiation intensities.

Abstract: Solid state drives may include a controller, a mapping table and a buffer memory. The controller provides a logical address of associated data through a first input-output unit at a first speed and provides the associated data through a second input-output unit at a second speed. The controller may be connected to the first input-output unit and the second input-output unit. The mapping table may be connected to the controller through the first input-output unit. The buffer memory may be connected to the controller through the second input-output unit. The first input-output unit may be physically separated from the second input-output unit. The first speed may be different from the second speed.

Abstract: An integrated circuit device or devices is presented that include internal connection ports to transmit data to or receive data from a first portion of the integrated circuit device. The integrated circuit device(s) also include external connection ports to transmit data to or receive data from outside the integrated circuit device, such as between integrated circuit devices. The integrated circuit device also includes remapping circuitry that remaps from a first connection between a first internal connection port of the internal connection ports and a first external connection port of the external connection ports to a second connection between a second internal connection port of the internal connection ports and a second external connection port of the external connection ports.

Abstract: A memory device having a resistance change material and an operating method of the memory device are provided. A memory device includes a memory cell array including first and second resistive memory cells, which store different data according to the change of their resistance; a buffer including first and second storage regions corresponding to the first and second resistive memory cells, respectively; and a control circuit receiving program data to be programmed to the memory cell array, comparing first data stored in the first storage region and second data stored in the first resistive memory cell, and as a result of the comparison determining one of the first and second storage regions as a storage region to which to write the program data.

Abstract: A computer includes: first and second connectors; and a data transmission path. The first connector includes: a first connector body to which at least a first module is capable of being attached; and a first electrode portion which is connected with the data transmission path. The first electrode portion is electrically connected with the first module when the first module is attached to the first connector body. The second connector includes: a second connector body to which at least the first module and a second module are alternatively capable of being attached; and a second electrode portion which is connected with the data transmission path. The second electrode portion is electrically connected with the second module when the second module is attached to the second connector body. The second electrode portion is electrically disconnected from the first module when the first module is attached to the second connector body.

Abstract: An electronic equipment chassis in one embodiment comprises a housing having a front portion and a rear portion, at least one row of dual in-line memory modules disposed at one of an upper level and a lower level of the front portion, and a plurality of storage devices arranged in the front portion adjacent the at least one row of dual in-line memory modules. At least a subset of the dual in-line memory modules and the storage devices are configured so as to be removable from the chassis through a vertical plane of the front portion of the housing.

Abstract: Methods and systems for providing a communication system in a controlled environment are disclosed herein. A communication server establishes a communication session between client devices located within a controlled environment, and routes communication data between the client devices via the communication session. In some embodiments, the communication server stores the communication data as confidential communications based on profile information corresponding to the clients associated with the client devices. Further, the communication server manages access to the confidential communications based on profile information associated with the clients, and the subject matter of the confidential communications.

Abstract: Systems and methods for managing content in a flash memory. Content or data in a flash memory is overwritten when the write operation only requires bits to be set. This improves performance of the flash and extends the life of the flash memory.

Abstract: A memory system includes: a first memory device including a first memory and a first memory controller suitable for controlling the first memory to store data; a second memory device including a second memory and a second memory controller suitable for controlling the second memory to store data; and a processor suitable for executing an operating system (OS) and an application, and accessing data storage memory through the first and second memory devices.

Abstract: A multi-mode hybrid memory drive comprises a bulk memory device and a removable cache memory device. A controller of the bulk memory device may be configured to operate the bulk memory device in either a stand-alone mode or a hybrid mode responsive to detecting the removable cache memory device being coupled with a cache port of the bulk memory device. A method of operating a multi-mode hybrid drive may also comprise monitoring a cache port of a bulk memory device to determine a presence of a removable cache memory device, operating the bulk memory device as a stand-alone drive responsive to determining the removable cache memory device is not present, and operating the bulk memory device as a hybrid drive using the removable cache memory device as a data cache responsive to determining the removable cache memory device is present. Additional hybrid memory drives and computer systems are also described.

Abstract: A semiconductor memory device includes a NAND memory including a plurality of blocks, each of which is a unit of data erasing, and a controller. The controller is configured to select an initial value from a group of initial values, based on an address of the NAND memory in which data are to be written, set a value corresponding to the selected initial value to a linear feedback shift register circuit, randomize the data using an output value of the linear feedback shift register circuit, and write the randomized data to the address of the NAND memory. A size of each of the blocks S is smaller than 2n?1 bytes, n being a number of registers included in the linear feedback shift register circuit.

Abstract: A multiple application smart card uses hardware firewalls and an internal communications scheme to isolate applications from different service providers. A first application from a first service provider is stored within a first supplemental security domain of a memory device on the multiple application smart card. A second application from a second service provider is stored within a second SSD of the memory device. A hardware firewall is located between the first and second applications of the first and second SSDs. The hardware firewall prevents direct data access between the first and second applications of the first and second SSDs.

Abstract: A patching system and a patching circuit provide a type of patching entry which can replace several sequential memory positions with hardcoded and dynamically configured assembly instructions, thus injecting a small piece of code. The operation of the injected code can be for any purpose, but as an example may be used to seamlessly redirect the execution flow of a processing unit.

Abstract: A memory device includes a memory component and controller circuitry. The memory component stores data and the controller circuitry receives, from a host electronic device, one or more commands of a memory system protocol. The one or more commands include at least one write command, the write command comprising one or more blocks of data to be stored in the memory component. Further, the one or more commands include metadata, attributes, or both related to the one or more blocks of data. The controller circuitry interprets and executes the one or more commands. Accordingly, the blocks are stored in the memory component. Further, the controller circuitry of the memory device has access to the metadata, attributes or both.

Abstract: The present invention discloses a status displaying device and method thereof for a Solid-State Drive (SSD). The status displaying device may include a non-volatile memory, an emitting unit, a firmware, and a first control unit. A first instruction is generated and transmitted by the firmware. The first instruction is received by the first control unit. The first control unit performs a first operation on the non-volatile memory and controls the emitting unit to have a first emitting behavior according to the first instruction.

Abstract: Access and regulations systems to facilitate safe and secure access of web content by residents of an institutional facility such as a correctional facility includes an administrator workstation to define authorized and prohibited web content and associated secondary restrictions, a resident workstation displaying on a predetermined list of web content, and a server receiving and processing the authorized and prohibited web content and requests made by institutional residents.

Abstract: A non-volatile random access memory (NVRAM) is used in a computer system to enhance support to sleep states. The computer system includes a processor, a non-volatile random access memory (NVRAM) that is byte-rewritable and byte-erasable, and power management (PM) module. A dynamic random access memory (DRAM) provides a portion of system address space. The PM module intercepts a request initiated by an operating system for entry into a sleep state, copies data from the DRAM to the NVRAM, maps the portion of the system address space from the DRAM to the NVRAM, and turns off the DRAM when transitioning into the sleep state. Upon occurrence of a wake event, the PM module returns control to the operating system such that the computer system resumes working state operations without the operating system knowing that the portion of the system address space has been mapped to the NVRAM.

Abstract: In certain information handling system environments, universal serial bus (USB) attached small computer interface (SCSI) protocol (UASP) devices may be connected to a client and redirected to a server or other information handling system. Some operating systems (OS) of a server may not support UASP. Rather than installing non-certified or expensive third party software, a virtual disk enumerator may retrieve the relevant information of the redirected UASP device and determine that all requests to the virtual UASP device must be redirected to the disk stack of the client for processing.

Abstract: A memory device or module selects between alternative command ports. Memory systems with memory modules incorporating such memory devices support point-to-point connectivity and efficient interconnect usage for different numbers of modules. The memory devices and modules can be of programmable data widths. Devices on the same module can be configured select different command ports to facilitate memory threading. Modules can likewise be configured to select different command ports for the same purpose.

Abstract: An object of the present invention is to realize a highly reliable long-life information processor capable of high-speed operation and easy to handle. The processor includes a semiconductor device comprising a nonvolatile memory device including a plurality of overwritable memory cells, and a control circuit device for controlling access to the nonvolatile memory device. The control circuit device sets assignments of second addresses to the nonvolatile memory device independently of first addresses externally supplied, such that the physical disposition of part of the memory cells used for writing of first data to be written externally supplied is one of the first to (N+1)th of every (N+1) memory cells (N: a natural number) at least in one direction.

Abstract: Various embodiments of systems and methods to allow and control simultaneous access and processing by multiple compute elements of multiple data sets stored in multiple memory modules. The compute elements request data to be processed without specifying any particular data sets to be received. Data interfaces receive the data requests from the compute elements, determine which data sets have not yet been served to the compute elements, select data sets to be served from among those that have not yet been served, and fetch these data sets from the memory modules. The process of requesting additional data by the compute elements, selection by the data interfaces of data sets to be served among those that have not yet been served, and providing such data sets by the data interfaces to the compute elements, may continue until all of the data sets have been served to the compute elements.

Abstract: A method is used in retrieving data from data storage systems. A nonvolatile memory module connected to a data storage system is detected. The data storage system uses information stored in the nonvolatile memory module to initiate an action. Based on the information, the action is performed. The action includes retrieving data from the data storage system to the nonvolatile memory module.

Abstract: In providing secure data access, a secure data device receives a data access request to access secured data stored in a storage of the secure data device. A location module of the secure data device calculates a current location of the secure data device. A secure data module of the secure data device compares the current location and a pre-stored location stored in the secure data device. Upon determining that the current location matches the pre-stored location, the secure data module retrieves the secure data from the storage and processes the secure data. The processed secure data is sent as available data in response to the data access request. Upon determining that the current location does not match the pre-stored location, the secure data module retrieves the secure data and processes the secure data in a manner that renders the available data unusable.

Abstract: System and method for allowing a mobile telecom device to use multiple profiles. The system and method includes operating a security function to perform a cryptographic operation on a profile using a cryptography key of the security function thereby producing a cryptographically protected profile, storing the cryptographically protected profile, and activating the cryptographically protected profile by operating the security function to verify that the cryptographically protected profile has been cryptographically protected using the cryptography key of the security function, and upon verifying that the cryptographically protected profile has been protected using the cryptography key of the security function, activating the cryptographically protected profile.

Abstract: A memory DIMM (dual in-line memory module) installation verification system for a server system is provided. The system includes a bank of memory slots including a plurality of memory sockets. The system further includes a circuit including wiring connecting at least one switch to each of the memory sockets with direct connections to respective lights within a bank of lights associated with each of the plurality of memory sockets.

Abstract: A method for accessing signals of a programmable logic device having a functional level and a configuration level at run time when the programmable logic device is executing a predefined configuration. An access to at least one signal value that has a number of bits is requested. The individual bits in the configuration are each located in an address unit with one address offset apiece such that one or more bits of a signal value are located in one address unit. A bitwise access to the requested signal values takes place, wherein the accesses to the individual bits are sorted as a function of the address unit containing the applicable bit in such a manner that the accesses to all bits located in an address unit take place in sequence as a function of the address offset, independently of the signal containing the applicable bit.

Abstract: A portable data-management system may be easily employed with multiple processing devices by eliminating the need to pre-install additional programs, agents, device drivers, or other software components on the hosts. A portable storage device contains software for a data-management application, which receives and processes test data from a meter that measures an analyte. The portable device may employ an interface protocol that makes the portable device immediately compatible with different operating systems and hardware configurations. Once the portable device is connected to the host, the data-management application can be automatically launched. The convenience and portability of a data-management system may be enhanced by integrating advanced data processing and display features with the portable device. The users may access some advanced presentations of health data without having to launch the data-management application on a separate host.

Abstract: An electronic apparatus and a method for resuming from hibernation are disclosed. The electronic apparatus comprises an external storage, a main memory, an image generating circuit and a page moving circuit. The image generating circuit writes pages from the main memory into the external storage to generate a hibernation image file during a hibernation process. The page moving circuit according to the hibernation image file sequentially writes the pages from the external storage back to a continuous page range of the main memory during a resume process. The resume process is later than the hibernation process.

Abstract: A memory module is provided. In one example, the memory module includes a printed circuit board with one or more connectors, and a plurality of multi-chip packaged integrated circuit parts mounted to the printed circuit board. Each of the plurality of multi-chip packaged integrated circuit parts includes an integrated circuit package including a slave memory controller (SMC) die and one or more pairs of (1) a spacer under the slave memory controller die and (2) a flash memory die under the spacer. Each flash memory die is larger than each spacer to provide an opening into a perimeter of the flash memory die to which electrical connections may be made.

Abstract: An endurance parameter value of a non-volatile memory included in a non-volatile dual in-line memory module (NVDIMM) can be monitored and compared against a warning threshold value. In response to the endurance parameter exceeding the warning threshold value, a system alert can be generated, within a host system of the NVDIMM, to inform a system user that the NVDIMM is approaching its end-of-life. If the endurance parameter exceeds a replacement threshold value greater than the warning threshold value, an upgrade process can be initiated. The upgrade process can include copying data from the first non-volatile memory to a volatile memory of the NVDIMM and copying, in response to the first non-volatile memory being replaced with a second non-volatile memory, the data from the volatile memory to the second non-volatile memory.

Abstract: A wireless communicator with direct USB connection, including a communicator module that connects to and disconnects from a jacket, including a communicator storage memory, a modem for wireless communication, and a communicator connector for connecting the communicator module to the jacket, and a jacket for the communicator module, including a USB disk drive, a jacket connector for connecting the jacket to the communicator module, a USB connector for connecting the jacket to a USB host device, and a controller for enabling the USB host device to access both the communicator storage memory and the jacket USB disk drive when the USB host device is connected to the USB connector, and when the communicator module is connected to the jacket via the communicator and jacket connectors.

Abstract: A system can monitor data usage, including an amount of searchable data used and/or a rate at which the searchable data is manipulated, on a storage allocation in a networked environment. The storage allocation can have a quantity/number of partitions, including at least one partition, configured to store the searchable data. The system can detect that the data usage is beyond a specified threshold and then based at least in part on factors such as network traffic, CPU usage, and/or data usage, the system can modify the storage allocation to increase or decrease a size of the partition and/or the quantity of partitions. Network traffic for the storage allocation can be directed away from the portion of the storage allocation being modified. When modifying the storage allocation is complete, the network traffic can be directed to the modified portion of the storage allocation.

Abstract: One embodiment of the present invention provides a system that facilitates storing an image file of a virtual machine on a potentially unprotected flash storage exhibiting sub-optimal non-sequential write performance on a mobile phone. During operation, the system stores in the flash storage data in a log-structured format and in a protected storage meta-data associated with the data stored in the flash storage. The system also checks integrity of the data stored in the flash storage using the meta-data in the protected storage.

Abstract: Various systems and methods can be used to perform backup to tape. For example, one method involves detecting an amount of storage in a tape drive that is available for concurrent access. The method then compares the size of a plurality of backup images to the amount of storage prior to initiating an archive operation. The method then involves adding information identifying a backup image to a list of backup images to be included in an archive operation and performing the archive operation, which involves writing the backup images to tape drive.

Abstract: A storage device 3, such as an SD card, that is coupled to a host device 2, such as a mobile phone, includes a computing environment 8. The computing environment 8 includes an application processing part 6, and a separate interface processing part 7. The application processing part 6 of the computing environment 8 is operable to execute one or more applications on the storage device 3. The interface processing part 7 of the computing environment 8 includes an interface processor that interfaces between a communications protocol used between the host device 2 and the storage device 3, and a communications protocol used by the application processor in the application processing part 6 of the storage device 3. The interface processor communicates with the application processor via interrupts and a shared memory 9.

Abstract: A computer implemented method may include installing a software appliance on a first computer system, the software appliance including database software and a business application. The software appliance may be configured on the first computer system to a predetermined configuration of the business application and the database software. The configured software appliance may be detached from an operating system of the first computing device. The detaching of the software appliance may include collecting metadata associated with the software appliance, the operating system and hardware the first system. The detached software appliance and the metadata may be stored on computer readable medium.

Abstract: A mechanism is described for facilitating power governance of non-volatile memory devices using a power governing mechanism employed at a computing device according to one embodiment of the invention. A method of embodiments of the invention includes maintaining a credit pool having a plurality of credits to be released to a plurality of memory channels associated with a plurality of non-volatile memory devices. The plurality of credits may be used to provide sufficient power to perform memory operations associated with a computing device. The method may further include receiving a credit request having a petition to obtain one or more credits for a memory channel of the plurality of memory channels to facilitate performance of a memory operation, determining whether the one or more credits are available in the credit pool, and retrieving the one or more credits from the credit pool, if the one or more credits are available in the credit pool.

Abstract: Mechanisms are provided, in a Not AND (NAND) flash memory device, for providing hybrid error correction management. A NAND flash memory module and a node controller coupled to the NAND flash memory module are provided along with a hardware logic implemented error correction code (ECC) engine associated with the node controller. The node controller is configured to determine whether an error count is less than or equal to a first threshold number of error bits and, in response to the error count being less than or equal to the first threshold number of error bits, performing correction of the error bits by the hardware logic implemented ECC engine associated with the node controller. The node controller is also configured to forward uncorrected data to a software logic implemented ECC engine, in response to the error count being greater than the first threshold number of error bits.

Abstract: A method of providing secure authentication of a service user at a self-service terminal is described. The method comprises: detecting attempted access by the service user to a restricted function on the self-service terminal; ascertaining if a removable storage device is in communication with the self-service terminal; in the event that a removable storage device is not in communication with the self-service terminal, denying access to the restricted function; in the event that a removable storage device is in communication with the self-service terminal, prompting the service user to enter login credentials. The method further comprises comparing the entered login credentials with access details stored on the removable storage device; denying access to the restricted function if the entered login credentials do not comply with the access details; permitting access to the restricted function if the login credentials do comply with the access details; and storing details relating to the access.

Abstract: An approach to computation of kernel descriptors is accelerated using precomputed tables. In one aspect, a fast algorithm for kernel descriptor computation that takes O(1) operations per pixel in each patch, based on pre-computed kernel values. This speeds up the kernel descriptor features under consideration, to levels that are comparable with D-SIFT and color SIFT, and two orders of magnitude faster than STIP and HoG3D. In some examples, kernel descriptors are applied to extract gradient, flow and texture based features for video analysis. In tests of the approach on a large database of internet videos used in the TRECVID MED 2011 evaluations, the flow based kernel descriptors are up to two orders of magnitude faster than STIP and HoG3D, and also produce significant performance improvements. Further, using features from multiple color planes produces small but consistent gains.

Abstract: Memory devices and methods are described, such as those that include a stack of memory dies and an attached logic die. Method and devices described provide for configuring bandwidth for selected portions of a stack of memory dies. Additional devices, systems, and methods are disclosed.

Abstract: A method, data storage device and computer program product for having multiple users share a single data storage device securely. A data storage device, such as a Universal Serial Bus (USB) key, is plugged into a computing device. A USB controller of the USB key recognizes the computing device and creates an account for the user. The created account is associated with the user as well as associated with the computing device. Data uploaded to the USB key by the user is then associated with the created account. Only that user will be able to view that data on his/her computing device (computing device associated with the created account) unless the user indicates to share that data with other users. Such a process may be repeated each time the USB key is plugged into a different computing device thereby creating multiple accounts associated with multiple computing devices and users.

Abstract: Some of the embodiments of the present disclosure provide a method for programming a flash memory having a plurality of memory blocks, wherein each memory block of the plurality of memory blocks is either a single-level cell (SLC) memory block or a multi-level cell (MLC) memory block, the method comprising assigning a weighting factor to each memory block of the plurality of memory blocks based on whether the memory block is an SLC memory block or an MLC memory block, tracking a number of write-erase cycles for each memory block, and selecting one or more memory blocks for writing data based at least in part on the weighting factor and the tracked number of write-erase cycles of each memory block of the plurality of memory blocks. Other embodiments are also described and claimed.

Abstract: A method, data storage device and computer program product for having multiple users share a single data storage device securely. A data storage device, such as a Universal Serial Bus (USB) key, is plugged into a computing device. A USB controller of the USB key recognizes the computing device and creates an account for the user. The created account is associated with the user as well as associated with the computing device. Data uploaded to the USB key by the user is then associated with the created account. Only that user will be able to view that data on his/her computing device (computing device associated with the created account) unless the user indicates to share that data with other users. Such a process may be repeated each time the USB key is plugged into a different computing device thereby creating multiple accounts associated with multiple computing devices and users.

Abstract: Access and regulations systems to facilitate safe and secure access of web content by residents of an institutional facility such as a correctional facility includes an administrator workstation to define authorized and prohibited web content, a resident workstation displaying on a predetermined list of web content, and a server receiving and processing the authorized and prohibited web content and requests made by institutional residents.

Abstract: In one aspect, data is stored in a solid state memory which includes first and second memory layers. A first assessment is executed to determine whether received data is hot data or cold data. Received data which is assessed as hot data during the first assessment is stored in the first memory layer, and received data which is first assessed as cold data during the first assessment is stored in the second memory layer. Further, a second assessment is executed to determine whether the data stored in the first memory layer is hot data or cold data. Data which is then assessed as cold data during the second assessment is migrated from the first memory layer to the second memory layer.

Abstract: A memory system includes a central processing unit (CPU), a nonvolatile memory electrically coupled to the CPU and a main memory, which is configured to swap an incoming code page for a target code page therein, in response to a first command issued by the CPU. The main memory can be configured to swap the target code page in the main memory to the nonvolatile memory in the event a page capacity of the main memory is at a threshold capacity. The CPU may also be configured to perform a frequency of use analysis on the target code page to determine whether the target code page is to be swapped to the nonvolatile memory or discarded. The incoming code page may be provided by a disk drive storage device and the main memory may be a volatile memory.

Abstract: Embodiments of the present invention provide a system, method and computer program products for memory space management for storage class memory. One embodiment comprises a method for information storage in an information technology environment. The method comprises storing data in a storage class memory (SCM) space, and storing storage management metadata corresponding to said data, in the SCM in a first data structure. The method further includes buffering storage management metadata corresponding to said data, in a main memory in a second data structure.

Abstract: In one aspect, a method of transferring data over a plurality of communication lines is described. A first command is sent from a master device coupled with the communication lines to a first destination slave device coupled with the communication lines instructing the first destination slave device to listen to and write data from the communication lines starting at a first time. A second command is sent from the master device to a second source slave device coupled with the communication lines instructing the second source slave device to read and output first data onto the communication lines starting at or after the first time. In this way, the first data output from the second source slave device beginning at the first time is stored by the first destination slave device beginning at the first time without requiring first transferring the data to the master device or any other device.