Internal Relocation Patents (Class 711/165)
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Patent number: 10437491Abstract: A method of writing data into a memory device is disclosed. The method comprises utilizing a pipeline to process write operations of a first plurality of data words addressed to a memory bank. Further, the method comprises writing a second plurality of data words and associated memory addresses into a cache memory, wherein the cache memory is associated with the memory bank and wherein further each data word of the second plurality of data words is either awaiting write verification associated with the memory bank or is to be re-written into the memory bank. The method also comprises detecting a power down signal and responsive to the power down signal, transferring the second plurality of data words and associated memory addresses from the cache memory into a secure memory storage area reserved in the memory bank. Finally, the method comprises powering down the memory device.Type: GrantFiled: December 27, 2017Date of Patent: October 8, 2019Assignee: Spin Memory, Inc.Inventors: Neal Berger, Benjamin Louie, Mourad El-Baraji, Lester Crudele, Daniel Hillman
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Patent number: 10437677Abstract: A method includes performing, by a storage unit, a rebuild scanning function to identify an encoded data slice in need of rebuilding. The method further includes identifying, by the storage unit, storage units in the set of storage units storing encoded data slices of the set of encoded data slices that are usable for rebuilding the encoded data slice in need of rebuilding. The method further includes selecting, by the storage unit, one of the identified storage units to rebuild the encoded data slice in need of rebuilding based on a selection protocol. The method further includes sending, by the storage unit, a rebuild command to the one of the identified storage units regarding rebuilding the encoded data slice in need of rebuilding, wherein, in accordance with a rebuilding function, the one of the identified storage units rebuilds the encoded data slice in need of rebuilding.Type: GrantFiled: December 14, 2017Date of Patent: October 8, 2019Assignee: PURE STORAGE, INC.Inventor: Jason K. Resch
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Patent number: 10440105Abstract: A method for utilizing a decentralized agreement protocol to rank storage locations in a dispersed storage network (DSN) for data access operations. In response to receiving a DSN access request including data for dispersed storage, a DSN address is determined based, at least in part, on the DSN access request. A storage unit pool including a plurality of storage units is identified, and a resource level selection approach is determined with respect to the storage unit pool. The method continues with requesting and obtaining ranked scoring information for the plurality of storage units in accordance with the resource level selection approach. Based on the ranked scoring information and the resource level selection approach, an information dispersal algorithm (IDA) width number of storage units of the storage unit pool are selected for storage of the data as encoded by the IDA into encoded data slices.Type: GrantFiled: July 17, 2018Date of Patent: October 8, 2019Assignee: PURE STORAGE, INC.Inventors: Ravi V. Khadiwala, Jason K. Resch, Wesley B. Leggette
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Patent number: 10439953Abstract: In accordance with an embodiment, described herein is a system and method for partition migration in a multitenant application server environment. Each resource group, or partition which includes that resource group, can be associated with a virtual target (e.g., virtual host) information that defines a target to which that resource group or partition should be targeted and deployed. A web tier component (e.g., Oracle Traffic Director) includes a routing information, which maps the virtual target for a partition to a corresponding target such as a server or cluster, so that requests for that partition are directed to the appropriate target, for example as part of one or more sessions. When a partition is migrated, session information is replicated between an original target and a new target, and the web tier component provided with a revised routing information, so that subsequent requests for that partition are directed to the new target.Type: GrantFiled: June 23, 2015Date of Patent: October 8, 2019Assignee: ORACLE INTERNATIONAL CORPORATIONInventors: Chanda Patel, Rajiv Mordani, Nazrul Islam, Joseph Dipol, Martin Mares, Trilok Agarwal
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Patent number: 10430346Abstract: A method of accessing a persistent memory over a memory interface is disclosed. In one embodiment, the method includes allocating a virtual address range comprising virtual memory pages to be associated with physical pages of a memory buffer and marking each page table entry associated with the virtual address range as not having a corresponding one of the physical pages of the memory buffer. The method further includes generating a page fault when one or more of the virtual memory pages within the virtual address range is accessed and mapping page table entries of the virtual memory pages to the physical pages of the memory buffer. The method further includes transferring data between a physical page of the persistent memory and one of the physical pages of the memory buffer mapped to a corresponding one of the virtual memory pages.Type: GrantFiled: February 5, 2018Date of Patent: October 1, 2019Assignee: Toshiba Memory CorporationInventors: David Stanely Maxey, Nidish Ramachandra Kamath, Vikas Kumar Agrawal
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Patent number: 10430336Abstract: Systems and methods (including hardware and software) are disclosed where all common RAID storage levels are implemented for multi-queue hardware by isolating RAID stripes to a single central processing unit (CPU) core affinity. Fixed CPU affinity is used for any piece of data that may be modified. Instead of blocking CPUs that must access or modify a piece of data, the request is efficiently moved to the CPU that owns that data. In this manner the system is completely asynchronous, efficient, and scalable.Type: GrantFiled: April 24, 2017Date of Patent: October 1, 2019Assignee: Exten Technologies, Inc.Inventors: Michael Enz, Ashwin Kamath
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Patent number: 10419538Abstract: A method begins by a processing module of a dispersed storage and task (DST) execution unit receiving a data request for execution by the DST execution unit, the data request including a slice name associated with an encoded data slice of the data request. The method continues with the processing module generating a scoring resultant corresponding to each of a plurality of memories of the DST execution unit, in accordance with a ranking function and the slice name. The method continues with the processing module selecting one of the plurality of memories of the DST execution unit in accordance with a mapping function and executing the data request utilizing the one of the plurality of memories of the DST execution unit.Type: GrantFiled: April 26, 2016Date of Patent: September 17, 2019Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Andrew D. Baptist, Joseph M. Kaczmarek, Manish Motwani, Jason K. Resch
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Patent number: 10409787Abstract: In one aspect, a method includes migrating a database object from a source database to a target database, updating a storage of the location of the DB object to be the target database, directly accessing one of the target database and the source database during the migrating and executing, during the migrating, a database command by retrieving the DB object from the other one of the target database and the source database.Type: GrantFiled: December 22, 2015Date of Patent: September 10, 2019Assignee: EMC IP HOLDING COMPANY LLCInventors: Ron Bigman, Assaf Natanzon, Jehuda Shemer, Amit Lieberman, Yana Vaisman, Oded Peer
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Patent number: 10410189Abstract: A payment terminal can have an integrated memory scanning system that has direct access to the memory of the payment terminal. By having direct access to the memory of the payment terminal, the memory scanning system can access information about the operating system and the applications of the payment terminal to determine if the operating system or applications are performing unauthorized or forbidden actions, which may indicate that a fraudulent transaction or tamper attempt is occurring at the payment terminal. The memory scanning system can determine if an unauthorized action is occurring by comparing the information regarding the operating system or applications obtained from the memory to test criteria stored by the memory scanning system. In addition, the memory scanning system can also have a direct communications with a payment server using information from a network stack in memory that can be accessed directly by the memory scanning system.Type: GrantFiled: September 30, 2017Date of Patent: September 10, 2019Assignee: Square, Inc.Inventors: Afshin Rezayee, Mary Kay Bowman, Christopher Rohlf
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Patent number: 10394465Abstract: A semiconductor device includes: a first memory chip including a plurality of first memory regions; a temporary memory chip including a plurality of temporary memory regions; and a control chip suitable for accessing a first access target memory region among the plurality of first memory regions or a first temporary memory region among the plurality of temporary memory regions based on first access information and first temperature readout information corresponding to the plurality of first memory regions.Type: GrantFiled: April 1, 2016Date of Patent: August 27, 2019Assignee: SK hynix Inc.Inventors: Young-Ook Song, Yong-Kee Kwon, Yong-Ju Kim
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Patent number: 10379943Abstract: A background process is configured to periodically scrub a boot storage of a storage controller to ensure operational correctness of the boot storage. One or more foreground processes store a system configuration data of the storage controller in the boot storage of the storage controller. The background process and the one or more foreground processes are executed to meet predetermined performance requirements for the background process and the one or more foreground processes.Type: GrantFiled: December 6, 2016Date of Patent: August 13, 2019Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Matthew G. Borlick, Lokesh M. Gupta, Trung N. Nguyen, Karl A. Nielsen
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Patent number: 10372352Abstract: A memory system is configured for access by a plurality of computer processing units. An address lock bit is configured in a translation table of the memory system. The address lock supports both address lock shared and address lock exclusive functions. A storage manager of an operating system configured to obtain exclusive access to an entry in a DAT table either by obtaining an address space lock exclusive or obtaining an address space lock shared, and setting a lock bit in a DAT entry.Type: GrantFiled: February 23, 2017Date of Patent: August 6, 2019Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Charles E. Mari, Harris M. Morgenstern, Thomas F. Rankin, Peter J. Relson, Elpida Tzortzatos
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Patent number: 10360964Abstract: A method of writing data into a memory device is disclosed. The method comprises utilizing a pipeline to process write operations of a first plurality of data words addressed to a memory bank. The method further comprises writing a second plurality of data words and associated memory addresses into a cache memory, and wherein each data word of the second plurality of data words is associated with a pending operation. Additionally, the method comprises detecting a power up signal and responsive to the power up signal, transferring the second plurality of data words and associated memory addresses from the secure memory storage area to the cache memory. Finally, responsive to the transferring, and before the memory device is powered up, the method comprises processing the second plurality of data words and associated memory addresses from the cache memory to the pipeline for writing data to the memory bank during power up.Type: GrantFiled: December 27, 2017Date of Patent: July 23, 2019Assignee: Spin Memory, Inc.Inventors: Neal Berger, Benjamin Louie, Mourad El-Baraji, Lester Crudele, Daniel Hillman
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Patent number: 10347284Abstract: An implementation of a system disclosed herein provides a method for managing data streams of sequential nature, wherein the method writes the sequential chunks (fragments) directly to an open band in the order these are received from the host and includes determining an end of the incoming data write request related to streaming data and in response to the determination of the end of the incoming data write request related to streaming data, copying remaining data from a current physical band mapped to logical block addresses LBAs related to the data write requests to the allocated (open) band.Type: GrantFiled: August 24, 2017Date of Patent: July 9, 2019Assignee: SEAGATE TECHNOLOGY LLCInventors: Anil Kashyap, Brian T. Edgar
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Patent number: 10318329Abstract: A migration system includes a memory, a physical processor in communication with the memory, a first device, a second device, a first hypervisor at a source location, a second hypervisor at a destination location, a first virtual machine, and a second virtual machine. The first virtual machine includes a guest OS executing on the first hypervisor and a guest driver and the second virtual machine includes the guest OS executing on the second hypervisor and the guest driver. The first and second hypervisors send a request to save a device state to the guest driver in the guest OS executing on the first hypervisor and send a migration notification to the guest OS executing on the second hypervisor. The guest driver saves a state signature in the memory. The guest driver determines a status of the state signature as one of matching the second device and mismatching the second device.Type: GrantFiled: August 9, 2016Date of Patent: June 11, 2019Assignee: RED HAT ISRAEL, LTD.Inventors: Michael Tsirkin, Amnon Ilan
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Patent number: 10310763Abstract: A method for execution by a dispersed storage network (DSN). The method begins by selecting a pillar width number of dispersed storage (DS) units of a DS unit pool for storing data, segmenting the data based on a segmentation scheme to produce a plurality of segments, issuing, for each segment of the plurality of segments, a pillar width number of write slice requests to the pillar width number of DS units, determining that an unfavorable number of write errors have occurred, and for each of the write errors, re-issuing a corresponding write slice request to another DS unit of remaining DS units of the DS unit pool, generating a DSN address for the data based on identities of actual DS units utilized, and updating at least one of a DSN index and a DSN directory to associate the DSN address with a data identifier of the data.Type: GrantFiled: November 27, 2017Date of Patent: June 4, 2019Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Asimuddin Kazi, Jason K. Resch
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Patent number: 10313830Abstract: An information processing device according to the present application includes an acquisition unit and a determination unit. The acquisition unit acquires time-series position information acquired by a terminal device. The determination unit determines whether relation between one or more pieces of interest position information included in the time-series position information acquired by the acquisition unit and prior or posterior position information in time series satisfies a predetermined criterion, and determines whether to hold the interest position information based on a determination result.Type: GrantFiled: July 10, 2018Date of Patent: June 4, 2019Assignee: YAHOO JAPAN COPRPORATIONInventors: Ryota Namiki, Kota Tsubouchi, Yoshimitsu Sakui
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Patent number: 10298679Abstract: A computing system is disclosed for reassigning ownership of a data object between computing nodes. A first computing node having control of a data object transmits a hand-off message indicating control of the data object is being transferred to a second computing node. The first computing node queues requests received at the first computing node relating to the data item. A third computing node that interacts with the data object receives the hand-off message and, in response, delays transmitting requests relating to the data object. The third computing node transmits an acknowledgment to the first computing node. Upon receipt of the acknowledgment, the first computing node communicates to the second computing node to assume ownership and transmits any requests that had queued at the first node. When the second computing node receives the message, it transmits a message claiming control of the data object.Type: GrantFiled: September 18, 2015Date of Patent: May 21, 2019Assignee: Amazon Technologies, Inc.Inventors: Pablo Puo Hen Cheng, Rosen Ognyanov Baklov, Jesse Aaron Van Beurden, Igor Gorelik
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Patent number: 10289340Abstract: Systems, methods and/or devices are used to coalesce metadata and data writes via write serialization with device-level address remapping. In one aspect, a method of managing a storage system having one or more storage devices includes a serialized write operation to the storage system, in which a serialization segment accumulates data objects and mapping information until the segment is full, at which time the serialization segment is written to the storage system in a single contiguous write. As a result, the number of I/O operations is decreased from a minimum of two (one to write data and one to write updated mapping information) to a single write operation. Further, if the serialization segment contains existing valid data prior to accumulating data objects and mapping information, the valid data is moved to the beginning of the serialization segment using either a remap or xcopy operation.Type: GrantFiled: February 8, 2017Date of Patent: May 14, 2019Assignee: SANDISK TECHNOLOGIES LLCInventors: Brian W. O'Krafka, Johann George, Vladislav Bolkhovitin, Manavalan Krishnan, Evgeniy Firsov
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Patent number: 10289328Abstract: A method for managing a memory includes: receiving a write request from a host; selecting an internal storage region among a plurality of internal storage regions of the memory based on data characterization information of a data received from a host according to the write request from a host; generating a metadata including the data characterization information of the data according to the write request; and storing the metadata along with the data in the selected internal storage region.Type: GrantFiled: August 23, 2016Date of Patent: May 14, 2019Assignee: SK hynix Inc.Inventors: Hyun-Jun Kim, Joong-Seob Yang
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Patent number: 10282130Abstract: At least one attribute defined by a host is used to identify data and/or a location for a destination portion for relocating data from a source portion to the destination portion. The data is relocated from the source portion to the destination portion in accordance with the identification of the data to be relocated and/or the location for the destination portion, and it is determined if a change was made to relevant data stored in the source portion while relocating the data from the source portion to the destination portion. If a change was made to relevant data stored in the source portion while relocating the data to the destination portion, the changed relevant data is relocated from the source portion to the destination portion.Type: GrantFiled: November 3, 2016Date of Patent: May 7, 2019Assignee: Western Digital Technologies, Inc.Inventors: Albert H. Chen, James N. Malina
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Patent number: 10268405Abstract: A memory interface includes a buffer for storing requests for accessing a volatile memory, which includes at least two ranks of memory cell of a memory channel The memory interface monitors the requests to access each rank in the buffer. Upon detecting from the requests that a given rank of the at least two ranks is to be idle for a time period exceeding a time threshold, the circuitry signals a controller to command the given rank to enter a self-refresh mode independent of a refresh mode of other ranks. The memory interface is coupled to a processor, which executes an operating system (OS) kernel to prioritize memory allocation from a prioritized rank of the at least two ranks over the given rank, and migrates allocated memory blocks from the given rank to the prioritized rank to increase a probability of idleness of the given rank.Type: GrantFiled: October 21, 2016Date of Patent: April 23, 2019Assignee: MediaTek, Inc.Inventors: Chia-Lin Lu, Min-Hua Chen
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Patent number: 10262702Abstract: The system contains at least one basic block formed by a first multiplexer having an output is connected to a flag register memory, implemented as a LUT table. An output of a circuit for write permit to the memory is connected to the input of the write signal to the memory, which is further equipped with the clock signal input and the data input. The data output from the memory of each basic block is connected to a masking block relevant for the given basic block. The outputs of these masking blocks are connected to the inputs of the second multiplexer, while its output is the output of the system of flags. The input of the control signal for writing to the memory of each basic block is connected to the output of the demultiplexer and to the second input of the masking block for the given basic block.Type: GrantFiled: May 10, 2017Date of Patent: April 16, 2019Assignees: CESNET, ZAJMOVE SDRUZENI PRAVNICKYCH OSOB, CESKE VYSOKE UCENI TECHNICKE V PRAZE, FAKULTA INFORMACNICH TECHNOLOGIIInventors: Matej Bartik, Sven Ubik
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Patent number: 10254994Abstract: A method for migrating data to avoid read disturbance is introduced to contain the following steps: finding a singular physical-block from physical blocks; performing a test read on data of the ith physical page of the singular physical-block; determining whether the data of the ith physical page of the singular physical-block has passed the test read; and when the data of the ith physical page of the singular physical-block has not passed the test read, moving or copying data of the ith physical page and at least one neighboring physical-page of the singular physical-block to an available physical-block.Type: GrantFiled: November 9, 2017Date of Patent: April 9, 2019Assignee: SHANNON SYSTEMS LTD.Inventor: Ting-Kuan Lin
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Patent number: 10241920Abstract: Implementations described and claimed herein provide a coordination of interdependent asynchronous reads. In one implementation, an input/output request for a target data block stored on a block device at a virtual address is received. A highest level indirect block from which the target data block depends in a hierarchical data structure pointing to the virtual address of the target data block is identified. The highest level indirect block is uncached. A context item is recorded to an input/output structure for the highest level indirect block. The context item indicates that an ultimate objective of a read request for the highest level indirect block is to retrieve the target data block. The input/output request is asynchronously reissued for the target data block upon receipt of the read request for the highest level indirect block.Type: GrantFiled: July 28, 2016Date of Patent: March 26, 2019Assignee: ORACLE INTERNATIONAL CORPORATIONInventors: Peter Dunlap, Mark Maybee
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Patent number: 10241718Abstract: Disclosed is a method of analyzing fragmentation of an electronic device, which comprises: receiving information on at least one allocation unit of a memory; and calculating fragmentation ratio information on the basis of the received information on at least one allocation unit.Type: GrantFiled: May 26, 2015Date of Patent: March 26, 2019Assignee: Samsung Electronics Co., LtdInventors: Sungjong Seo, Jongmin Kim
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Patent number: 10235047Abstract: A memory management method implemented by a requesting node includes sending first indication information used for indicating a length of memory required by the requesting node and receiving second indication information used for indicating first remote memory provided to the requesting node by a target contributing node in at least one contributing node that can provide remote memory. The method also includes determining, from available virtual addresses, a first virtual address corresponding to the first remote memory, and sending a first data read/write instruction for the first data when first data whose pointer is within a range of the first virtual address needs to be read/written, where the first data read/write instruction includes third indication information, and the third indication information is used for indicating storage space, for storing the first data, in the first remote memory.Type: GrantFiled: March 5, 2018Date of Patent: March 19, 2019Assignee: HUAWEI TECHNOLOGIES CO., LTD.Inventors: Lixin Zhang, Rui Hou, Ke Zhang, Tao Jiang
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Patent number: 10235290Abstract: Systems, apparatuses, and methods for sorting memory pages in a multi-level heterogeneous memory architecture. The system may classify pages into a first “hot” category or a second “cold” category. The system may attempt to place the “hot” pages into the memory level(s) closest to the systems' processor cores. The system may track parameters associated with each page, with the parameters including number of accesses, types of accesses, power consumed per access, temperature, wearability, and/or other parameters. Based on these parameters, the system may generate a score for each page. Then, the system may compare the score of each page to a threshold. If the score of a given page is greater than the threshold, the given page may be designated as “hot”. If the score of the given page is less than the threshold, the given page may be designated as “cold”.Type: GrantFiled: June 26, 2015Date of Patent: March 19, 2019Assignee: Advanced Micro Devices, Inc.Inventors: Sergey Blagodurov, Gabriel H. Loh, Mitesh R. Meswani
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Patent number: 10228947Abstract: Methods, systems, and apparatus, including an apparatus for processing an instruction for accessing a N-dimensional tensor, the apparatus including multiple tensor index elements and multiple dimension multiplier elements, where each of the dimension multiplier elements has a corresponding tensor index element. The apparatus includes one or more processors configured to obtain an instruction to access a particular element of a N-dimensional tensor, where the N-dimensional tensor has multiple elements arranged across each of the N dimensions, and where N is an integer that is equal to or greater than one; determine, using one or more tensor index elements of the multiple tensor index elements and one or more dimension multiplier elements of the multiple dimension multiplier elements, an address of the particular element; and output data indicating the determined address for accessing the particular element of the N-dimensional tensor.Type: GrantFiled: December 15, 2017Date of Patent: March 12, 2019Assignee: Google LLCInventors: Dong Hyuk Woo, Andrew Everett Phelps
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Patent number: 10223368Abstract: In one general embodiment, a computer-implemented method is provided. The computer-implemented method includes identifying a first object in a tiered storage system, and identifying first metadata associated with the first object. The computer-implemented method also includes identifying a second object utilizing the first metadata of the first object. The second object is associated with second metadata. Moreover, the computer-implemented method includes, in response to an access of the first object, modifying a heat value associated with the second object.Type: GrantFiled: December 17, 2015Date of Patent: March 5, 2019Assignee: International Business Machines CorporationInventors: Nilesh Prabhakar Bhosale, Dean Hildebrand, William W. Owen, Sandeep R. Patil
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Patent number: 10216418Abstract: Embodiments of the inventive concept improve performance, energy efficiency, and capacity of storage solutions, for example, by reducing the data movement between the CPU and the storage device and increasing the available capacity of the underlying storage devices via in-storage support for data compaction. Embodiments include a storage apparatus and method for autonomous in-storage space compaction initiated by a host-side command and according to metadata specified by a host. A space compact engine can function as an independent module or logic section within a storage device, which can migrate data within the storage device, thereby freeing up capacity and making preexisting data more compact. The space compact engine can cause self compact operations, self compact and trim operations, move and compact operations, and/or merge and compact operations. The space compact engine can notify the host of the completion of the operations.Type: GrantFiled: September 23, 2015Date of Patent: February 26, 2019Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Inseok Stephen Choi, Yang Seok Ki, Sheng Qiu
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Patent number: 10210067Abstract: A mapping apparatus comprises a mapper that translates from an input key to an output key in one or more storage devices. A pre-mapper for processing update operations comprises a plurality of mapping tablets and an in-memory look-up filter to identify a given mapping table storing a given input key. The mapping tablets comprise at least one dynamic in-memory ingress tablet and a plurality of persisted frozen tablets. For a given update operation, a first entry is added to one dynamic in-memory ingress tablet comprising the input key for the given update operation and a corresponding output key where data for the given update operation is stored; and a second entry is added to the look-up filter comprising the input key of the first entry and an identifier of the dynamic in-memory ingress tablet storing the first entry for the given update operation. The dynamic in-memory ingress tablet is persisted as a persisted frozen tablet.Type: GrantFiled: July 28, 2017Date of Patent: February 19, 2019Assignee: EMC IP Holding Company LLCInventor: Joris Wils
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Patent number: 10203874Abstract: A technique for managing temporal data placement in data storage systems is disclosed. An application program interface (API) is provided, where a host application is configured to communicate sub-LUN data segment location, application configuration tiering, and timing parameter information to the API. The sub-LUN data segment location, application configuration tiering, and timing parameter information is transmitted to the data storage system via an out-of-band communications path. The sub-LUN data segment location, application configuration tiering, and timing parameter information is received at the data storage system and associated with the corresponding LUN. A timing estimate for implementing sub-LUN data segment relocation is generated based on system derived tiering information and recent relocation timing information.Type: GrantFiled: September 30, 2015Date of Patent: February 12, 2019Assignee: EMC IP Holding Company LLCInventors: Dennis Thomas Duprey, Qin Tao, Xiaoye Jiang, Khang Can
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Patent number: 10198211Abstract: A hybrid memory system may include: a volatile memory; a nonvolatile memory; and a memory controller configured to a threshold value for a read-to-write ratio according to a refresh interval of the volatile memory, and to perform migration of a page between the volatile memory and the nonvolatile memory based on the threshold value and a read-to-write ratio of the page.Type: GrantFiled: September 12, 2017Date of Patent: February 5, 2019Assignees: SK HYNIX INC., KOREA UNIVERSITY RESEARCH AND BUSINESS FOUNDATIONInventors: Sung Woo Chung, Young Ho Gong, Jae Hoon Chung, Hoon Hee Cho
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Patent number: 10191693Abstract: A system, method, and apparatus are provided for performing update operations on variable-length data records stored and indexed to facilitate reverse reading. Each record contains a key offset for each key field, and the key offset stores a reference (e.g., an offset) to the next most recently stored record that has the same value for the key. Key offsets of a new set of records are configured based on the data index and an assumed write location (e.g., an end offset of the data). The data repository is locked and, if no other intervening records were stored, the new ones are written, the index is updated, and the lock is released. If intervening records were stored, the new set of records is adjusted further based on the current index and the current write location, the records are stored, the index is updated, and the lock is released.Type: GrantFiled: October 14, 2016Date of Patent: January 29, 2019Assignee: Microsoft Technology Licensing, LLCInventor: Sanjay Sachdev
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Patent number: 10169042Abstract: A memory device performing an internal copy operation is provided. The memory device may receive a source address, a destination address, and page size information together with an internal copy command, compares the source address with the destination address, and performs an internal copy operation. The internal copy operation may be an internal block copy operation, an inter-bank copy operation, or an internal bank copy operation. The internal copy operation may be performed with respect to one-page data, half-page data, or quarter-page data, based on the page size information. The memory device may output as a flag signal a copy-done signal indicating that the internal copy operation has been completed.Type: GrantFiled: September 14, 2015Date of Patent: January 1, 2019Assignee: Samsung Electronics Co., Ltd.Inventors: Young-soo Sohn, Sei-jin Kim, Kwang-il Park, Tae-young Kim, Chul-woo Park
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Patent number: 10157184Abstract: Techniques for providing data preview before recalling large data files are disclosed. In one aspect, a data file is made accessible while being offline by converting the data file from a native format to a preview format, storing the data file in the preview format in a primary storage that is locally available and moving, after the conversion to the preview format, the data file in the native format to a secondary storage. When a viewing request is received for the data file, the data file in the preview format is displayed to fulfill the viewing request.Type: GrantFiled: March 13, 2013Date of Patent: December 18, 2018Assignee: Commvault Systems, Inc.Inventors: Yongtao Liu, Paramasivam Kumarasamy, Prakash Varadharajan
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Patent number: 10152498Abstract: In one aspect, a method includes receiving a read or write command from a requester to read data from or write data to a database, inserting in a status message on a status of the read or write command an identifier to identify technology of storage for the data and providing the status message associated with the read or write command to the requester.Type: GrantFiled: January 14, 2016Date of Patent: December 11, 2018Assignee: EMC CORPORATIONInventors: Arieh Don, Vinay Rao, Gabi Benhanokh, Yaron Dar, Nir Sela
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Patent number: 10140308Abstract: Various embodiments for processing data in a data deduplication system are provided. For data segments previously deduplicated by the data deduplication system, a supplemental hot-read link is established for those of the data segments determined to be read on at least one of a frequent and recently used basis. Other system and computer program product embodiments are disclosed and provide related advantages.Type: GrantFiled: March 6, 2012Date of Patent: November 27, 2018Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Allen Keith Bates, Louie Arthur Dickens, Stephen Leonard Schwartz, Daniel James Winarski
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Patent number: 10133748Abstract: Various embodiments for processing data in a data deduplication system are provided. In one embodiment, a method for processing such data is disclosed. For data segments previously deduplicated by the data deduplication system, a supplemental hot-read link is established for those of the data segments determined to be read on at least one of a frequent and recently used basis. Other system and computer program product embodiments are disclosed and provide related advantages.Type: GrantFiled: March 12, 2013Date of Patent: November 20, 2018Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Allen K. Bates, Louie A. Dickens, Stephen L. Schwartz, Daniel J. Winarski
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Patent number: 10133638Abstract: Recovery of an in-memory state in a log-structured filesystem using fuzzy checkpoints is disclosed, including: determining a portion of a data structure to checkpoint to a storage unit, wherein the structure is associated with a set of references to locations in persistent storage at which metadata is stored, wherein the portion of the data structure is dynamically determined based at least in part on a size of the data structure and a predetermined number of storage units to be associated with a checkpoint window, wherein the number of storage units to be associated with the checkpoint window is fewer than a total number of storage units associated with the persistent storage; and checkpointing the portion of the data structure to the storage unit.Type: GrantFiled: January 12, 2015Date of Patent: November 20, 2018Assignee: Tintri Inc.Inventors: Sumedh V. Sakdeo, Brandon W. Salmon, Olivier F. Lecomte, Marco J. Zagha
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Patent number: 10108555Abstract: A memory management method includes: providing a hybrid memory comprising a first type memory and a second type memory; providing an inactive list and a read active list for recording in-used pages on the first type memory; providing a write active list for recording in-used pages on the second type memory; allocating a page from the first type memory according to a system request, and inserting the page into the inactive list accordingly; moving the page from the inactive list to the write active list or the read active list in response to two or more successive access operations on the page; and referring the page to a physical address on the second type memory when the page is in the write active list.Type: GrantFiled: December 6, 2016Date of Patent: October 23, 2018Assignee: MACRONIX INTERNATIONAL CO., LTD.Inventors: Yu-Ming Chang, Yuan-Hao Chang, Hsiu-Chang Chen, Tei-Wei Kuo
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Patent number: 10089020Abstract: A memory system may include a memory device including a plurality of pages which include a plurality of memory cells coupled with a plurality of word lines and are stored with data, a plurality of memory blocks in which the pages are included, a plurality of planes which include the memory blocks, and a plurality of memory dies in which the planes are included; and a controller suitable for performing a program operation corresponding to a write command received from a host, at a first point of time, for first memory blocks among the memory blocks, checking program information for the program operation at the first point of time, predicting erase information on the memory blocks in correspondence to the program information, performing an erase operation for second memory blocks among the memory blocks, at a second point of time after the first point of time, in correspondence to the erase information, and performing the program operation for the second memory blocks at a third point of time after the second pType: GrantFiled: January 13, 2017Date of Patent: October 2, 2018Assignee: SK Hynix Inc.Inventor: Jong-Min Lee
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Patent number: 10078663Abstract: An example method of processing a query at a plurality of storage devices includes receiving a dual query from a client and generating a synchronous query and an asynchronous query based on the dual query. The dual query includes a set of conditions for selecting data from a set of database tables. The method further includes sending the synchronous query to a first storage device, sending the asynchronous query to a second storage device, and receiving a result set of the synchronous query. The result set of the synchronous query includes data selected from a set of database records in a set of primary database tables, which is stored in the first storage device and is a subset of the set of database tables. The method further includes marking a database record. A marked database record indicates usage of the data selected from the database record within a time period.Type: GrantFiled: October 29, 2014Date of Patent: September 18, 2018Assignee: Red Hat, Inc.Inventors: Filip Nguyen, Filip Elias
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Patent number: 10073656Abstract: An I/O manager may be configured to service I/O requests pertaining to ephemeral data of a virtual machine using a storage device that is separate from and/or independent of a primary storage resource to which the I/O request is directed. Ephemeral data may be removed from ephemeral storage in response to a removal condition and/or trigger, such as a virtual machine reboot. The I/O manager may manage transfers of ephemeral virtual machine data in response to virtual machines migrating between host computing devices. The I/O manager may be further configured to cache virtual machine data, and/or manage shared file data that is common to two or more virtual machines operating on a host computing device.Type: GrantFiled: April 4, 2014Date of Patent: September 11, 2018Assignee: SANDISK TECHNOLOGIES LLCInventors: Jerene Zhe Yang, Yang Luan, Brent Lim Tze Hao, Vikram Joshi, Michael Brown, Prashanth Radhakrishnan, David Flynn, Bhavesh Mehta
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Patent number: 10073771Abstract: A data storage method and a system thereof are disclosed. The data storage method includes allocating a first logical block and a second logical block, which are mapped to a physical block; the first logical block includes consecutive first logical pages, used to store logical addresses, and the second logical block includes consecutive second logical pages; on executing garbage collection, sequentially and consecutively storing valid logical addresses in second logical pages in the order of the second logical pages according to valid bits; and establishing a one-to-one second mapping relationship between the second logical pages and valid data pages according to the first mapping relationship.Type: GrantFiled: February 25, 2016Date of Patent: September 11, 2018Assignee: ACCELSTOR LTD.Inventors: Shih-Chiang Tsao, Ting-Fang Chien, An-Nan Chang
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Patent number: 10073899Abstract: Techniques are disclosed for automatic data translation in computing systems. Certain techniques are disclosed herein that enable applications to utilize data in optimal formats specific to each application in an effectively transparent manner, removing the burden to perform data format or type checking, conversions, etc. An automatic data translation module (ADTM) is implemented that automatically translates data as it passes between certain applications. In some embodiments, the ADTM receives a first particular format of data from a first application and automatically/transparently converts the first particular format of data into another representation of the same data, but in a second format utilized by a recipient application.Type: GrantFiled: May 18, 2015Date of Patent: September 11, 2018Assignee: ORACLE INTERNATIONAL CORPORATIONInventors: Russell Tempero, Jennifer Pinczes, Robert Lyle Wall
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Patent number: 10067822Abstract: A method for execution by a computing device of a dispersed storage network (DSN), the method beings by obtaining a plurality of sets of encoded data slices for storage in the DSN. The method continues by determining whether to store two or more encoded data slices of the plurality of sets of encoded data slices in alternative memory. When determined to store the two or more encoded data slices in the alternative memory, the method continues by determining a combining protocol regarding the two or more encoded data slices. The method continues by combining, in accordance with the combining protocol, the two or more encoded data slices into at least one combined slice object (CSO) and sending the at least one CSO to the alternative memory and sending remaining encoded data slices of the plurality of sets of encoded data slices to a set of storage units of the DSN.Type: GrantFiled: September 26, 2016Date of Patent: September 4, 2018Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Andrew D. Baptist, Greg R. Dhuse, Ravi V. Khadiwala, Wesley B. Leggette, James L. Lester, Jason K. Resch
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Patent number: 10067945Abstract: A system, method, and computer-readable medium for consolidating all the currently used areas to the beginning of the datafile by performing a datafile reorganization operation. With this consolidation, more space can be recovered from the datafile. More specifically, with the consolidation, because each used area can contain extents related to several different segments, locating all the segments that have extents in a used area and relocate these segments to lower addresses in the datafile can be challenging.Type: GrantFiled: February 24, 2015Date of Patent: September 4, 2018Assignee: QUEST SOFTWARE INC.Inventors: Daniel T. Wood, Jacques R. Kilchoer
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Patent number: 10067673Abstract: A management system receives a job definition condition that defines a migration job corresponding to partial migration that is part of data migration for replacement from a replace source storage system to a replace target storage system. The management system selects one or more source volumes and creates a migration job for the one or more source volumes in accordance with the job definition condition. The migration job is a job in which, for each of the one or more source volumes, a target volume is created in the replace target storage system, and in which data is migrated from each of the one or more source volumes to a corresponding one of the one or more target volumes. The management system executes each of a plurality of migration jobs.Type: GrantFiled: September 29, 2014Date of Patent: September 4, 2018Assignee: Hitachi, Ltd.Inventors: Tetsuya Uehara, Akira Shirasu, Katsutoshi Asaki, Yasufumi Uchiyama