Memory Configuring Patents (Class 711/170)
  • Patent number: 11831714
    Abstract: Disclosed are techniques for programmatically mapping workloads for storage in different classes of a networked computer data storage environment, using a set of rules or data storage hints and properties of the workloads themselves. With the set of data storage hints, metadata sets are assigned to files of the incoming workloads to the networked computer data storage environment based on the properties of the workloads. Then, a target storage class is determined for each file of the workload from the plurality of storage classes present in the networked computer data storage environment. The workload files are then mapped to a logical bucket that is associated with the plurality of storage classes through a shared namespace, with the assigned metadata set for a file cueing the filesystem modules as to which storage class within the logical bucket to direct the various files of the workload to.
    Type: Grant
    Filed: March 16, 2022
    Date of Patent: November 28, 2023
    Assignee: International Business Machines Corporation
    Inventors: Krishnasuri Narayanam, Phani Kumar V. U. Ayyagari, Rahul Rahul, Subhojit Roy, Sasikanth Eda
  • Patent number: 11829297
    Abstract: A clustered storage system includes a plurality of storage devices, each of which contributes a portion of its memory to form a global cache of the clustered storage system that is accessible by the plurality of storage devices. Cache metadata for accessing the global cache may be organized in a multi-layered structure. In one embodiment, multi-layered structure has a first layer first including a first address array, and the first address array include addresses pointing to a plurality of second address arrays in a second layer. Each second address array in the second layer includes addresses, each of which points to data that has been cached in the global cache.
    Type: Grant
    Filed: July 30, 2021
    Date of Patent: November 28, 2023
    Assignee: Huawei Technologies Co., Ltd.
    Inventors: Li Wan, Lili Chen, Hongliang Tang, Ning Wu
  • Patent number: 11829296
    Abstract: Techniques for cache management involve: determining respective elimination scores of a plurality of entries in a cache based at least in part on compression rates of data blocks corresponding to the plurality of entries, the elimination score being proportional to the compression rate; and removing, from the cache, at least one entry with a relatively low elimination score among the plurality of entries. Such techniques are able to optimize the retention and elimination strategies for entries in a cache, thus increasing payoffs for using the cache.
    Type: Grant
    Filed: May 31, 2022
    Date of Patent: November 28, 2023
    Assignee: Dell Products L.P.
    Inventors: Changxu Jiang, Fei Wang
  • Patent number: 11831649
    Abstract: Embodiments are directed towards a system and method for a cloud-based front end that may abstract and enable access to the underlying cloud-hosted elements and objects that may be part of a multi-tenant application, such as a search application. Search objects may be employed to access indexed objects. An amount of indexed data accessible to a user may be based on an index storage limit selected by the user, such that data that exceeds the index storage limit may continue to be indexed. Also, one or more projects can be elastically scaled for a user to provide resources that may meet the specific needs of each project.
    Type: Grant
    Filed: December 5, 2022
    Date of Patent: November 28, 2023
    Assignee: SPLUNK INC.
    Inventors: Robin Kumar Das, Ledio Ago, Declan Gerard Shanaghy, Gaurav Gupta
  • Patent number: 11829628
    Abstract: Described is a system for predictive storage policy selection for a cloud-based storage based on backup monitoring. The system may reduce storage costs incurred by a subscriber of a backup service that leverages a cloud-based storage. The system may monitor backup operations and collect backup statistics associated with the resource requirements of performing a backup to a cloud-based storage. To collect such information, the system may execute a specialized monitoring process that works in conjunction with a backup application and/or server. The collected information may be stored as part of a metadata database associated with the object storage. Accordingly, the system may retrieve the information from the metadata database to predict storage costs associated with performing future backup operations. Based on the predicted storage costs, the system may automatically select an appropriate storage policy.
    Type: Grant
    Filed: September 22, 2021
    Date of Patent: November 28, 2023
    Assignee: EMC IP Holding Company LLC
    Inventors: Shelesh Chopra, Sunil Yadav, Amarendra Behera
  • Patent number: 11829619
    Abstract: Methods and apparatus are provided for arbitrating access to, and usage of, various device resources of a data storage device (DSD) configured for Machine Learning with Low-Power. The data storage device may include a TinyML controller with an artificial intelligence (AI) accelerator integrated with a data storage controller on a system-on-a-chip (SoC). The device resources may be, e.g., storage resources such as random access memory (RAM) devices, non-volatile memory (NVM) arrays, and latches formed on NVM dies of the NVM arrays. The resource arbitration may be based, for example, on parameters pertaining to ML operations performed by an ML controller that includes the AI accelerator, such as a turnaround time of an ML epoch or a stage-wise execution time. The resource arbitration is configured to provide for the efficient interleaving of the ML/AI operations performed by the ML controller and data storage operations performed by the data storage controller.
    Type: Grant
    Filed: November 9, 2021
    Date of Patent: November 28, 2023
    Assignee: Western Digital Technologies, Inc.
    Inventors: Adarsh Sreedhar, Niraj Srimal, Vimal Jain
  • Patent number: 11829623
    Abstract: A system can include a memory device, and a processing device, operatively coupled with the memory device, to perform operations of writing a first portion of data to one or more complete translation units of the memory device using a first number of logical levels per memory cell and writing a second portion of the data to one or more incomplete translation units of the memory device using the first number of logical levels per memory cell. The operations can also include writing a third portion of the data to one or more complete translation units of the memory device using a second number of logical levels per memory cell that exceeds the first number of logical levels per memory cell.
    Type: Grant
    Filed: February 23, 2022
    Date of Patent: November 28, 2023
    Assignee: Micron Technology, Inc.
    Inventors: Kishore Kumar Muchherla, Ashutosh Malshe, Jianmin Huang, Jonathan S. Parry, Xiangang Luo
  • Patent number: 11822800
    Abstract: Provided are a storage system including a host and a storage device, and an operation method of the storage system. The storage device includes a memory controller and a memory device, where an operation method of the memory controller includes receiving from the host a first mode change request for a folder, which is a unit for managing at least one file, and a logical address of the at least one file, and in response to the first mode change request, rewriting to the memory device first data corresponding to the logical address in a second operating mode, and invalidating first data which is existing data already written to correspond to the logical address and the first data in a first operating mode, wherein the first mode change request sets a data operation speed to a high-speed mode for the at least one file included in the folder.
    Type: Grant
    Filed: June 24, 2022
    Date of Patent: November 21, 2023
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Hyunkyo Oh, Sanghyun Choi, Heewon Lee
  • Patent number: 11822787
    Abstract: The present invention is directed to realize a QoS function in the unit of a virtual volume group existing over a plurality of storage apparatuses. A management system of a storage system forms a virtual volume group by using a plurality of volumes provided by a plurality of storage apparatuses. In the virtual volume group, a QoS setting value including a data input/output amount is set. IO processing ability provided from each of the volumes to the virtual volume group is set so as to satisfy the QoS setting value. The management system sets the IC processing ability provided from each of the volumes to the virtual volume group on the basis of operation information of each of the volumes.
    Type: Grant
    Filed: March 11, 2022
    Date of Patent: November 21, 2023
    Assignee: Hitachi, Ltd.
    Inventors: Kenta Sato, Kazuei Hironaka, Takanobu Suzuki, Akira Deguchi
  • Patent number: 11823728
    Abstract: In an embodiment, a memory controller in an integrated circuit may generate refreshes for one or more DRAMs coupled to the integrated circuit according to a refresh rate. The integrated circuit may include one or more temperature sensors. A rate of change of the temperature may be determined from the temperature sensors. If the rate is greater than a threshold, the memory controller may generate refreshes according to a refresh rate specified by the DRAMs. If the rate is less than the threshold, the memory controller may generate refreshes at a reduced refresh rate.
    Type: Grant
    Filed: March 4, 2022
    Date of Patent: November 21, 2023
    Assignee: Apple Inc.
    Inventors: Liang Deng, Norman J. Rohrer, Yizhang Yang, Arpit Mittal
  • Patent number: 11816032
    Abstract: A method includes determining, by a level one (L1) controller, to change a size of a L1 main cache; servicing, by the L1 controller, pending read requests and pending write requests from a central processing unit (CPU) core; stalling, by the L1 controller, new read requests and new write requests from the CPU core; writing back and invalidating, by the L1 controller, the L1 main cache. The method also includes receiving, by a level two (L2) controller, an indication that the L1 main cache has been invalidated and, in response, flushing a pipeline of the L2 controller; in response to the pipeline being flushed, stalling, by the L2 controller, requests received from any master; reinitializing, by the L2 controller, a shadow L1 main cache. Reinitializing includes clearing previous contents of the shadow L1 main cache and changing the size of the shadow L1 main cache.
    Type: Grant
    Filed: April 25, 2022
    Date of Patent: November 14, 2023
    Assignee: Texas Instruments Incorporated
    Inventors: Abhijeet Ashok Chachad, Naveen Bhoria, David Matthew Thompson, Neelima Muralidharan
  • Patent number: 11816337
    Abstract: A storage system includes one or more data storage devices, a PCIe switch coupled to the one or more data storage devices, and a controller unit coupled to the PCIe switch. The controller unit includes a dynamic random access memory (DRAM) host memory buffer (HMB) controller and a DRAM pool or a controller memory buffer (CMB) controller, a root complex/port, and the DRAM pool. The DRAM pool includes one or more DRAM devices. The one or more data storage devices are configured to interact with the controller unit and store data to a DRAM of the DRAM pool of the controller unit.
    Type: Grant
    Filed: December 6, 2021
    Date of Patent: November 14, 2023
    Assignee: Western Digital Technologies, Inc.
    Inventors: Judah Gamliel Hahn, Avichay Haim Hodes, Shay Benisty, Michael James
  • Patent number: 11809728
    Abstract: Systems and methods for storing data in an intermediate format for storing, converting the intermediate data format into a production data format of two data volumes, and merging the two data volumes into one data volume.
    Type: Grant
    Filed: January 17, 2019
    Date of Patent: November 7, 2023
    Assignee: Snyk Sweden AB
    Inventors: Julian Coccia, Daniel Akerud
  • Patent number: 11809379
    Abstract: Embodiments of the present disclosure include a computer-implemented method, a computer program product, and a system for storing data based, at least partially, on the deduplication rates of a storage system within a storage environment. The computer-implemented method includes receiving data to be stored in a storage environment, computing a hash for the received data, and querying storage deduplication agents for statuses of storage systems within the storage environment. The computer-implemented method also includes receiving deduplication rates and hash tables relating to the storage systems from the storage deduplication agents. The computer-implemented method further includes analyzing stored data stored on the storage systems using the deduplication rates and the hash tables and comparing the stored data to the received data.
    Type: Grant
    Filed: November 19, 2019
    Date of Patent: November 7, 2023
    Assignee: International Business Machines Corporation
    Inventors: Harry R. McGregor, Shazad Naviwala, Dessa Simpson, Christopher B. Moore
  • Patent number: 11809736
    Abstract: A storage system determines a memory fragmentation level for each of a plurality of logical block address ranges. The memory fragmentation level for a given logical block address range is determined according to the number of memory senses required to read that logical block address range in its current state of fragmentation and the number of memory senses required to read that logical block address range assuming no fragmentation. The memory fragmentation level correlates to the sequential read performance for that logical block address range in that an increase in the memory fragmentation level results in a decrease in sequential read performance.
    Type: Grant
    Filed: December 21, 2021
    Date of Patent: November 7, 2023
    Assignee: Western Digital Technologies, Inc.
    Inventors: Einav Zilberstein, Hadas Oshinsky, Maayan Suliman, Karin Inbar
  • Patent number: 11809273
    Abstract: The present invention provides a method for detecting a flash memory module and an associated SoC. The method reads data in a flash memory module with a specific data format, and then determining a plurality of characteristic parameters of the flash memory module and a size of a page by decoding and checking the data. Therefore, the SoC does not need to design a one-time-programmable memory or strap pins, so as to reduce the manufacturing cost of the SoC.
    Type: Grant
    Filed: April 1, 2022
    Date of Patent: November 7, 2023
    Assignee: Realtek Semiconductor Corp.
    Inventors: Jia-Jhe Li, Chia-Liang Hung
  • Patent number: 11809905
    Abstract: One embodiment provides for a general-purpose graphics processing unit comprising a set of processing elements to execute one or more thread groups of a second kernel to be executed by the general-purpose graphics processor, an on-chip memory coupled to the set of processing elements, and a scheduler coupled with the set of processing elements, the scheduler to schedule the thread groups of the kernel to the set of processing elements, wherein the scheduler is to schedule a thread group of the second kernel to execute subsequent to a thread group of a first kernel, the thread group of the second kernel configured to access a region of the on-chip memory that contains data written by the thread group of the first kernel in response to a determination that the second kernel is dependent upon the first kernel.
    Type: Grant
    Filed: September 13, 2021
    Date of Patent: November 7, 2023
    Assignee: Intel Corporation
    Inventors: Valentin Andrei, Aravindh Anantaraman, Abhishek R. Appu, Nicolas C. Galoppo von Borries, Altug Koker, SungYe Kim, Elmoustapha Ould-Ahmed-Vall, Mike Macpherson, Subramaniam Maiyuran, Vasanth Ranganathan, Joydeep Ray, Varghese George
  • Patent number: 11803443
    Abstract: A storage apparatus includes a plurality of drives and has a parity group constituted by a plurality of drives. The storage apparatus stores a hash management table to manage hash values of a prescribed data unit of data of the drives constituting the parity group and a hash value of a prescribed data unit of data stored in another drive other than the drives constituting the parity group. A processor is configured to determine whether a same data unit as a data unit included in data stored in a replacement target drive exists in the other drive on a basis of the hash values, and copy the same data unit of the other drive to a replacement destination drive when the same data unit exists.
    Type: Grant
    Filed: March 10, 2022
    Date of Patent: October 31, 2023
    Assignee: HITACHI, LTD.
    Inventor: Shota Fujita
  • Patent number: 11803338
    Abstract: Executing a machine learning model in an artificial intelligence infrastructure that includes one or more storage systems and one or more graphical processing unit (‘GPU’) servers, including: receiving, by a graphical processing unit (‘GPU’) server, a dataset transformed by a storage system that is external to the GPU server; and executing, by the GPU server, one or more machine learning algorithms using the transformed dataset as input.
    Type: Grant
    Filed: November 30, 2021
    Date of Patent: October 31, 2023
    Assignee: PURE STORAGE, INC.
    Inventors: Brian Gold, Emily Potyraj, Ivan Jibaja, Igor Ostrovsky, Roy Kim
  • Patent number: 11803317
    Abstract: A method for executing operation requests includes formatting one or more storage devices and selecting one or more labeled replicas and one or more distinguished replicas, receiving an operation request with respect to a set of data blocks, identifying a preferred replica corresponding to the received operation request, determining whether the replication-pending bits for the preferred replica are set, and executing the received operation request with respect to the corresponding distinguished replica. A method for executing a write operation request additionally includes setting replication-pending bits with respect to the labeled replica, wherein the replication-pending bits indicate an incomplete write request, writing data to both a labeled replica and a distinguished replica, and clearing the replication-pending bits with respect to the labeled replica to indicate the completion of the write operation.
    Type: Grant
    Filed: December 15, 2020
    Date of Patent: October 31, 2023
    Assignee: International Business Machines Corporation
    Inventors: Owen T. Anderson, Felipe Knop, Enci Zhong, Frank Schmuck, Deepavali M. Bhagwat, Hai Zhong Zhou
  • Patent number: 11797344
    Abstract: A system includes a memory for storing a plurality of memory chunks and a processor for executing a plurality of producer threads. A producer thread increases a producer sequence and determines (i) a first chunk identifier associated with the producer sequence of an identified memory chunk and (ii) a position from the producer sequence to offer an item. The producer thread determines a second chunk identifier of a last created/appended memory chunk and determines whether the second chunk identifier is valid (e.g., matches the first chunk identifier). The producer thread reads a current memory chunk and determines whether a third chunk identifier associated with the current memory chunk is valid (e.g., matches the first chunk identifier). The producer thread writes the item into the identified memory chunk at the position.
    Type: Grant
    Filed: October 30, 2020
    Date of Patent: October 24, 2023
    Assignee: Red Hat, Inc.
    Inventor: Francesco Nigro
  • Patent number: 11799894
    Abstract: A method of determining the security condition of a network includes executing an agent program on one or more computerized devices coupled to the network. Each executing agent program executes one or more security tests and reports the results of such tests to a network assessment engine, and the network assessment engine determines an authoritative security test score and a configurable security test score for the network based on a weighted combination of the security test results.
    Type: Grant
    Filed: September 10, 2019
    Date of Patent: October 24, 2023
    Assignee: Avast Software s.r.o.
    Inventors: Alain G. Sauve, Syed Kamran Bilgrami
  • Patent number: 11797560
    Abstract: Methods, Systems, and Apparatuses related to application-based data type selection are described. A processing device perform operations to monitor performance characteristics associated with various applications executed by a host computing device to determine that a threshold performance level has been reached or exceeded. Operations to convert a data type utilized by the various applications from a first format that supports arithmetic operations to a first level of precision to a second format that supports arithmetic operations to a second level of precision can be performed based, at least in part, on the determination.
    Type: Grant
    Filed: June 16, 2020
    Date of Patent: October 24, 2023
    Assignee: Micron Technology, Inc.
    Inventor: Vijay S. Ramesh
  • Patent number: 11799478
    Abstract: A signal transmitting and receiving apparatus including: a first on-die termination circuit connected to a first pin through which a first signal is transmitted or received and, when enabled, the first on-die termination circuit is configured to provide a first termination resistance to a signal line connected to the first pin; a second on-die termination circuit connected to a second pin through which a second signal is transmitted or received and, when enabled, the second on-die termination circuit is configured to provide a second termination resistance to a signal line connected to the second pin; and an on-die termination control circuit configured to independently control an enable time and a disable time of each of the first on-die termination circuit and the second on-die termination circuit.
    Type: Grant
    Filed: October 27, 2022
    Date of Patent: October 24, 2023
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Changkyo Lee, Dongkeon Lee, Jinhoon Jang, Kyungsoo Ha, Kiseok Oh, Kyungryun Kim
  • Patent number: 11797197
    Abstract: Dynamic scaling of a virtual storage system, including: detecting, within one or more virtual components of the virtual storage system, a change in performance; determining, in response to the detected change in performance, a scaling response based on the virtual storage system meeting one or more target performance metrics; and scaling, based on one or more available virtual components of the virtual storage system, up or down such that performance of the virtual storage system is in accordance within the one or more target performance metrics.
    Type: Grant
    Filed: January 30, 2020
    Date of Patent: October 24, 2023
    Assignee: PURE STORAGE, INC.
    Inventors: Ronald Karr, Naveen Neelakantam, Joshua Freilich, Aswin Karumbunathan
  • Patent number: 11789639
    Abstract: A method and an apparatus for screening TB-scale of incremental data. In the present application, according to the memory capacity of the device, the raw data is divided into a plurality of raw data blocks, and the data is cleaned. By adopting a single-block index sorting algorithm, the de-duplicating ordering in the data blocks is completed without dropping operation, and the processed data blocks and a matrix hash index table are respectively generated and saved as initial data after completion. For the subsequent incremental data, the inter-block index-sorting algorithm is adopted, and the processed data blocks and the matrix hash index table are loaded in turn. The data is preliminarily screened on the basis of the matrix hash index table, and an incremental binary search algorithm is used for fine screening. Finally, the indexing and de-duplication screening of all data are completed.
    Type: Grant
    Filed: March 30, 2023
    Date of Patent: October 17, 2023
    Assignee: ZHEJIANG LAB
    Inventors: Hong Zhang, Yuan Liang, Tao Zou, Ruyun Zhang
  • Patent number: 11789611
    Abstract: The disclosed technology relates to managing input-output operation in a zoned storage system includes identifying a first physical zone and a second physical zone within a zoned namespace solid-state drive associated with a logical zone to perform a received write operation. Data to be written in the received write operation is temporarily staged in a zone random write area associated with the identified second physical zone. Based a storage threshold of the zone random write area, a determination is made regarding when to transfer temporarily staged data to be written area to the identified second physical zone. When the storage threshold of the zone random write area determined to have exceeded, temporarily staged data to be written is transferred to the identified second physical zone.
    Type: Grant
    Filed: April 24, 2020
    Date of Patent: October 17, 2023
    Assignee: NETAPP, INC.
    Inventors: Rohit Shankar Singh, Douglas P. Doucette, Abhijeet Prakash Gole, Prathamesh Deshpande
  • Patent number: 11789858
    Abstract: A method for performing a write operation includes selecting, by a host, at least a free write buffer from a plurality of write buffers of a shared memory buffer (SMB) by accessing a cache structure within the SMB for tracking the free write buffer; sending, by the host, at least a logical address accessed from the cache structure with respect to the selected write buffer to issue a write-command to a non-volatile memory; receiving a locking instruction of the selected write buffer from the non-volatile memory; updating a status of the selected write buffer within the cache structure based on the received locking instruction; and allowing the non-volatile memory to extract contents of one or more locked write buffers including the selected write buffer.
    Type: Grant
    Filed: October 1, 2020
    Date of Patent: October 17, 2023
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Saugata Das Purkayastha, Suresh Vishnoi
  • Patent number: 11789917
    Abstract: A storage control system receives a first data block to be written to a primary storage, and generates a content signature for the first data block. The storage control system adds a first entry for the first data block into a persistent deduplication database. The first entry comprises a key which comprises the content signature for the first data block. The persistent deduplication database comprises a tree data structure which comprises elements that are configured to store entries for data blocks. The storage control system merges the entries of at least two elements of the tree data structure to generate a set of merged entries which comprises the first entry for the first data block, and a second entry for a second data block, and commences a deduplication process in response to determining that the first entry and the second entry in the set of merged entries have matching keys.
    Type: Grant
    Filed: January 25, 2022
    Date of Patent: October 17, 2023
    Assignee: Dell Products L.P.
    Inventors: Doron Tal, Yosef Shatsky
  • Patent number: 11782892
    Abstract: Migrating content between enterprise content management systems is described. A source object identifier is identified for metadata tables for content for a source enterprise content management system, based on a migration job definition. The metadata tables are retrieved from the source enterprise content management system, based on the source object identifier. A target object identifier is identified for a target enterprise content management system, based on the metadata tables and the migration job definition. An object identifier map is created that maps the source object identifier to the target object identifier. The metadata tables are stored to the target enterprise content management system, based on the object identifier map. The content for the source enterprise content management system is retrieved. The content is stored as content for the target enterprise content management system.
    Type: Grant
    Filed: September 7, 2021
    Date of Patent: October 10, 2023
    Assignee: Open Text Corporation
    Inventors: Michael T. Mohen, Christopher Dyde
  • Patent number: 11784878
    Abstract: A method for managing a network device that includes a network operating system (NOS) and a third-party network operating system (3PNOS) includes detecting a 3PNOS state change in a 3PNOS database managed by the 3PNOS, translating the 3PNOS state change into a network device state change, storing the network device state change in a state database managed by the NOS, in response to the storing: detecting a change in the state database by a NOS agent executing in the NOS, initiating, in response to detecting the change in the state database, an update to hardware on the network device by the NOS, wherein the 3PNOS does not directly manage the hardware.
    Type: Grant
    Filed: June 16, 2022
    Date of Patent: October 10, 2023
    Assignee: ARISTA NETWORKS, INC.
    Inventors: Gil Adrian Torres, Samuel Angebault
  • Patent number: 11782825
    Abstract: A memory system may include: a nonvolatile memory device; a volatile memory suitable for storing write data; and a controller suitable for: allocating a normal write buffer in the volatile memory when normal write data are inputted, allocating a first write buffer in the volatile memory when first write data, which are grouped into a first transaction and first total size information on a total size of the first transaction, are inputted, allocating a second write buffer in the volatile memory when second write data, which are grouped into a second transaction and second total size information on a total size of the second transaction, are inputted, managing sizes of the first and second write buffers to change them in response to the first and second total size information, respectively, and managing a size of the normal write buffer to fix it to a set size.
    Type: Grant
    Filed: November 1, 2021
    Date of Patent: October 10, 2023
    Assignee: SK hynix Inc.
    Inventor: Hae-Gi Choi
  • Patent number: 11782624
    Abstract: A method of operating a storage system may include allocating a first partition of a tier of storage resources to a first client, wherein the tier operates at least partially as a storage cache, allocating a second partition of the tier of the storage resources to a second client, monitoring a workload of the first client, monitoring a workload of the second client, and reallocating the first partition of the tier of the storage resources to the first client based on the monitored workload of the first client and the monitored workload of the second client. The method may further include reallocating the second partition of the tier of the storage resources to the second client based on the monitored workload of the first client and the monitored workload of the second client.
    Type: Grant
    Filed: February 4, 2021
    Date of Patent: October 10, 2023
    Inventors: Zhengyu Yang, Bridget Molly Davis, Daniel Kim, Jeffrey Chun Hung Wong, Adnan Maruf
  • Patent number: 11782842
    Abstract: In a log based system, a reclamation list of cache pages containing dirty data can be maintained and used. The cached dirty data pages identified by the reclamation list can be candidates for eviction from the cache. A cached dirty data page on the reclamation list can be persistently logged in a transaction log extension having storage allocated from a non-volatile solid state drive (SSD). The reclamation list can include descriptors of the cached dirty data pages prioritized for eviction in accordance with a least recently used (LRU) policy so that the LRU cached dirty data page can be selected for eviction. When a dirty data page which was evicted from the cache is reloaded into cache, the dirty data page can be added to the reclamation list by adding its page descriptor to the reclamation list. A dirty data page can be removed from the reclamation list once flushed.
    Type: Grant
    Filed: April 18, 2022
    Date of Patent: October 10, 2023
    Assignee: Dell Products L.P.
    Inventors: Ami Sabo, Oran Baruch, Vamsi K. Vankamamidi
  • Patent number: 11782826
    Abstract: A memory controller is to store a unique tag at the mid-point address within each of allocated memory portions. In addition to the tag data, additional metadata may be stored at the mid-point address of the memory allocation. For each memory access operation, an encoded pointer contains information indicative of a size of the memory allocation as well as its own tag data. The processor circuitry compares the tag data included in the encoded pointer with the tag data stored in the memory allocation. If the tag data included in the encoded pointer matches the tag data stored in the memory allocation, the memory operation proceeds. If the tag data included in the encoded pointer fails to match the tag data stored in the memory allocation, an error or exception is generated.
    Type: Grant
    Filed: December 1, 2021
    Date of Patent: October 10, 2023
    Assignee: Intel Corporation
    Inventors: David M. Durham, Michael LeMay
  • Patent number: 11776328
    Abstract: Disclosed are systems, methods, and non-transitory computer-readable media for a variable multiplexer for vehicle communication bus compatibility. A device includes a variable multiplexer that can be electronically configured to a desired pinout configuration to provide compatibility with multiple vehicles. For example, the variable multiplexer may be electronically configured based on a pinout configuration used by the vehicle to connect pins in the device to the corresponding pins on the data link connector that provide the same specified function. The device may therefore use a single standardized cable with vehicles using a variety of pinout configurations.
    Type: Grant
    Filed: August 5, 2020
    Date of Patent: October 3, 2023
    Assignee: Samsara Networks Inc.
    Inventors: Xin Yang, Justin Tingao Xiao, Harrison Riley Davis
  • Patent number: 11775426
    Abstract: A memory system includes a memory device including plural memory blocks and a controller configured to perform garbage collection on a victim block among the plural memory blocks. The controller is further configured to stop the garbage collection in response to an interrupt and invalidate a valid data item, which is copied from the victim block to a target block during the garbage collection.
    Type: Grant
    Filed: July 6, 2021
    Date of Patent: October 3, 2023
    Assignee: SK hynix Inc.
    Inventor: Dong Young Seo
  • Patent number: 11775563
    Abstract: Described herein are techniques for improving transfer of metadata from a metadata database to a database stored in a data system, such as a data warehouse. The metadata may be written into the metadata database with a version stamp, which is monotonic increasing register value, and a partition identifier, which can be generated using attribute values of the metadata. A plurality of readers can scan the metadata database based on version stamp and partition identifier values to export the metadata to a cloud storage location. From the cloud storage location, the exported data can be auto ingested into the database, which includes a journal and snapshot table.
    Type: Grant
    Filed: June 30, 2022
    Date of Patent: October 3, 2023
    Assignee: Snowflake Inc.
    Inventors: Dhiraj Gupta, Subramanian Muralidhar
  • Patent number: 11768740
    Abstract: A computer-implemented method, according to one embodiment, is for restoring operation of a data storage system at a disaster recovery site. The computer-implemented method includes: in response to a disaster event occurring at a primary site, receiving an inode list from a cloud storage site, and receiving configuration information from the cloud storage site. The cloud storage site includes a backup copy of data that is stored at the primary site. Moreover, the inode list and the configuration information are used to construct a filesystem at the disaster recovery site. The filesystem at the disaster recovery site does not include a copy of the data that is stored at the primary site, but rather the filesystem includes a plurality of metadata stubs. The filesystem is further used to satisfy I/O commands that are received.
    Type: Grant
    Filed: March 29, 2019
    Date of Patent: September 26, 2023
    Assignee: International Business Machines Corporation
    Inventors: Dileep Dixith, Subramaniyan Nallasivam, Amey Gokhale, Satishreddy Konala
  • Patent number: 11768762
    Abstract: A method for allocating memory in a computing device having a non-volatile main memory is described. The method comprises receiving, by a memory allocator, a request for non-volatile memory allocation of an object from a program executing on the computing device, the request comprising a requested memory size and registration data from the program. The method comprises finding an available address of one of a plurality of portions of a page of the non-volatile memory and searching an active page table in the non-volatile main memory to find the page and if the page is not found in the active page table: inserting the page into the active page table; and waiting for a memory write for inserting the page into the active page table to complete.
    Type: Grant
    Filed: July 7, 2022
    Date of Patent: September 26, 2023
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Aleksandar Dragojevic, Tudor Alexandru David
  • Patent number: 11768719
    Abstract: Examples disclosed herein provide systems, methods, and software for attaching an application to a computing system. In one example, a method of attaching at least one application to the computing system includes identifying an application attach triggering event, and identifying at least one application based on the application attach triggering event. The method further includes attaching an application volume to the computing system that contains the at least one application, and filtering one or more applications from the application volume that are not the at least one application.
    Type: Grant
    Filed: September 17, 2021
    Date of Patent: September 26, 2023
    Assignee: VMware, Inc.
    Inventor: Jairam Choudhary
  • Patent number: 11762808
    Abstract: Technology described herein can perform deletion of a snapshot or portion thereof. In an embodiment, a system can comprise a processor and a memory that stores executable instructions that, when executed by the processor, facilitate performance of operations. The operations can comprise, to delete a snapshot, or a portion of a snapshot, of a real filesystem, reading an inode mapping file (IMF) of the snapshot that indexes a virtual inode number (VIN) corresponding to a real inode. The operations further can comprise identifying the real inode of the snapshot referenced by the VIN, identifying a file object corresponding to the real inode, and deleting the file object from the snapshot.
    Type: Grant
    Filed: October 20, 2021
    Date of Patent: September 19, 2023
    Assignee: EMC IP HOLDING COMPANY LLC
    Inventors: Alexander S. Mathews, Ahsan Rashid, Walter Forrester, Morgan A. Clark, Soumyadeep Sen, Rohit K. Chawla
  • Patent number: 11755373
    Abstract: Techniques for computing and storing object identity hash values are disclosed. In some embodiments, a runtime system generates a value, such as a nonce, that is unique to a particular allocation region within memory. The runtime system may mix the value with one or more seed values that are associated with one or more respective objects stored in the allocation region. The runtime system may obtain object identifiers for the respective objects by applying a hash function to the result of mixing the seed value with at least the value associated with the allocation region. Conditioning operations may also be applied before, during or after the mixing operations to make the values appear more random. The nonce value may be changed from time to time, such as when memory is recycled in the allocation region, to reduce the risk of hash collisions.
    Type: Grant
    Filed: October 7, 2020
    Date of Patent: September 12, 2023
    Assignee: Oracle International Corporation
    Inventors: John Robert Rose, Mikael Vidstedt, Erik Ă–sterlund
  • Patent number: 11748040
    Abstract: A technique extends a storage system that includes a first storage resource pool that is generated using a first plurality of storage devices and based on a first storage array standard. Such a technique involves: adding a second plurality of storage devices to the storage system in response to receiving a request to extend the storage system, the number of the second plurality of storage devices being less than the sum of a first stripe width associated with the first storage array standard and the number of backup storage devices in the first storage resource pool; and creating a second storage resource pool using the second plurality of storage devices and based on a second storage array standard, a second stripe width associated with the second storage array standard being less than the first stripe width. Accordingly, storage space can be extended faster and more effectively.
    Type: Grant
    Filed: May 11, 2022
    Date of Patent: September 5, 2023
    Assignee: EMC IP Holding Company LLC
    Inventors: Sheng Wang, Dapeng Chi, Fang Yuan, Chunhao Ni, Kui Zhai
  • Patent number: 11748381
    Abstract: In some implementations, a device may identify respective sets of unique values for multiple dimensions of a multidimensional data structure. The device may identify a plurality of subsets of permutations of a set of permutations of the unique values. The plurality of subsets of permutations are to be processed in parallel. The device may obtain, based on processing the plurality of subsets of permutations in parallel, respective data associated with each permutation of the plurality of subsets of permutations. The data for a permutation, of the plurality of subsets of permutations, is obtained based on respective unique values for the permutation that are determined independently of another permutation of the plurality of subsets of permutations.
    Type: Grant
    Filed: July 15, 2021
    Date of Patent: September 5, 2023
    Assignee: Capital One Services, LLC
    Inventors: Anil Kumar Vallapureddy, Richard Everson, Seshikanth Bandlapalli, Michael Baker
  • Patent number: 11748002
    Abstract: Methods, systems, and apparatus, including computer programs encoded on computer storage media, for executing concurrent writes to a data store. One of the systems includes a data store comprising a plurality of storage segments, wherein each storage segment comprises a plurality of blocks; and an allocator system comprising: a plurality of threads, and a plurality of bitmaps each corresponding to a respective storage segment of the data store, wherein the allocator system is configured to perform operations comprising: assigning a respective bitmap to each thread of the plurality of threads; and executing, by each thread of the plurality of threads, one or more write requests to one or more blocks of the storage segment corresponding to the thread using the bitmap assigned to the thread, wherein executing a write request by a thread includes updating the bitmap assigned to the thread.
    Type: Grant
    Filed: June 14, 2021
    Date of Patent: September 5, 2023
    Assignee: VMware, Inc.
    Inventors: Aditya Kotwal, Venkata Ramanan, Sandeep Rangaswamy, Brian Caulfield
  • Patent number: 11748030
    Abstract: An illustrative method includes receiving, by an integrated storage manager from an operating system level virtualization service, a request to perform an operation with respect to one or more storage systems; determining, by the integrated storage manager, multiple versions of a performance impact among the one or more storage systems based on potentially implementing the request in multiple ways; and implementing, by the integrated storage manager based on the determining of the multiple versions of the performance impact, the request in a particular way that improves one or more storage system metrics of the one or more storage systems.
    Type: Grant
    Filed: November 17, 2020
    Date of Patent: September 5, 2023
    Assignee: Pure Storage, Inc.
    Inventor: Patrick East
  • Patent number: 11740800
    Abstract: Disclosed in some examples are methods, systems, and machine-readable mediums that provide a memory allocation mechanism that evenly spreads the allocations for an application over all the MCs on the system, thus minimizing congestion and resulting in optimal application performance.
    Type: Grant
    Filed: June 22, 2021
    Date of Patent: August 29, 2023
    Assignee: Micron Technology, Inc.
    Inventors: Patrick Estep, Tony M. Brewer
  • Patent number: 11740921
    Abstract: The technology provides for allocating an available resource in a computing system by bidirectional communication between a hypervisor and a container scheduler in the computing system. The computing system for allocating resources includes one or more processors configured to receive a first scheduling request to initiate a first container on a first virtual machine having a set of resources. A first amount of resources is allocated from the set of resources to the first container on the first virtual machine in response to the first scheduling request. A hypervisor is notified in a host of the first amount of resources allocated to the first container. A second amount of resources from the set of resources is allocated to a second virtual machine in the host. A reduced amount of resources available in the set of resources is determined. A container scheduler is notified by the hypervisor for the reduced amount of resources of the set of resources available on the first virtual machine.
    Type: Grant
    Filed: November 23, 2020
    Date of Patent: August 29, 2023
    Assignee: Google LLC
    Inventor: Jeremy Warner Olmsted-Thompson
  • Patent number: 11740792
    Abstract: A data storage system can use non-volatile solid state drives (SSDs) to provide backend storage. The data storage system and SSDs can implement log structured systems (LSSs) experiencing write amplification (WA). The aggregated WA of the LSSs can be minimized when the WAs of both LSSs of the system and SSDs are equal, within a specified tolerance. An amount of storage capacity which the LSS of the data storage system is allowed to use can be limited and vary based on the system's data capacity denoting the storage capacity with valid data. Pm can denote a percentage of Cs, the advertised capacity of the SSDs, storing valid data. Po can be a percentage of Cs denoting the upper bound of the system's used capacity. Po and Pm, as well as the utilization and WA of both the data storage system and SSDs, can be evaluated and adjusted adaptively and holistically.
    Type: Grant
    Filed: January 4, 2022
    Date of Patent: August 29, 2023
    Assignee: Dell Products L.P.
    Inventors: Shuyu Lee, Vamsi K. Vankamamidi