Abstract: Techniques for a massively parallel and memory centric computing system. The system has a plurality of processing units operably coupled to each other through one or more communication channels. Each of the plurality of processing units has an ISMn interface device. Each of the plurality of ISMn interface devices is coupled to an ISMe endpoint connected to each of the processing units. The system has a plurality of DRAM or Flash memories configured in a disaggregated architecture and one or more switch nodes operably coupling the plurality of DRAM or Flash memories in the disaggregated architecture. The system has a plurality of high speed optical cables configured to communicate at a transmission rate of 100 G or greater to facilitate communication from any one of the plurality of processing units to any one of the plurality of DRAM or Flash memories.

Abstract: A system configuration is provided with multiple partitions that supports different types of address translation structure formats. The configuration may include partitions that use a single level of translation and those that use a nested level of translation. Further, differing types of translation structures may be used. The different partitions are supported by a single hypervisor.

Abstract: The invention relates to an LED light module (1) for a motor vehicle or for a headlamp for a motor vehicle, wherein the light module (1) comprises a lens (2) and at least one primary LED light source (8). A light tunnel (11) for direct passage of at least a portion of the light emitted from the at least one primary LED light sconce (8) is provided between the at least one primary LED light source (8) and the lens (2), viewed in the direction of the light emission. The light of the at least one primary LED light source (8) emerging through the light tunnel (11) is projected via the lens (2) to generate a main beam function or a contribution to a main beam function in the region in front of the motor vehicle. The light tunnel (11) is formed from a material that is transparent at least in some areas, preferably in the whole area thereof, and a holder (3) for holding the light tunnel (11) is provided, wherein the holder (3) is transparent at least in some areas, preferably completely transparent.

Abstract: Eviction priority technologies provide for the prioritized eviction of memory pages from a first memory, such as a DRAM, in a mobile computing device that have been copied from a second memory, such as flash memory. Eviction priority is based on eviction costs for the memory pages. The eviction cost for a page is based on page-in costs, page-out costs, the priority of a process associated with the page, page access probability and combinations thereof. Page-in costs include read costs, fixup costs and decompression costs, and page-out costs include write-back costs and compression costs. Page lists allow for the sorting of pages by page type (e.g., read only, read/write) and can be used to keep track of eviction costs. Pages are evicted from the first memory in order of increasing eviction cost.

Abstract: Systems and programs for improving the efficiency of a sorting process in a computer system are disclosed. Data is provided in an input file external to the central processing unit of the computer system. In one embodiment, the implemented process involves investigating the contents of the input file in order to identify presorted portions thereof; incorporating the identified presorted portions of the input file into a second file external to the central processing unit, performing this step by rearranging directory information, without physically transferring the presorted portions from the input file. In sort processes involving both a string generation phase and a merge phase, the techniques described may be used in either or both phases, as well as in any output phase. Rearranging directory information rather than physically transferring data provides for greater efficiency in disk I/O.

Abstract: In cases where decided that the guaranteed resource capacity for virtual machine cannot be acquired all at one time, the computer system of the present invention decides whether or not resource capacity guaranteed for virtual machine can be continuously acquired by the start of the virtual machine operation, and if decided that the resource capacity can be continuously acquired, the computer system allocates the total acquired resource capacity to the virtual machine deployed on the physical machine.

Abstract: An image coding method includes: deriving a candidate for a motion vector predictor from a co-located motion vector; adding the candidate to a list; selecting the motion vector predictor from the list; and coding a current block and coding a current motion vector, wherein the deriving includes: deriving the candidate by a first derivation scheme in the case of determining that each of a current reference picture and a co-located reference picture is a long-term reference picture; and deriving the candidate by a second derivation scheme in the case of determining that each of the current reference picture and the co-located reference picture is a short-term reference picture.

Abstract: A data writing method for controlling a rewritable non-volatile memory module having physical erasing units is provided. The physical erasing units are grouped into a first buffer area and a second buffer area. A write command instructed to write a data to a first logical address is received. Whether the quantity of the data is smaller than a predetermined value is determined. If so, the data is written into the first buffer area or the second buffer area. If the data is written into the second buffer area, at least one second logical address mapped to at least one physical programing unit in the first buffer area is obtained, and valid data belonging to the second logical address is merged, wherein the number of the second logical address is smaller than a merging threshold. Thereby, the time for a host system to wait for a write success message is shortened.

Abstract: Subject matter disclosed herein relates to a memory device and method of programming same. In some embodiments, a memory device can be programmed by partitioning information into a plurality of chunks. Partitioning can be performed by determining a pattern of logic ones and zeroes, and setting a size of an information chunk based on the pattern of logic ones and zeroes.

Abstract: An image forming apparatus includes a main control unit, a sub control unit, a main storage unit, an auxiliary storage unit, an auxiliary storage load unit, a load-program storage unit, and an external storage load unit. The auxiliary storage load unit is configured to load each of a program to be executed by the main control unit and a program to be executed by the sub control unit stored in the auxiliary storage unit from the auxiliary storage unit to the main storage unit at first activation. The external storage load unit is configured to load the program stored in the external storage medium by the load-program storage unit to the main storage unit at a subsequent activation concurrently with loading the program to be executed by the main control unit from the auxiliary storage unit by the auxiliary storage load unit.

Abstract: The present disclosure includes systems and techniques relating to controlling memory devices with a generic command descriptor. In some implementations, an apparatus, systems, or methods can include a memory controller including an interface configured to connect with a NAND memory device and circuitry configured to receive a descriptor of a command sequence including multiple segments for managing the NAND memory device. The descriptor can include option information corresponding to each segment of the command sequence. The circuitry can also be configured to generate the command sequence for managing the NAND memory device based, at least in part, on the option information of the descriptor.

Abstract: An advanced processor comprises a plurality of multithreaded processor cores each having a data cache and instruction cache. A data switch interconnect is coupled to each of the processor cores and configured to pass information among the processor cores. A messaging network is coupled to each of the processor cores and a plurality of communication ports. In one aspect of an embodiment of the invention, the data switch interconnect is coupled to each of the processor cores by its respective data cache, and the messaging network is coupled to each of the processor cores by its respective message station. Advantages of the invention include the ability to provide high bandwidth communications between computer systems and memory in an efficient and cost-effective manner.

Abstract: Various embodiments of the present invention are related to integrated circuits for processing data at a microcontroller interface. The microcontroller interfaces to a memory. The method is employed to process input data provided by the microcontroller during a memory write operation, or input data extracted from the memory during a memory read operation, respectively. A write/read control is used to indicate the memory write or read operation, and a logic address is translated to at least one physical address in the memory. The write/read control and the logic address are further employed to determine a data process mode. In various data processing modes, the input data are processed according to at least one of a plurality of data processing methods to result in processed data in different data formats. Data in different formats may be stored in various regions of the memory.

Abstract: The deployment and updating of applications and drivers on a client device having a write-filter is described. A first deployment extensible markup language (XML) configuration file is obtained for deploying a first application or driver at the client device. A first application or driver is deployed on the client device based on the first deployment XML configuration file, while the write-filter of the client device is disabled. The write-filter is enablable to prohibit a file stored on the client device with the write-filter enabled from persisting across a reboot of the device. Following the deployment, automatic updating is performed by determining whether an autoupdate is available, obtaining a second deployment XML configuration file for updating the first application or driver, and updating the first application or driver based on the second deployment XML configuration file, while the write-filter is disabled. The automatic updating may be repeated.

Abstract: An embodiment of a manager includes at least one input node configured to receive information regarding a region of an integrated circuit, and a determiner configured to determine, in response to the information, a likelihood that the region will cause an error. For example, the region may include a memory, and contents of the memory may be transferred to another, more reliable memory, if the likelihood that the memory will cause an error in the data that it stores equals or exceeds a likelihood threshold.

Abstract: Embodiments relate to cluster-centric tiered storage with a flexible tier definition to support performance of transactions. Object data is distributed in a multi-tiered shared-nothing cluster. Hierarchical tiers of data storage are assigned different roles within the hierarchy. The tiers are arranged according to a number of cycles required to access a tier. The tiers are managed globally across the cluster and objects are placed in tiers according to a flexible tier definition and the tier arrangement. The probability of object access is computed for objects, and objects are placed on different tiers responsive to the computation and the number of cycles required to access the tier. Objects are moved between tiers responsive to a probability frequency of object access.

Abstract: A method includes determining a reference I/O service time of an I/O operation on a server and measuring, with a processor of the server running a hypervisor configured to manage a plurality of logical partitions (LPARs), each LPAR running one of a plurality of instances of an operating system (O/S), an actual I/O service time of the I/O operation. The method also includes determining, by the processor, a delay time of virtualization on the server based on the reference I/O service time and the actual I/O service time.

Abstract: An exemplary embodiment provides a non-transitory storage medium encoded with a computer readable program executable by the computer, for writing data in a semiconductor storage device capable of storing a plurality of bits in one memory cell. The program causes the computer to perform an allocation step of allocating a first area for storing first data in a storage area of a semiconductor storage device and a writing step of writing the first data only in an area of use, with a prescribed size from a boundary of the first area being defined as a protection area and a remaining area being defined as the area of use in response to a request for writing the first data.

Abstract: A method, system and computer program product for optimizing storage system behavior in a cloud computing environment. An Input/Output (I/O) operation data is appended with a tag, where the tag indicates a class of data for the I/O operation data. Upon the storage controller reviewing the tag appended to the I/O operation data, the storage controller performs a table look-up for the storage policy associated with the determined class of data. The storage controller applies a map to determine a storage location for the I/O operation data in a drive device, where the map represents a logical volume which indicates a range of block data that is to be excluded for being stored on the drive device and a range of block data that is to be considered for being stored on the drive device. In this manner, granularity of storage policies is provided in a cloud computing environment.

Abstract: A plurality of storage apparatuses including a first and second storage apparatus, wherein said first storage apparatus is configured to have a first virtual volume composed of a plurality of virtual segments, at least said second storage apparatus is configured to have a pool composed of a plurality of real pages, each storage apparatuses is configured to manage a virtual pool comprising one or more pools including at least said pool, said virtual pool is composed of a plurality of virtual pages, each virtual page corresponding to any real page, and said first storage apparatus is configured to receive a write command that specifies an address belonging to an unallocated virtual segment, allocate a free virtual page to said unallocated virtual segment, and write data to the real page corresponding to the allocated virtual page, even when said first storage apparatus does not have a pool composed of real pages.

Abstract: Disclosed is an information providing apparatus, wherein information desired by users is provided with a high-precision selection, and at low processing cost.

Abstract: A method and system for enhancing efficiency in power failure handling in flash memory devices is disclosed. The method includes the controller of a storage device receiving a page of data, selecting a block having a desired back-up cost and copying previously stored data in the selected block to a back-up block prior to writing the received page to the selected block based on a category of the previously stored data. The system includes non-volatile memory having a plurality of operative blocks, at least one spare block and a controller. The controller is configured to receive a page of data, select an operative block in the memory having a desired back-up cost, and copy previously stored data in the selected block to a spare block based on a category of the previously stored data prior to writing the received page to the selected block.

Abstract: A computing device including a host device (HD) is in communication with a local storage device (LSD), wherein the LSD includes a memory array. A search index is generated with respect to data stored in the memory array of the LSD. By the LSD without involvement of the HD, the index data is generated with respect to the data stored in the memory array of the LSD. By the LSD, the generated index data is stored on the LSD as at least a part of the search index. The index may include data that can be used to respond to search queries with respect to data of the LSD. The queries may be originated from a HD or from within the LSD. The use of the index is not limited to responding to search queries. For example, the index may be used for content screening.

Abstract: A method of dynamically varying transfer size in a storage device for improved performance may include receiving, by a processor, a plurality of data transfer parameters. The data transfer parameters may be compared against disk characterization data associated with a Solid State Disk, which is the target of a data transfer request. A data transfer size may be selected from the disk characterization data, based on the compared data transfer parameters. The data transfer request may be modified to use the selected data transfer size. The data transfer request is completed using the modified data transfer parameters.

Abstract: A burst buffer appliance is adapted for coupling between a computer system and a file system. The burst buffer appliance comprises a flash memory or other high-speed memory having a substantially lower access time than the file system, and is configured to include a plurality of virtual machines for processing respective different types of input-output operations that involve utilization of the high-speed memory, with each of the virtual machines providing a different performance level for its associated type of input-output operations. The performance levels provided by the plurality of virtual machines may comprise respective different quality of service (QoS) levels for the respective different types of input-output operations, specified in terms of parameters such as latency and throughput rate. A highest QoS level may be provided by a particular virtual machine for operations involving writing checkpoints from the computer system to the high-speed memory.

Abstract: Techniques for simulating exclusive use of a processor core amongst multiple logical partitions (LPARs) include providing hardware thread-dependent status information in response to access requests by the LPARs that is reflective of exclusive use of the processor by the LPAR accessing the hardware thread-dependent information. The information returned in response to the access requests is transformed if the requestor is a program executing at a privilege level lower than the hypervisor privilege level, so that each logical partition views the processor as though it has exclusive use of the processor. The techniques may be implemented by a logical circuit block within the processor core that transforms the hardware thread-specific information to a logical representation of the hardware thread-specific information or the transformation may be performed by program instructions of an interrupt handler that traps access to the physical register containing the information.

Abstract: Techniques for deduplicating a data stream with checksum data embedded therein are described. According to one embodiment, a first data stream is received from a client having a plurality of data regions and a plurality of checksums for verifying integrity of the data regions embedded therein, where the first data stream represents a file or a directory of one or more files of a file system associated with the client. In response the first data stream with the checksums removed is deduplicated into a plurality of deduplicated chunks.

Abstract: A data storage device is disclosed comprising a non-volatile memory comprising a plurality of sectors. At least one alignment zone is defined in the non-volatile memory comprising a plurality of chunks including a plurality of data chunks and a plurality of pad chunks, wherein each chunk comprises a plurality of sectors. Each sector is operable to store X host blocks, the alignment zone comprises at least X?1 pad chunks, and control circuitry is operable to shift the data chunks of the alignment zone by a number of chunks equal to or less than X?1 plus a corresponding offset.

Abstract: A processor-implemented method for a concurrent software service upgrade is provided. The processor implemented method may include receiving a type of service request corresponding to the software service upgrade, determining, by the processor, the type of service request and then generating a plurality of subpartitions corresponding to a hypervisor. The method may further include applying the service request to at least one subpartition within the plurality of subpartitions, wherein the service request is applied to the at least one subpartition based on the type of service request and balancing the system resources among the plurality of subpartitions upon the applying of the service request to the at least one subpartition.

Abstract: Circuits and methods to control access to memory; for example, third dimension memory are disclosed. An integrated circuit (IC) may be configured to control access to memory cells. For example, the IC may include a memory having memory cells that are vertically disposed in multiple layers of memory. The IC may include a memory access circuit configured to control access to a first subset of the memory cells in response to access control data in a second subset of the memory cells. Each memory cell may include a non-volatile two-terminal memory element that stores data as a plurality of conductivity profiles that can be non-destructively sensed by applying a read voltage across the two terminals of the memory element. New data can be written by applying a write voltage across the two terminals of the memory element. The two-terminal memory elements can be arranged in a two-terminal cross-point array configuration.

Abstract: Described are techniques for evaluating data movement alternative. A set of criteria including capacity and performance limits is received. First processing is performed to evaluate a plurality of alternatives for use in data movement with respect to a set of logical devices having data stored on a set of physical storage devices. Each of the plurality of alternatives includes a different set of data movement criteria comprising capacity limits and a different set of performance limits. The set of physical storage devices includes at least a first physical device of one of a plurality of storage tiers and a second physical device of another one of the plurality of storage tier. One of the sets of performance limits is selected in accordance with the first processing.

Abstract: Provided is a distributed system and method for enabling new and useful location dependent features and functionality to mobile data processing systems. Mobile data processing systems (MSs) interact with each other as peers in communications and interoperability. Data is shared between mobile data processing systems to carry out novel Location Based eXchanges (LBX) of data for new mobile applications. Information which is transmitted inbound to, transmitted outbound from, or is in process at, a mobile data processing system, is used to trigger processing of actions in accordance with user configured permissions, charters, and other configurations. In a preferred embodiment, a user configurable platform is provided for quickly building well behaving LBX applications at MSs and across a plurality of interoperating MSs.

Abstract: An apparatus, system, and method are disclosed for managing data reliability. A priority module is configured to receive a storage request for a non-volatile memory device. The storage request may include data associated with a priority. The non-volatile memory device includes a plurality of cells, and each cell encodes a plurality of bits. The bits for a cell provide distinct levels of quality of service. A select module is configured to select a bit for storing the data based on the priority of the data and the level of quality of service of the selected bit. A data management module is configured to manage the data to satisfy a write order for the plurality of bits.

Abstract: Convenient approach for managing records with respect to entities based on file plans. In an embodiment, historical data representing policies previously selected is maintained. The historical data is then used to generate custom file plans containing policies most likely to be used by a corresponding user. A list in such custom file plan may have more relevant policies prioritized higher. A user may thus conveniently select a desired policy, and associate the selected policy with a set of entities to cause the selected policies to be applied against management of the set of entities.

Abstract: The present invention provides systems and methods for logically organizing data for storage and recovery on a data storage medium using a multi-level format. The present invention also provides systems and methods for protecting data stored on data storage medium so that the data may be recovered without errors.

Abstract: Various systems and methods are described for configuring a logical data storage container. In one embodiment, an instruction to perform an operation to modify an attribute of the logical data storage container that is an abstraction of a plurality of pertinent storage containers is received. A translated instruction to perform a sub-operation associated with the operation is transmitted to each of a number of the plurality of pertinent storage containers. A level of success of the performing of the operation on the logical data storage container is detected based on a comparison of a threshold value to a level of success of the performing of the sub-operation on each of the number of the plurality of pertinent storage containers. A report of the detected level of success is communicated.

Abstract: In a computer system that includes multiple nodes and multiple logical partitions, a dynamic partition manager computes current memory affinity and potential memory affinity to help determine whether a reallocation of resources between nodes may improve memory affinity for a logical partition or for the computer system. If so, the reallocation of resources is performed so memory affinity for the logical partition or computer system is improved. Memory affinity is computed relative to the physical layout of the resources according to a hardware domain hierarchy that includes a plurality of primary domains and a plurality of secondary domains.

Abstract: A dispersed storage (DS) unit for use within a dispersed storage network is capable of self-configuring using registry information provided to the DS unit. The registry information includes a slice name assignment indicating a range of slice names corresponding to a plurality of potential data slices of potential data objects to be stored in the DS unit. Based on the registry information, the DS unit allocates a portion of physical memory to store the potential data slices.

Abstract: A partition manager relocates a logical partition from a primary shared processor pool to a secondary shared processor pool in response to a predetermined condition, such as a hardware failure. The relocated logical partition is allocated a smaller quantity of processing units from the secondary pool than it was allocated from the primary pool. A quantity of processing units reserved for a second logical partition is identified in the secondary shared processor pool, and a portion of those reserved processing units are allocated to the relocated logical partition. The reserved processing units may be redistributed among multiple relocated logical partitions.

Abstract: An writing and reading method of a nonvolatile Storage, that includes a first partition and a second partition, and is configured to allow a read operation and a write operation with respect to the second partition only when an authentication is successful in a normal mode, may comprise: assigning a part of a storage space of the second partition to a temporary area by the nonvolatile storage according to a request of changing the normal mode to a secure temporary mode; and/or writing data to the temporary area by the nonvolatile storage. The nonvolatile storage may allow the read operation and with respect to the temporary area without the authentication.

Abstract: A data storage device includes a first memory device, a second memory device including a system region and a buffer region and a controller suitable for controlling the first memory device in response to a request from a host device, and allocating the system region and the buffer region according to an attribute of data involved with the request from the host device.

Abstract: The present invention concerns a device and a method at the device for selecting and configuring a default storage section. The device comprises connecting means for connecting at least one storage device comprising storing means to the device, characterized in that it comprises a selector for selecting a storage device, the selected storage device becoming the default storage section, configuring means for, on selection of a default storage section, partitioning the storing means of the default storage section into more than one directory, and securing means for defining access rights to the more than one directory.

Abstract: A computing method includes accepting a definition of a computing task, which includes multiple Processing Elements (PEs) having execution dependencies. The computing task is compiled for concurrent execution on a multiprocessor device, by arranging the PEs in a series of two or more invocations of the multiprocessor device, including assigning the PEs to the invocations depending on the execution dependencies. The multiprocessor device is invoked to run software code that executes the series of the invocations, so as to produce a result of the computing task.

Abstract: A primary processing unit entitlement is determined for a logical partition. A smaller secondary processing unit entitlement is also determined. A partition manager allocates primary processing units to the logical partition from a primary shared processor pool, and the logical partition is activated. The secondary processing units are reserved for the logical partition from a secondary shared processor pool, and the logical partition can be relocated to the secondary shared processor pool in response to a condition such as a hardware failure. The logical partition can continue to process its workload with the fewer processor resources, and can be restored to the primary processing unit entitlement.

Abstract: Systems and methods are provided for a hardware-implemented multi-buffer. A system includes a buffer memory comprising a shared memory space, where the memory space is shared between a first buffer and a second buffer, and where a dynamic delineation of the memory space between the first buffer and the second buffer is identified by a divider address. A dynamic buffer control circuit includes a control memory that is configured to store the divider address, a first memory utilization metric associated with the first buffer, and a second memory utilization metric associated with the second buffer. A system further includes one or more comparator circuits configured to compare the first memory utilization metric and the second memory utilization metric, where the dynamic buffer control circuit changes the divider address based on the comparison.

Abstract: A computer-implemented method for updating a recovery operating system (OS) stored in a boot partition of a storage device. The method involves booting, via host operating system (OS) boot files stored in the boot partition, a host OS that is stored in a host partition of the storage device, receiving a request to update a recovery OS also stored in the boot partition, determining the recovery OS update requires additional storage space of size Z to be added to the boot partition, decreasing the size of the host partition by the size Z, increasing the size of the boot partition by the size Z, and updating the recovery OS.

Abstract: A method of operation of a storage control system includes: partitioning logical addresses into a number of subdrives, the logical addresses associated with a memory device; and monitoring a data write measure of one of the subdrives.

Abstract: A method includes accepting data for storage in a memory that is partitioned into multiple memory regions. A memory region is selected for storing the data. At least part of the data is stored in the selected memory region, subject to verifying that all the storage operations applied to the selected memory region are performed within a predefined maximum time interval.

Abstract: Methods and structure are disclosed for normalizing storage performance across a plurality of logical volumes. One embodiment is a storage controller. The storage controller is adapted to couple with a plurality of host systems and a storage device. The storage controller is adapted to receive one or more requests to create logical volumes for the plurality of hose systems, and adapted to identify a plurality of performance zones for storage areas of the storage device. The performance zones exhibit different performance criteria for one or more of: reading data from the storage device and writing data to the storage device. The storage controller is further adapted to allocate storage from each of the plurality of performance zones for each of the plurality of logical volumes such that the performance criteria for accessing the storage device is distributed substantially uniformly across the plurality of logical volumes.

Abstract: A system according to one embodiment includes a plurality of logical libraries configured to store sequential access media therein, a plurality of shuttle cars, and one or more shuttle pathways for the shuttle cars. The shuttle cars are for transporting a sequential access medium between the plurality of logical libraries. Each of the logical libraries comprises at least one local station for sending and/or receiving shuttle cars to and/or from the plurality of logical libraries. The one or more shuttle pathways connect the stations in a multi-drop arrangement.