Virtual Machine Memory Addressing Patents (Class 711/6)
  • Patent number: 11016798
    Abstract: A multi-hypervisor system, comprising: a plurality of hypervisors comprising a first hypervisor and a second hypervisor, at least one of the plurality of hypervisors being a transient hypervisor; and at least one Span VM, concurrently executing on each of the plurality of hypervisors, the at least one transient hypervisor being adapted to be dynamically at least one of injected and removed under the at least one Span VM concurrently with execution of the at least one Span VM on another hypervisor, wherein the at least one Span VM has a single and consistent at least one of memory space, virtual CPU state, and set of input/output resources, shared by the plurality of hypervisors.
    Type: Grant
    Filed: May 31, 2019
    Date of Patent: May 25, 2021
    Assignee: The Research Foundation for The State University
    Inventor: Kartik Gopalan
  • Patent number: 11016906
    Abstract: A method of GPU virtualization comprises allocating each virtual machine (or operating system running on a VM) an identifier by the hypervisor and then this identifier is used to tag every transaction deriving from a GPU workload operating within a given VM context (i.e. every GPU transaction on the system bus which interconnects the CPU, GPU and other peripherals). Additionally, dedicated portions of a memory resource (which may be GPU registers or RAM) are provided for each VM and whilst each VM can only see their allocated portion of the memory, a microprocessor within the GPU can see all of the memory. Access control is achieved using root memory management units which are configured by the hypervisor and which map guest physical addresses to actual memory addresses based on the identifier associated with the transaction.
    Type: Grant
    Filed: September 7, 2020
    Date of Patent: May 25, 2021
    Assignee: Imagination Technologies Limited
    Inventors: Dave Roberts, Mario Sopena Novales, John W. Howson
  • Patent number: 11016668
    Abstract: A hypervisor deduplcation system includes a memory, a processor in communication with the memory, and a hypervisor executing on the processor. The hypervisor is configured to scan a first page, detect that the first page is an unchanged page, check a first free page hint, and insert the unchanged page into a tree. Responsive to inserting the unchanged page into the tree, the hypervisor compares the unchanged page to other pages in the tree and determine a status of the unchanged page as matching one of the other pages or mismatching the other pages in the tree. Responsive to determining the status of the page as matching another page, the hypervisor deduplicates the unchanged page. Additionally, the hypervisor is configured to scan a second page of the memory, check a second free page hint, deduplicate the second page if the free page hint indicates the page is unused.
    Type: Grant
    Filed: January 27, 2020
    Date of Patent: May 25, 2021
    Assignee: Red Hat, Inc.
    Inventors: Henri van Riel, Michael Tsirkin
  • Patent number: 11010075
    Abstract: A translation system can translate a request having multiple fields to a physical address using the fields as indexes to a multi-dimensional graph. A field or portion of a field can represent a location along an axis. When combined together, the fields can represent a point in n-space, where n is the number of axes. In some embodiments, a nearest neighbor calculation can be sufficient along an axis. Therefore, a point in n-space defined by the fields can be translated along an axis until a nearest neighbor entry is determined. When the entry is determined, the entry can be accessed to determine a correct response to the translation request.
    Type: Grant
    Filed: March 14, 2017
    Date of Patent: May 18, 2021
    Assignee: Western Digital Technologies, Inc.
    Inventors: Radoslav Danilak, Ladislav Steffko, Qi Wu
  • Patent number: 11010084
    Abstract: A virtual machine migration system that includes an initiator host that provides a virtual machine and receives an instruction to migrate the virtual machine to the target host. The initiator host moves, while the virtual machine is operating on the initiator host, virtual machine data for the virtual machine from a local memory area in a local memory system to a memory fabric memory area in a memory fabric memory system. A first portion of the virtual machine data in the local memory area and a second portion of the virtual machine data in the memory fabric memory area are accessible to the virtual machine and the initiator host during the movement of the virtual machine data. The initiator host stops, in response to all the virtual machine data being moved to the memory fabric memory area, operation of the virtual machine on the initiator host.
    Type: Grant
    Filed: May 3, 2019
    Date of Patent: May 18, 2021
    Assignee: Dell Products L.P.
    Inventors: William Price Dawkins, Kurtis John Bowman, Dragan M. Savic, Shyamkumar T. Iyer, Jimmy Doyle Pike
  • Patent number: 11010221
    Abstract: Dynamic distribution of memory, including identifying memory modules; creating a system physical address (SPA) of the memory modules; assigning, for each virtual machine (VM), a respective section of the SPA to the VM; calculating, for each VM, portions of the respective section of the SPA for the VM that is being used by the VM and that is not being used by the VM; identifying a physical failure of a particular memory module; in response to identifying the physical failure: identifying a particular VM assigned to the section of the SPA associated with the particular memory module that has physically failed; accumulating, for each other VM, the unused portions of the respective SPA for the VM; marking, for each other VM, the unused portion of the SPA for the VM as read-only for the VM; and reassigning a portion of the unused portions of the SPA to the particular VM.
    Type: Grant
    Filed: April 2, 2019
    Date of Patent: May 18, 2021
    Assignee: Dell Products L.P.
    Inventors: Ankit Singh, Deepaganesh Paulraj, Vinod Parackal Saby
  • Patent number: 11003538
    Abstract: Systems and methods for automatically generating a boot sequence. A multiple virtual machine computing environment is analyzed to generate a boot sequence that is used during a recovery operation. The boot sequence may be based on applications and application types running on the virtual machines, a network configuration and network traffic, and on manual boots of virtual machines. The boot sequence prioritizes the order in which the virtual machines are booted in the recovery site.
    Type: Grant
    Filed: January 17, 2019
    Date of Patent: May 11, 2021
    Assignee: EMC IP HOLDING COMPANY LLC
    Inventors: Assaf Natanzon, David Zlotnick, Boris Shpilyuck
  • Patent number: 10996968
    Abstract: Methods, software, and apparatus for application transparent, high available GPU computing with VM checkpointing. The guest access of certain GPU resources, such as MMIO resources, are trapped to keep a copy of guest context per semantics, and/or emulate the guest access of the resources prior to submission to the GPU, while other commands relating to certain graphics memory address regions are trapped before being passed through to the GPU. The trapped commands are scanned before submission to predict: a) potential to-be-dirtied graphics memory pages, and b) the execution time of intercepted commands, so the next checkpointing can be aligned to a predicted execution time. The GPU internal states are drained by flushing internal context/tlb/cache, at the completion of submitted commands, and then a snapshot of the vGPU state is taken, based on tracked GPU state, GPU context (through GPU-specific commands), detected dirty graphics memory pages and predicted to-be dirtied graphics memory pages.
    Type: Grant
    Filed: November 24, 2014
    Date of Patent: May 4, 2021
    Assignee: Intel Corporation
    Inventors: Yaozu Dong, Kun Tian
  • Patent number: 10999328
    Abstract: A tag-based policy architecture enforces information technology (IT) policy in a virtualized computing environment using cryptographically-verifiable metadata to authenticate compute resources coupled to a computer network and to authorize access to protected resources of the network. The compute resources are illustratively virtual machine instances (VMIs) provided by a virtual data center (VDC) of the environment, whereas the protected resources are illustratively virtualized storage, network and/or other compute resources of the VDC. Each VMI includes an intermediary manager, e.g., metavisor. The tag-based policy architecture includes an infrastructure having a centralized policy decision end point (e.g., a control plane of the VDC) and distributed policy enforcement endpoints (e.g.
    Type: Grant
    Filed: June 3, 2019
    Date of Patent: May 4, 2021
    Assignee: VMware, Inc.
    Inventors: Jason A. Lango, Grant Callaghan, Marcel Moolenaar, Vinay Wagh, Rohan Desai, Matthew Page, Gary Menezes, Antoine Pourchet, Ramya Olichandran
  • Patent number: 10990374
    Abstract: An operation of a VM running first and second VM components is suspended so that a servicing operation for the VM can be performed. The VM has devices directly attached to it. A state of the first VM components is saved. An identification pointer for the second VM components is saved in a portion of the computing system physical memory without removing any underlying data structures of second VM components from computing system physical hardware. The directly attached devices remain configured as attached to the VM and remain configured to communicate with the VM while the VM is suspended and while the servicing operation is performed. The first VM components are shut down and then restored at the completion of the servicing operation using the saved state. The restored first VM components are reconnected to the second VM components using the identification pointers. The operation of the VM is restored.
    Type: Grant
    Filed: September 14, 2018
    Date of Patent: April 27, 2021
    Assignee: MICROSOFTTECHNOLOGY LICENSING, LLC
    Inventors: Kevin Michael Broas, David Alan Hepkin, Wen Jia Liu, Hadden Mark Hoppert
  • Patent number: 10990305
    Abstract: A storage apparatus includes: a plurality of controllers, each of which has a plurality of processors for processing requests; a storage device coupled to the controller; an integration unit that integrally controls the plurality of controllers; and a shared memory that can be accessed from each processor for the plurality of controllers and stores configuration information of the storage apparatus including load information of each processor. The integration unit: calculates estimated processing time of a configuration management request, which has been accepted from a management apparatus, from a request type and a target resource type of the configuration management request; and distributes the configuration management request to a plurality of distribution requests on the basis of the load information of each processor acquired from the shared memory and the estimated processing time, determines a distribution destination processor for processing each of the plurality of distribution requests.
    Type: Grant
    Filed: September 12, 2019
    Date of Patent: April 27, 2021
    Assignee: HITACHI, LTD.
    Inventors: Ryosuke Yabu, Shinichiro Kanno
  • Patent number: 10970116
    Abstract: A memory management method, system, and computer program product include receiving a request to allocate a block of memory including a first portion to be accessed by a first software component executing on a first computer and second portion to be accessed by a second software component executing on a second computer, allocating the block of memory and additional bytes including a first identifier of the first portion, a first status indicator associated with the first portion, a second identifier of the second portion, and a second status indicator associated with the second portion, initializing the first status indicator and the second status indicator, and making the block of memory available to the first software component and the second software component.
    Type: Grant
    Filed: February 8, 2017
    Date of Patent: April 6, 2021
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventor: Kirk J. Krauss
  • Patent number: 10963376
    Abstract: System and Methods for non-uniform memory (NUMA) garbage collection are provided. Multiple memories and processors are categorized into local groups. A heap space is divided into multiple pools and stored in each of the memories. Garbage collection threads are assigned to each of the local groups. Garbage collection is performed using the garbage collection threads for objects contained in the pools using the garbage collector threads, memory, and processor assigned to each local group, minimizing remote memory accesses.
    Type: Grant
    Filed: October 1, 2018
    Date of Patent: March 30, 2021
    Assignee: Oracle International Corporation
    Inventors: Antonios Printezis, Igor Veresov, Paul Henry Hohensee, John Coomes
  • Patent number: 10963286
    Abstract: A live migration method for a virtual machine passthrough device, includes: performing a register state synchronization method by calling a register state synchronization interface; cancelling a passthrough state of the source virtual machine passthrough device, and migrating the source virtual machine passthrough device to the target virtual machine by iteratively executing multiple rounds of a synchronization operation as following: performing the register state synchronization method by calling the register state synchronization interface to capture a read/write operation on a register of the source virtual machine passthrough device in a migration process, and executing the captured read/write operation on a register of a target virtual machine passthrough device; and performing a DMA dirty page synchronization method by calling a configured DMA dirty page transmission interface, to write data corresponding to a DMA dirty page identified by the source virtual machine passthrough device into a memory of th
    Type: Grant
    Filed: March 14, 2019
    Date of Patent: March 30, 2021
    Assignee: BEIJING BAIDU NETCOM SCIENCE AND TECHNOLOGY CO., LTD.
    Inventors: Yongji Xie, Wen Chai, Yu Zhang
  • Patent number: 10942867
    Abstract: A system performing client-side caching of data in a deduplication backup system by maintaining an Adaptive Replacement Cache (ARC) to pre-populate cached data and flush incrementals of the cached data in a client coupled to a backup server in the system. The system maintains cache consistency among clients by a time-to-live (TTL) measurement associated with each entry in a respective client cache, and a retry on stale entry mechanism to signal from the server when a cache entry is stale in a client due to change of a corresponding cache entry in another client. The ARC cache keeps track of both frequently used and recently used pages, and a recent eviction history for both the frequently used and recently used pages.
    Type: Grant
    Filed: July 11, 2018
    Date of Patent: March 9, 2021
    Assignee: EMC IP Holding Company LLC
    Inventor: Keyur Desai
  • Patent number: 10942895
    Abstract: A storage system in one embodiment comprises a plurality of storage devices storing data pages. Each data page has a content-based signature derived from that data page. The content-based signatures are associated with physical locations storing the data pages. In response to receipt of a write input/output (IO) request that includes a data segment that is smaller than a page granularity of the storage devices, a content-based signature associated with the data segment is determined which also corresponds to a target data page stored at one of the physical locations. In response to determining the content-based signature, an inflight write count corresponding to the content-based signature is incremented. In response to a decrement request to decrement a reference count of the physical location corresponding to the content-based signature, a decrement flag corresponding to the content-based signature is set in the data structure and the decrement request is postponed.
    Type: Grant
    Filed: January 2, 2020
    Date of Patent: March 9, 2021
    Assignee: EMC IP Holding Company LLC
    Inventors: Vladimir Shveidel, Lior Kamran, Oran Baruch
  • Patent number: 10929305
    Abstract: This disclosure provides methods, systems and computer program products for page sharing among a plurality of containers running on a host. The method comprises in response to a first container accessing a first file not cached by the first container, checking whether a second file equivalent to the first file is shared in a memory of the host by a second container, wherein the checking is based on a record in which related information of at least one shared file is stored. The method further comprises in response to the checking indicating there is no second file, allocating in the memory at least one page for the first file, loading the first file into the at least one page, and storing related information of the first file into the record.
    Type: Grant
    Filed: February 13, 2019
    Date of Patent: February 23, 2021
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Qin Yue Chen, Chao Jun Wei, Han Su, Fei Fei Li
  • Patent number: 10911375
    Abstract: An information processing apparatus includes a plurality of processors and a plurality of links provided between the processors in a plurality of axis directions. Each of the processors includes a processor circuit, a memory, a memory controller, and an interconnect coupled to the processor circuit. The interconnect includes: a network switch configured to perform switching between the first links and a second link to its own processor; link counters provided to input links and output links of the first links and the second link respectively, the link counters being configured to count at least the number of packets passing through the input links and the output links; and a recorder configured to store count values of the link counters in the memory via the memory controller without a control by the processor circuit.
    Type: Grant
    Filed: April 18, 2019
    Date of Patent: February 2, 2021
    Assignee: FUJITSU LIMITED
    Inventors: Yuichiro Ajima, Shinya Hiramoto, Yuji Kondo
  • Patent number: 10895992
    Abstract: According to one embodiment, a hardware-based processing node of a plurality of hardware-based processing nodes in an object memory fabric can comprise a memory module storing and managing a plurality of memory objects in a hierarchy of the object memory fabric. Each memory object can be created natively within the memory module, accessed using a single memory reference instruction without Input/Output (I/O) instructions, and managed by the memory module at a single memory layer. The object memory fabric can distribute and track the memory objects across the hierarchy of the object memory fabric and the plurality of hardware-based processing nodes on a per-object basis. Distributing the memory objects across the hierarchy of the object memory fabric and the plurality of hardware-based processing nodes can comprise storing, on a per-object basis, each memory object on two or more nodes of the plurality of hardware-based processing nodes of the object memory fabric.
    Type: Grant
    Filed: January 22, 2019
    Date of Patent: January 19, 2021
    Assignee: Ultrata LLC
    Inventors: Steven J. Frank, Larry Reback
  • Patent number: 10891238
    Abstract: An aspect includes determining, via a processor, context attributes of a storage. Data address translation (DAT) tables are created, via the processor, to map virtual addresses to real addresses within the storage. When detecting, via the processor, that a context attribute of the storage has changed, and the DAT tables are updated based at least in part on the changed context attributes of the storage.
    Type: Grant
    Filed: June 28, 2019
    Date of Patent: January 12, 2021
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Harris M. Morgenstern, Elpida Tzortzatos, Scott B. Compton, Steven M. Partlow
  • Patent number: 10880367
    Abstract: A balancer can balance workloads in an active-active or active-passive stretched cluster by determining where to provision active instances of virtual machines. The balancer can maintain a set of compatibility rules to govern which hosts, such as sites or servers, are compatible with which instances. The compatibility rules can ensure that the same host does not run both instances, for failover purposes. Additionally, the balancer can create a key-value map that tracks performance of various available hosts. By monitoring host performance and maintaining the compatibility rules, the balancer can re-provision instances on different compatible hosts when performance of a current host suffers.
    Type: Grant
    Filed: March 12, 2019
    Date of Patent: December 29, 2020
    Assignee: VMWARE, INC.
    Inventor: Jingliang Shang
  • Patent number: 10853132
    Abstract: A mechanism is described for facilitating memory-based software barriers to emulate hardware barriers at graphics processors in computing devices. A method of embodiments, as described herein, includes facilitating converting thread scheduling at a processor from hardware barriers to software barriers, where the software barriers emulate the hardware barriers.
    Type: Grant
    Filed: April 9, 2019
    Date of Patent: December 1, 2020
    Assignee: INTEL CORPORATION
    Inventors: Altug Koker, Joydeep Ray, Balaji Vembu, James A. Valerio, Abhishek R. Appu
  • Patent number: 10839093
    Abstract: Systems for low-latency data access in distributed computing systems. A method embodiment commences upon generating a first storage area in local storage of a first computing node. Access to the first storage area is provided through the first computing node. A second storage area is generated wherein the second storage area comprises a first set of metadata that comprises local storage device locations of at least some of the local storage areas of the first storage area. A set of physical access locations of the second storage area is stored to a database that manages updates to the second set of metadata pertaining to the second storage area. Accesses to the first storage area are accomplished by querying the database retrieve a location of the second set of metadata, and then accessing the first storage area through one or more additional levels of metadata that are node-wise collocated.
    Type: Grant
    Filed: April 27, 2018
    Date of Patent: November 17, 2020
    Assignee: Nutanix, Inc.
    Inventors: Karan Gupta, Rishi Bhardwaj, Amod Vilas Jaltade, Gowtham Alluri, Pavan Kumar Konka
  • Patent number: 10838753
    Abstract: Systems and methods for performing data deduplication of storage units. An example method may comprise: receiving a request to initialize a portion of a data storage; modifying a content of a storage unit to comprise an initialization value; updating, by a processing device, a content indicator to represent the initialization value of the storage unit; determining in view of the content indicator that a plurality of storage units comprise matching content; and updating the storage unit to comprise a reference to the matching content of one of the plurality of storage units that comprise the matching content.
    Type: Grant
    Filed: February 21, 2018
    Date of Patent: November 17, 2020
    Assignee: Red Hat, Inc.
    Inventors: Michael Tsirkin, Karen Lee Noel
  • Patent number: 10824494
    Abstract: Operation of a multi-slice processor that includes a plurality of execution slices, a plurality of load/store slices, and one or more translation caches, where operation includes: determining, at the load/store slice, a real address from a cache hit in the translation cache for an effective address for an instruction received at a load/store slice; determining, at the load/store slice, an error condition corresponding to an access of the real address; determining, at the load/store slice, a process type indicating a source of the instruction to be a guest process; and responsive to determining the error condition, initiating, in dependence upon the process type indicating a source of the instruction to be a guest process, an effective address translation corresponding to a cache miss in the translation cache for the effective address for the instruction.
    Type: Grant
    Filed: June 12, 2018
    Date of Patent: November 3, 2020
    Assignee: International Business Machines Corporation
    Inventors: Dwain A. Hicks, Jonathan H. Raymond, Shih-Hsiung S. Tung
  • Patent number: 10802985
    Abstract: A method of GPU virtualization comprises allocating each virtual machine (or operating system running on a VM) an identifier by the hypervisor and then this identifier is used to tag every transaction deriving from a GPU workload operating within a given VM context (i.e. every GPU transaction on the system bus which interconnects the CPU, GPU and other peripherals). Additionally, dedicated portions of a memory resource (which may be GPU registers or RAM) are provided for each VM and whilst each VM can only see their allocated portion of the memory, a microprocessor within the GPU can see all of the memory. Access control is achieved using root memory management units which are configured by the hypervisor and which map guest physical addresses to actual memory addresses based on the identifier associated with the transaction.
    Type: Grant
    Filed: June 14, 2019
    Date of Patent: October 13, 2020
    Assignee: Imagination Technologies Limited
    Inventors: Dave Roberts, Mario Sopena Novales, John W. Howson
  • Patent number: 10802862
    Abstract: A method of migrating a virtual machine (VM) having a virtual disk from a source data center to a destination data center includes generating a snapshot of the VM to create a base disk and a delta disk in which writes to the virtual disk subsequent to the snapshot are recorded, and copying the base disk to a destination data store. The method further includes, in response to a request to migrate the VM, preparing a migration specification at the source and transmitting the migration specification to the destination, the migration specification including a VM identifier and a current content ID of the base disk, and determining that a content ID of the copied base disk matches the current content ID of the base disk included in the migration specification and updating the migration specification to indicate that the base disk does not need to be migrated.
    Type: Grant
    Filed: May 1, 2018
    Date of Patent: October 13, 2020
    Assignee: VMware, Inc.
    Inventors: Arunachalam Ramanathan, Yanlei Zhao, Rohan Pradip Shah, Benjamin Yun Liang, Gabriel Tarasuk-Levin
  • Patent number: 10803086
    Abstract: Component objects of a virtual disk are backed by first storage nodes, which are at a primary site, and second storage nodes, which are at a secondary site. The method of resynchronizing the component objects of the virtual disk includes, at a coordinating node at the primary site, responsive to a second storage node coming back online, identifying an out-of-sync block of the second storage node, locating the out-of-sync block in an address space maintained for blocks of the virtual disk, and transmitting a resync command to a replication module of a coordinating node at the secondary site, the resync command identifying the out-of-sync block within the address space.
    Type: Grant
    Filed: July 26, 2017
    Date of Patent: October 13, 2020
    Assignee: VMware, Inc.
    Inventors: Pascal Renauld, Enning Xiang, Eric Knauft
  • Patent number: 10776036
    Abstract: An agent for managing virtual machines includes a persistent storage and a processor. The persistent storage stores backup/restoration policies. The processor identifies a virtual machine of the virtual machines that is likely to fail and, in response to identifying the virtual machine, identifies backup data associated with the identified virtual machine; instantiates a clone of the identified virtual machine using the identified backup; exposes the clone while the identified virtual machine is exposed; and hides the virtual machine after the clone is exposed.
    Type: Grant
    Filed: July 6, 2018
    Date of Patent: September 15, 2020
    Assignee: EMC IP Holding Company LLC
    Inventors: Upanshu Singhal, Pradeep Mittal, Kumari Priyanka, Shivakumar Kunnal Onkarappa, Chakraveer Singh, Archit Seth, Rahul Bhardwaj, Chandra Prakash, Manish Sharma, Akansha Purwar, Lalita Dabburi, Shilpa Mehta, Shelesh Chopra, Asif Khan
  • Patent number: 10776112
    Abstract: Optimizations are provided for frame management operations, including a clear operation and/or a set storage key operation, requested by pageable guests. The operations are performed, absent host intervention, on frames not resident in host memory. The operations may be specified in an instruction issued by the pageable guests.
    Type: Grant
    Filed: June 14, 2019
    Date of Patent: September 15, 2020
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Charles W. Gainey, Jr., Dan F. Greiner, Lisa C. Heller, Damian L. Osisek, Gustav E. Sittmann, III
  • Patent number: 10768832
    Abstract: Management of storage used by pageable guests of a computing environment is facilitated. A query instruction is provided that details information regarding the storage location indicated in the query. It specifies whether the storage location, if protected, is protected by host-level protection or guest-level protection.
    Type: Grant
    Filed: February 22, 2019
    Date of Patent: September 8, 2020
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Mark S. Farrell, Lisa Cranton Heller, Damian L. Osisek, Peter K. Szwed
  • Patent number: 10768959
    Abstract: Methods, systems, and computer program products are provided for migrating memory pages. A virtual machine is run by a hypervisor. The virtual machine includes a guest that is allocated a plurality of guest memory pages. A data structure is initialized corresponding to a memory page of the plurality of guest memory pages. A first status is assigned in the data structure to the memory page. The memory page is migrated to a destination and the data structure is modified to assign the memory page a second status.
    Type: Grant
    Filed: November 24, 2015
    Date of Patent: September 8, 2020
    Assignee: RED HAT ISRAEL, LTD.
    Inventors: Michael Tsirkin, Uri Lublin
  • Patent number: 10761996
    Abstract: Examples include an apparatus which accesses secure pages in a trust domain using secure lookups in first and second sets of page tables. For example, one embodiment of the processor comprises: a decoder to decode a plurality of instructions including instructions related to a trusted domain; execution circuitry to execute a first one or more of the instructions to establish a first trusted domain using a first trusted domain key, the trusted domain key to be used to encrypt memory pages within the first trusted domain; and the execution circuitry to execute a second one or more of the instructions to associate a first process address space identifier (PASID) with the first trusted domain, the first PASID to uniquely identify a first execution context associated with the first trusted domain.
    Type: Grant
    Filed: September 28, 2018
    Date of Patent: September 1, 2020
    Assignee: Intel Corporation
    Inventors: Vedvyas Shanbhogue, Ravi Sahita, Rajesh Sankaran, Siddhartha Chhabra, Abhishek Basak, Krystof Zmudzinski, Rupin Vakharwala
  • Patent number: 10754795
    Abstract: Providing memory management unit (MMU)-assisted address sanitizing in processor-based devices is disclosed. In one aspect, a processor-based device provides an MMU that includes a last-level page table that is configured to store page table entry (PTE) tokens for validating memory accesses, as well as fragment order indicators representing a count of page fragments for each memory page in the system memory. Upon receiving a memory access request comprising a pointer token and a virtual address of a memory fragment within a memory page of the system memory, the MMU uses the virtual address and the fragment order indicator of the PTE corresponding to the virtual address to retrieve a PTE token for the virtual address from the last-level page table, and determines whether the PTE token corresponds to the pointer token. If so, the MMU performs the memory access request using the pointer, and otherwise may raise an exception.
    Type: Grant
    Filed: November 26, 2018
    Date of Patent: August 25, 2020
    Assignee: Qualcomm Incorporated
    Inventors: Chintan Bipinchandra Pandya, Ramswaroop Ghanshyam Somani
  • Patent number: 10733109
    Abstract: System for for managing host reclaimable memory based on VM needs includes a plurality of VMs; a hypervisor configured to process VM memory requests; a host CPU configured to control host physical memory reclaim process; at least one VM being allocated physical memory; Guest tool configured to determine page types based on a memory map; and a host module configured to scan an LRU list for pages that it can reacquire, and to force a slowdown in VM operations when reclaim operations use up more than a predefined share of CPU time. The host CPU performs the following based on the page type: (i) hard lock protection, when the page is a VM kernel page, for host-based reclaim of the page when no other VM pages are left to reacquire; and (ii) access/dirty (A/D) bit marking, when the page is a regular VM page.
    Type: Grant
    Filed: July 9, 2019
    Date of Patent: August 4, 2020
    Assignee: Virtuozzo International GmbH
    Inventors: Pavel Emelyanov, Alexey Kobets
  • Patent number: 10733130
    Abstract: Systems, methods, apparatuses, and software for data storage systems are provided herein. In one example, a data storage assembly is provided that includes a plurality of storage drives each comprising a PCIe host interface and solid state storage media. The data storage assembly includes a PCIe switch circuit coupled to the PCIe host interfaces of the storage drives and configured to receive storage operations issued by one or more host systems over a shared PCIe interface and transfer the storage operations for delivery to the storage drives over selected ones of the PCIe host interfaces. The data storage assembly includes a control processor configured to monitor usage statistics of the storage drives, and power control circuitry configured to selectively remove the power from ones of the storage drives based at least on the usage statistics of the storage drives.
    Type: Grant
    Filed: October 29, 2018
    Date of Patent: August 4, 2020
    Assignee: Liqid Inc.
    Inventors: Christopher Long, Jason Breakstone
  • Patent number: 10725853
    Abstract: Some embodiments described herein are directed to memory page or bad block monitoring and retirement algorithms, systems and methods for random access memory (RAM). Reliability issues or errors can be detected for multiple memory pages using one or more retirement criterion. In some embodiments, when reliability errors are detected, it may be desired to remove such pages from operation before they create a more serious problem, such as a computer crash. Thus, bad block retirement and replacement mechanisms are described herein.
    Type: Grant
    Filed: December 30, 2019
    Date of Patent: July 28, 2020
    Assignee: Formulus Black Corporation
    Inventors: Yin Zhang, Nafees Ahmed Abdul, Boyu Ni, Gautham Reddy Kunta, Andrei Khurshudov, Stephen J. Sicola
  • Patent number: 10719456
    Abstract: Embodiments of the disclosure provide a method and an apparatus for accessing private data in a physical memory of an electronic device, wherein the method includes: receiving a request for accessing private data in the physical memory from a process running in the electronic device; and accessing private data in a particular physical address interval of the physical memory through a secure memory access interface added to a virtual machine monitor of the electronic device, wherein a mapping relationship for the particular physical address interval is not established in a memory management unit of the electronic device, and the secure memory access interface is pre-designed to realize access to the private data in the particular physical address interval of the physical memory. The method and the apparatus of the present application can enhance security of private data in a physical memory.
    Type: Grant
    Filed: December 8, 2017
    Date of Patent: July 21, 2020
    Assignee: ALIBABA GROUP HOLDING LIMITED
    Inventor: Maochang Dang
  • Patent number: 10713131
    Abstract: One or more embodiments provide techniques for migrating a virtual machine (VM) from a private data center to a cloud data center. A hybridity manager receives a request at the cloud data center to replicate a VM from the private data center on the cloud data center. The hybridity manager identifies a source network associated with the VM. The hybridity manager identifies whether there exists a stretched network associated with the source network of the VM. Responsive to determining that there is a stretched network associated with the source network of the VM, the hybridity manager replicates the VM on the stretched network without reconfiguring internet-protocol (IP) settings of the VM.
    Type: Grant
    Filed: January 15, 2018
    Date of Patent: July 14, 2020
    Assignee: WMware, Inc.
    Inventors: Serge Maskalik, Uday Masurekar, Narendra Kumar Basur Shankarappa, Anand Pritam
  • Patent number: 10713254
    Abstract: The invention relates to a method, computer program product and computer system for providing attribute value information for a data extent having a set of data entries.
    Type: Grant
    Filed: September 7, 2017
    Date of Patent: July 14, 2020
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Michal Bodziony, Lukasz Gaza, Artur M. Gruszecki, Tomasz Kazalski, Konrad K. Skibski
  • Patent number: 10713175
    Abstract: A method and a Memory Availability Managing Module (110) “MAMM” for managing availability of memory pages (130) are disclosed. A disaggregated hardware system (100) comprises sets of memory blades (105, 106, 107) and computing pools (102, 103, 104). The MAMM (110) receives (A010) a message relating to allocation of at least one memory page to at least one operating system (120). The message comprises an indication about availability for said at least one memory page. The MAMM (110) translates (A020) the indication about availability to a set of memory blade parameters, identifying at least one memory blade (105, 106, 107). The MAMM (110) generates (A030) address mapping information for said at least one memory page, including a logical address of said at least one memory page mapped to at least two physical memory addresses of said at least one memory blade (105, 106, 107).
    Type: Grant
    Filed: December 2, 2015
    Date of Patent: July 14, 2020
    Assignee: TELEFONAKTIEBOLAGET LM ERICSSON (PUBL)
    Inventors: Amir Roozbeh, Joao Monteiro Soares, Daniel Turull
  • Patent number: 10693844
    Abstract: Systems and methods for efficient migration for encrypted virtual machines (VMs) by active page copying are disclosed. An example method may include receiving a request to migrate a VM, identifying a first page of memory of the VM on the source host machine for migration, the first page of memory encrypted with a VM-specific encryption key, protecting the first page from access by the VM, executing a send command to modify the first page from encrypted with the guest-specific encryption key to encrypted with a migration key while the first page remains in place in the memory, allocating a second page in a buffer, copying contents of the first page to the second page, executing a receive command to modify the first page from encrypted with the migration key to encrypted with the guest-specific encryption key while the first page remains in place in the memory, and transmitting contents of the second page.
    Type: Grant
    Filed: August 24, 2017
    Date of Patent: June 23, 2020
    Assignee: Red Hat, Inc.
    Inventors: Karen Noel, Michael Tsirkin
  • Patent number: 10693802
    Abstract: A system for provisioning an elastic computing infrastructure is provided. The system include a memory and at least one processor coupled to the memory. The system also includes a management component executed by the at least one processor and configured to instantiate an objective object having a resource collection and instructions that specify processing performed by the objective object, the resource collection identifying at least one resource object that controls a capacity of at least one resource provided by at least one computer system, the capacity being sufficient for processing to be performed at a predetermined performance level.
    Type: Grant
    Filed: September 11, 2017
    Date of Patent: June 23, 2020
    Assignee: SEA STREET TECHNOLOGIES, INC.
    Inventors: John Weber, Harley L. Stowell, III
  • Patent number: 10691479
    Abstract: Techniques for placing virtual machines based on compliance of device profiles are disclosed. In one embodiment, a list of device profiles may be maintained, each device profile including details of at least one virtual device and associated capabilities. Further, a first device profile from the list of device profiles may be assigned to a virtual machine. Furthermore, the virtual machine may be placed on a host computing system based on compliance of the first device profile.
    Type: Grant
    Filed: October 31, 2017
    Date of Patent: June 23, 2020
    Assignee: VMWARE, INC.
    Inventors: Hariharan Jeyaraman Ganesan, Jinto Antony, Madhusudhanan Gangadharan
  • Patent number: 10678648
    Abstract: A method, an apparatus, and a system for migrating virtual machine backup information, which implement backup information migration after a virtual machine is migrated. The method includes: receiving, by a first backup server, a migration trigger message, where the migration trigger message carries pre-migration virtual-machine identification information and indication information of a second backup server; determining, by the first backup server, backup information of the virtual machine according to the pre-migration virtual-machine identification information; and sending, by the first backup server, the backup information to the second backup server. Therefore, the migrated virtual machine inherits backup information existing before the migration, such that the migrated virtual machine continues to be protected by backup data existing before the migration, and data of the virtual machine is backed up according to a backup policy existing before the migration.
    Type: Grant
    Filed: June 6, 2017
    Date of Patent: June 9, 2020
    Assignee: Huawei Technologies Co., Ltd.
    Inventors: Heng Huang, Lei Zhang, Hua Cheng
  • Patent number: 10671422
    Abstract: A security module in a memory access path of a processor of a processing system protects secure information by verifying the contents of memory pages as they transition between one or more virtual machines (VMs) executing at the processor and a hypervisor that provides an interface between the VMs and the processing system's hardware. The security module of the processor is employed to monitor memory pages as they transition between one or more VMs and a hypervisor so that memory pages that have been altered by a hypervisor or other VM cannot be returned to the VM from which they were transitioned.
    Type: Grant
    Filed: August 24, 2017
    Date of Patent: June 2, 2020
    Assignee: ADVANCED MICRO DEVICES, INC.
    Inventors: David Kaplan, Jeremy W. Powell, Richard Relph
  • Patent number: 10664304
    Abstract: A hypervisor generates first and second page views, where a guest physical address points to a first page of the first page view and a second page of the second page view. A first pointer value is written to the first page and a second pointer value is written to the second page. A guest operating system executes a first task and if a determination to switch to the second task is made, the guest operating system reads a current pointer value and determines what the current page view is. If the guest operating system determines that the current page view is the first page view, the guest operating system saves the first pointer value in a first memory of the first task, loads the second pointer value from a second memory of the second task, and executes a virtual machine function to switch to the second page view.
    Type: Grant
    Filed: April 1, 2019
    Date of Patent: May 26, 2020
    Assignee: Red Hat Israel, Ltd.
    Inventor: Michael Tsirkin
  • Patent number: 10649687
    Abstract: Methods, systems, and devices for memory buffer management and bypass are described. Data corresponding to a page size of a memory array may be received at a virtual memory bank of a memory device, and a value of a counter associated with the virtual memory bank may be incremented. Upon determining that a value of the counter has reached a threshold value, the data may be communicated from the virtual memory bank to a buffer of the same memory device. For instance, the counter may be incremented based on the virtual memory bank receiving an access command from a host device.
    Type: Grant
    Filed: August 27, 2018
    Date of Patent: May 12, 2020
    Assignee: Micron Technology, Inc.
    Inventors: Robert Nasry Hasbun, Dean D. Gans, Sharookh Daruwalla
  • Patent number: 10642753
    Abstract: A computing device features one or more hardware processors and a memory that is coupled to the one or more processors. The memory comprises software that supports virtualization, including a virtual machine operating in the guest mode and a virtualization layer operating in the host mode. The virtual machine is configured to execute a plurality of processes including a guest agent process. The virtualization layer is configured to protect the guest agent process operating within the virtual machine that provides metadata to the virtualization layer by restricting page permissions for memory pages associated with the guest agent process when the guest agent process is inactive.
    Type: Grant
    Filed: June 30, 2016
    Date of Patent: May 5, 2020
    Assignee: FireEye, Inc.
    Inventor: Udo Steinberg
  • Patent number: 10628290
    Abstract: A microservice application can be tested inside an inner cloud environment that is within an outer cloud environment. For example, a software application can generate an inner cloud environment within an outer cloud environment in response to an event associated with a microservice application. The software application can then deploy another version of the microservice application in the inner cloud environment. The software application can perform at least one test on the other version of the microservice application in the inner cloud environment to determine a compatibility of the other version of the microservice application with the inner cloud environment.
    Type: Grant
    Filed: January 30, 2018
    Date of Patent: April 21, 2020
    Assignee: Red Hat, Inc.
    Inventor: Subin Modeel