Abstract: An improved data system permits power efficient mask key write operations. A mask key selector implements criteria-based selection of mask keys for mask key write operations on blocks data. In one embodiment, a first set of mask keys is compared to data bytes of a data block that will be written to memory. The comparison culls keys from the list of candidates that match unmasked data bytes, that is, values that will be written to memory as “changed” data. A mask key is selected from the resulting set of candidates so a memory write operation consumes less power (relative to selection of other keys), or so that the operation minimizes switching noise. The selected mask key is then substituted by a controller into masked data values, and a modified data block is transmitted to memory, with the memory detecting masked data by identifying mask keys in the modified data block.

Abstract: A memory access control apparatus includes a memory controller controlling a memory adopting a DDR format; a DDR-PHY adjusting the timing of an interface signal between the memory controller and the memory; a DDR-PHY controller controlling the DDR-PHY; and a clock controller controlling the frequency of a clock signal. A first request signal for controlling the operation of the memory in a self-refresh mode is supplied to the memory controller, a second request signal for resetting the DDR-PHY is supplied to the DDR-PHY controller, a third request signal for changing the clock frequency is supplied to the clock controller, a fourth request signal for setting a parameter for the DDR-PHY is supplied to the DDR-PHY controller, and a fifth request signal for canceling the operation of the memory in the self-refresh mode is supplied to the memory controller in order to change the clock frequency of the memory.

Abstract: The invention relates to a memory device, preferably a non-volatile memory device, comprising a memory array (16) with multiple memory cells (18) for storing bits of data, the memory cells (18) being arranged in word lines and columns, and a readout circuit (20) for reading out data from the memory array (16). In order to enable an effective use of resources, it is proposed to further provide the non-volatile memory device with at least two sense amplifier devices (22, 24), wherein the sense amplifier devices (22, 24) are connected to respectively different subsets of memory cells of one of the word lines.

Abstract: An integrated circuit device includes a semiconductor substrate and an array of random access memory (RAM) cells, which are arranged on the substrate in first columns and are configured to store data. A computational section in the device includes associative memory cells, which are arranged on the substrate in second columns, which are aligned with respective first columns of the RAM cells and are in communication with the respective first columns so as to receive the data from the array of the RAM cells and to perform an associative computation on the data.

Abstract: A system and method of testing a wireless communication device during device production comprises designating as a data log buffer when the device is being produced, at least part of random access memory (RAM) of the device that is allocated for virtual machine and/or application usage when the device is operational; and testing the device and storing test log data in the buffer. After testing, the data can be obtained from the buffer and processed using a debugging and log analysis tool.

Abstract: A relay adapter, a method for processing communication data through use of a relay adapter, and a process for leasing the relay adapter to a user by a service provider. The relay adapter includes: an authentication information storage section that stores authentication information of the relay adapter; a power plug; a power socket; and a push switch within the power plug or power socket. The push switch may be depressed. The power plug is detected to be plugged into a power socket of the user. The power socket is connected to a control server by a power line carrying a power signal. Responsive to ascertaining that the push switch is not depressed, mutual authentication is enabled between the relay adapter and the control server. After the mutual authentication, communication data is relayed from an information processing device of the user to a service provider server via the control server.

Abstract: An interface unit 20 assigns different SDRAMs 1 and 2 to adjacent drawing blocks in a frame-buffer area. In processing that extends across the adjacent drawing blocks, active commands, for example, are issued alternately to the SDRAMs 1 and 2 to reduce waiting cycles resulting from the issue interval restriction. Furthermore, since individual clock enable signals CKE1 and CKE2 are output to the SDRAMs 1 and 2 so that burst transfers of the SDRAMs 1 and 2 can be stopped individually, no cycle is necessary to stop the burst transfers.

Abstract: Power consumption may be reduced in a media device including a first processor coupled to the non-volatile memory, either directly or indirectly, allowing the first processor to generate a pointer structure. The first processor may also be coupled, either directly or indirectly to a memory space, allowing the first processor to write the pointer structure in the memory space. The media device includes a second processor, such as a DSP/SHW or peripheral processor, and may be also be coupled, either directly or indirectly to the memory space, allowing the second processor to retrieve a block of media data from the non-volatile memory. Retrieval of the block of media data may be read directly from the non-volatile memory, or in some cases, the media data being retrieved may be parsed. The media data may be an audio file data, video file data, or both.

Abstract: Data is written in data areas (202) and information for correcting an error of the data and status information indicating that the data has been written are written in redundant areas (203) sequentially from the first page of a physical block (201). In the step of creating information to be written in the physical block (201), the redundant areas (203) of the pages are subjected to a binary search to temporarily identify a last valid page. Further, the contents of every area (the data areas and the redundant areas) of the temporarily identified last valid page and a page adjacent to the temporarily identified last valid page are checked to finally identify the last valid page and make a judgment as to whether or not an error page resulting from power-down exists.

Abstract: When a single error of data is detected by an ECC circuit, a cycle adjusting unit provided on a memory board shortens a refresh cycle T1 of a refresh request generating unit to T2 and causes a patrol controlling unit to intensively carry out an error patrol of an error-occurred address at a cycle T3, which is slightly longer than the changed refresh cycle T2. If an error is not detected for more than a predetermined period of time after the error patrol is started, the error patrol is stopped. Furthermore, if a single error is not detected for more than a predetermined period of time after the error patrol is stopped, the shortening of the refresh cycle is cancelled and returned to the original cycle.

Abstract: A non-volatile memory storage system including a connecting interface, a non-volatile memory, a buffer memory, a microcontroller, and a virtual host module is provided. The connecting interface is used for connecting to a host. The non-volatile memory is used for storing user data, wherein the non-volatile memory further stores an expansion read only memory (ROM) image to be read by the host. The buffer memory is used for temporarily storing the expansion ROM image. The microcontroller controls the operation between the connecting interface, the buffer memory, and the non-volatile memory. The virtual host module provides an activation code in the expansion ROM image to the host through the microcontroller. Thereby, both the size and the fabrication cost of the non-volatile memory storage system can be effectively reduced.

Abstract: A data processing circuit includes a rewritable nonvolatile memory and a controller performing nonvolatile memory control and external interface control. A first detector and a second detector are employed to detect respectively whether the operation of the data processing circuit deviates from a first operating condition and a second operating condition, wherein the second operating condition is severer than the first operating condition. When the first detector detects deviation from the first operating condition, reset is instructed to the controller. When the second detector detects deviation from the second operating condition, the controller backs up an internal state and imposes a restriction on external access to a storage region of the nonvolatile memory.

Abstract: Provided is a data storage device including two or more data storage areas including may have two or more (heterogeneous) types of nonvolatile memory cells. At least one of the data storage areas includes a plurality of memory blocks that are sequentially selected, and metadata are stored in the currently selected memory block. The memory blocks can be sequentially used and metadata can be stored in a uniformly-distributed manner throughout the data storage device. Therefore, separate merging and wear-leveling operations are unnecessary. Thus, it is possible to improve the lifetime and writing performance of a data storage device having two or more heterogeneous nonvolatile memories.

Abstract: An information processing apparatus and method for enabling efficient content download and transfer processing operations are provided. In downloading content, a content identifier thereof is acquired, a particular piece of content subject to transfer to an external device is identified on the basis of the acquired content identifier, the identified content is retrieved from a data storage block, and the retrieved content is transferred to the external device or written to an information recording medium, so that the processing of content downloading, the processing of content transfer to an external device and content writing to an information recording medium such as CD can be executed as a sequence of processing operations, thereby providing significantly efficient content download and content transfer or content write processing operations.

Abstract: A method and related system for programming connections between a NAND flash memory controller and a plurality of NAND flash memory modules includes the NAND flash memory controller generating a switch signal and a swap signal according to a condition of one of the plurality of NAND flash memory modules, a remap module selectively coupling the plurality of NAND flash memory modules to the NAND flash memory controller according to the switch signal, and a swap module selectively coupling the plurality of NAND flash memory modules to the NAND flash memory controller according to the swap signal.

Abstract: A system and method for pre-allocating space on a storage medium is described. In some cases, the system receives two or more data items to be stored on a storage medium, pre-allocates a single, contiguous block of space on the medium, and stores the two or more data items within the single, contiguous block of space.

Abstract: Embodiments include methods, apparatus, and systems for snapshots in distributed storage systems. One method of software execution includes using a version tree to determine what data blocks are shared between various storage nodes in the version tree in order to create a clone or a snapshot of a storage volume in a distributed storage system that uses quorum-based replication.

Abstract: A file system and a method for file storage and file search by the same are provided. All files have unique names in a block-based storage device, such as a hard disk, a flash memory, etc., so that each file is mapped and stored in a one-dimensional storage area. Each file name is matched with a memory block storing data of the corresponding file so that a memory block corresponding to a file name can be found when the file name is input. In addition, through information stored in the found memory block, the data corresponding to the file name can be read from the memory block storing the data or can be stored in a specific memory block.

Abstract: A device for storing data includes a nonvolatile memory and a controller and/or circuitry that randomize original data to be stored in the memory while preserving the size of the original data, that store the original data in the memory, and that, in response to a request for the original data, retrieve, derandomize and export the original data without authenticating the requesting entity. A system for storing data includes a first nonvolatile memory and a processor that similarly stores data in the first nonvolatile memory by executing driver code stored in a second nonvolatile memory. ECC encoding is applied either before or after randomizing; correspondingly, ECC decoding is applied either after or before derandomizing.

Abstract: Present invention relates to a mapping apparatus and method for a non-volatile memory supporting different cell types, and more particularly, to a mapping apparatus and method for a non-volatile memory supporting different cell types capable of mapping a logical address to a physical address in the non-volatile memory supporting different cell types in which bits represented by unit cells are different from each other. A mapping apparatus for a non-volatile memory supporting different cell types according to an embodiment of the invention includes: a user request unit used for a user to request a predetermined operation by using a logical address; a non-volatile memory comprising a plurality of memory areas having different cell types; and a mapping management unit determining a physical address to be mapped to the logical address of one of the plurality of memory areas on the basis of the logical address used for the requested operation.

Abstract: A semiconductor device according to the present invention comprises a first non-volatile memory, a second non-volatile memory in which initial data is stored, and an initialization controller for initializing the first non-volatile memory, wherein the second non-volatile memory has anti-stress properties higher than those of the first non-volatile memory, and the initialization controller reads the initial data from the second non-volatile memory when the first non-volatile memory is initialized and copies the read initial data in the first non-volatile memory to thereby initialize the first non-volatile memory.