Abstract: An information processing apparatus includes a determination unit configured to determine whether incorrect updating processing in which information stored in a memory of the information processing apparatus is incorrectly updated has been executed in a first application program for receiving an instruction issued by a user and for controlling execution of processing corresponding to the instruction; a forcible termination unit configured to, when the determination unit determines that the incorrect updating processing has been executed, forcibly terminate the first application program; and a restart control unit configured to, when the determination unit determines that the incorrect updating processing has been executed, after the forcible termination unit terminates the first application program, notify the user of the occurrence of the incorrect updating.

Abstract: Restarting event and alert analysis after a shutdown in a distributed processing system, including: identifying a shutdown condition of the distributed processing system, the incident analyzer including a plurality of event analyzers and a monitor that monitors the plurality of event analyzers; and determining whether the shutdown was a planned shutdown or an unplanned shutdown; if the shutdown was planned, storing an identification of the last event in an event log that was injected in an event queue at the time of the planned shutdown and restarting event and alert analysis using the next event identified in the event log; and if the shutdown was unplanned, for each event analyzer, identifying the last event included in the last event pool that the event analyzer closed; and restarting event and alert analysis at the event analyzer using the next event received by the event analyzer after the identified last event.

Abstract: Restarting event and alert analysis after a shutdown in a distributed processing system includes identifying a shutdown condition of the distributed processing system; determining whether the shutdown was a planned shutdown or an unplanned shutdown; if the shutdown was planned, storing an identification of the last event in an event log that was injected in an event queue at the time of the planned shutdown and restarting event and alert analysis using the next event identified in the event log; and if the shutdown was unplanned, for each event analyzer, identifying the last event included in the last event pool that the event analyzer closed; and restarting event and alert analysis at the event analyzer using the next event received by the event analyzer after the identified last event.

Abstract: An advantageous watchdog function deduces faulty operation of a graphics processing unit from historical-indicating parameters while also accommodating more active testing performed by an application. When a GPU fault is detected, the example non-limiting technology rapidly resets the GPU during an interframe time so the GPU is ready to process new frame instructions or display lists and avoids missing or skipping further frames.

Abstract: A method for acquiring information from a driving operation of a vehicle, in which first information is acquired with respect to at least one operating state of the vehicle and additional second information is ascertained with respect to this at least one operating state using statistical methods, the first and second information concerning this at least one operating state being stored. A method for the assigning and diagnosis of at least one operating state of a vehicle, a control unit, a computer program and a computer-program product are also provided.

Abstract: An information terminal includes a start processing unit of a central processing unit which executes restart processing and a notification unit which outputs reason information indicating a reason for executing the restart processing.

Abstract: The systems and methods of the present disclosure are generally related to managing distributed sales, service and repair operations. In particular, the systems and methods of the present disclosure relate to managing a distributed network of sales, service and/or repair operations that include automated features.

Abstract: A booting method and an apparatus thereof for debugging in a portable terminal are provided. The method includes, when a booting event occurs, stacking a boot loader in a preset boot loader region of a Random Access Memory (RAM), and executing, and stacking an Operating System (OS) in a preset OS region of the RAM, wherein the boot loader region and the OS region of the RAM are set such that they do not overlap each other.

Abstract: A method of a computer system recovering from a core re-initialization failure is described. The method may include automatically detect a core re-initialization failure during a core re-initialization process by a hypervisor. The hypervisor automatically determines whether the core re-initialization failure is a permanent failure. If the core re-initialization failure is a permanent failure, then automatically determine, by the hypervisor, which cores are re-initialized and which cores are indeterminate. Automatically allocate the re-initialized cores between one or more virtual machines by the hypervisor.

Abstract: A method for resetting a system to factory default settings is provided. The method includes: disconnecting-connecting a power source repeatedly; detecting whether a count value of disconnecting-connecting the power source has exceeded a predetermined value; and triggering a procedure of resetting the system to factory default settings when the count value has exceeded the predetermined value.

Abstract: Multiple processor systems are provided. A first processor is configured to monitor the state of at least one other processor by comparing received signals. When the first processor determines that another processor needs to be reset, the first processor provides a reset signal to a reset pin of the processor that needs to be reset. The first processor may reset itself after providing the reset signal.

Abstract: A method, computer-readable storage medium, and computer system are provided. In an embodiment, a detection is made that at least one thread, in a plurality of threads executing in a computer, has hung. A lock order of a plurality of locks used by the plurality of threads is determined. A determination is made that a first thread in the plurality of threads violates the lock order. After the determination that the first thread violates the lock order, the computer is restarted and the first thread that violates the lock order is scheduled on a reduced-speed processor.

Abstract: Some microprocessors and microcontrollers have a bi-directional reset pin. In such devices, output signals on the reset pin are decoded by reset reason decode logic circuitry. The output of the reset reason decode logic can be provided to another device or processor, which generates a readily recognizable output signal indicative of a reason why the processor reset. Output signals that can indicate why a processor was reset can include a high or low state of different durations, serial bit streams or a number of pulses, each of which correspond to and therefore identify a reason why the processor was reset.

Abstract: A computer readable storage medium has instructions for execution on a computer. The instructions monitor transactions between a server and a set of clients. An evaluation of session indicators associated with the transactions is performed. Individual sessions between the server and individual clients of the plurality of clients are isolated in response to the evaluation.

Abstract: A test method for restarting a computing device communicating with a remote computer. The computing device is shut down and awakened by the remote computer. A second hardware information of the computing device after restarting the operating system of the computing device is compared with initial hardware information of the computing device when the computing device is initial started. Test results are stored to a predetermined storage path and displayed on a screen after the test ends.

Abstract: A new, robust non-volatile memory (NVM) reset sequence is provided in accordance with at least one embodiment, which, after reading a Test NVM portion and overwriting NVM configuration registers' default values with the values read from the Test NVM portion, does a read integrity check. If the read integrity check passes, a reset process will conclude. Otherwise, if the read integrity check fails, the reset process will re-try reading the Test NVM and overwriting the NVM configuration registers' default values. If the read integrity check still fails after a maximum number of re-tries, a fail flag will be set, and the predetermined “safe” default values will be reloaded to the NVM configuration registers, thereby assuring that the NVM device is operational.

Abstract: A mechanism for virtual machine (VM)-based disk rescue is disclosed. A method of the invention includes starting a reboot process of a VM hosted on a host computing machine, controlling an invocation of a recovery media that is used by a recovery process on a disk of the VM and is located separate from the VM disk, and restarting the VM after the recovery process using the recovery media successfully completes.

Abstract: In an electronic control apparatus, a microcomputer stops its operation when a power voltage supplied from a regulator starts to fall. When a low voltage detection circuit detects fall of the power voltage, the microcomputer is reset immediately and a communication start detection circuit is permitted to output a communication start signal. It is also possible to maintain the microcomputer in a wait state until proceeding to a sleep mode, and proceed to a normal operation mode when a power-on start signal is changed to be active in a period of the wait state.

Abstract: Embodiments of the present invention provide an apparatus and a method for recording a reboot reason of equipment. Besides a first watchdog provided for triggering a global reset of the equipment, the apparatus provided by the present invention further includes a second watchdog. The second watchdog is used to trigger a logic chip to record a value representing the reboot reason of power-down in a storage array after the equipment is powered on. Thus, reboot reason of the equipment could recorded as power-down reboot.

Abstract: Restarting event and alert analysis after a shutdown in a distributed processing system include identifying a shutdown condition of the distributed processing system; and determining whether the shutdown was a planned shutdown or an unplanned shutdown; if the shutdown was planned, storing an identification of the last event in an event log that was injected in an event queue at the time of the planned shutdown and restarting event and alert analysis using the next event identified in the event log; if the shutdown was unplanned, identifying a previously configured restart mode; selecting an identification of a restart event in the event log according to the previously configured restart mode; and restarting event and alert analysis using the restart event identified in the event log.

Abstract: A computer system includes multiple modules that perform communication via a bus, and abnormality detection circuits that monitor signals on the bus related to communication between the modules to detect a hang-up, wherein each of the abnormality detection circuits is arranged to correspond to a part of the multiple modules, and, when detecting the hang-up, generates and outputs a signal instructing reactivation only of the corresponding module.

Abstract: Restarting event and alert analysis after a shutdown in a distributed processing system includes identifying a shutdown condition of the distributed processing system; and determining whether the shutdown was a planned shutdown or an unplanned shutdown; if the shutdown was planned, storing an identification of the last event in an event log that was injected in an event queue at the time of the planned shutdown and restarting event and alert analysis using the next event identified in the event log; if the shutdown was unplanned, identifying a previously configured restart mode; selecting an identification of a restart event in the event log according to the previously configured restart mode; and restarting event and alert analysis using the restart event identified in the event log.

Abstract: A computer system including a first processor, an error detecting circuit and a south bridge chip is provided. The first processor outputs a first catastrophic error signal. The error detecting circuit is coupled to the first processor to receive the first catastrophic error signal. When the first catastrophic error signal changes to a first level and is maintained for a period exceeding a first predetermined time, the error detecting circuit outputs an internal error reset signal. When the first catastrophic error signal changes to a first level and passes a second predetermined time, the error detecting circuit outputs a machine error reset signal. Here, the second predetermined time is greater than the first predetermined time. The south bridge chip is coupled to the error detecting circuit and reboots the computer system according the internal error reset signal or the machine error reset signal.

Abstract: An apparatus and method for automatically recovering a hardware when the hardware is not accessible from the processing unit. The hardware is recovered via a path different from a path which the processing unit uses when the processing unit fails to access to the hardware via the path initially used.

Abstract: A client terminal receives, in response to a boot command issued by a user to boot the client terminal, a first start command to start monitoring. The client terminal acquires first time information, repeatedly at certain time intervals from a basic software, and stores the first time information in a storage area. The client terminal receives a termination command to terminate the basic software. If the termination command is a command to terminate the basic software by using the basic software, the client terminal stores normal termination information in the storage area. When a second start command is received, and no normal termination information is stored in the storage area, the client terminal acquires second time information from the basic software and creates, depending on a result of comparison between the second time information and the first time information, log information relating to a termination of the basic software.

Abstract: Server management data describes observed operating condition of a pool of spare servers. Based on a demand forecast of a specific target system, a dynamic allocation period is determined as a period during which the target system needs additional server resources to handle an expected demand. Based on the dynamic allocation period and server management data, a set of allocation candidates are nominated from the spare server pool, by eliminating therefrom spare servers which are likely to fail during the dynamic allocation period. An appropriate allocation candidate is then selected for allocation to the target system, such that the selected candidate will satisfy a specified requirement during its allocation period.

Abstract: Error handling is simplified for a self-virtualizing IO resource that utilizes a physical function adjunct partition for a physical function in the self-virtualizing IO resource to coordinate error recovery for the self-virtualizing IO resource, by restarting each virtual function adjunct partition associated with that physical function to avoid the need to coordinate error recovery within the logical partitions to which such virtual function adjunct partitions are assigned.

Abstract: The control device has a receiving device, an output stage, a checking device and a reset device. The receiving device is used to receive at least one data block including control commands from a data bus, the output stage is used to output an output signal in response to the control commands, the checking device is used to output an error signal if the at least one received data block is faulty and/or if no data block is received within a predetermined time, and the reset device is used to reset the output stage in a predefined state if the checking device outputs the error signal. The control device is thus able to react automatically to faultily transmitted data blocks without having to wait for return messages from a transmitting central processor unit.

Abstract: A motor speed determining circuit determining a rotation speed of a motor is provided and a processing of generating motor driving waveform is switched in accordance with the rotation speed of the motor. A resolver signal outputted from a resolver 2 is converted to a digital value by an R/D converter 3, and inputted to a computing circuit of resolver value correction 5 via an R/D conversion interface 4. A current value of a motor M is converted to a digital value by an A/D convertor 8. The computing circuit of resolver value correction 5 computes a resolver correction value of the inputted digital signal and calculates positional data from a corrected resolver value. The computing circuit of motor control computes a current instruction value from a motor current value subjected to digital conversion by the A/D converter 8 and a motor current instruction value etc.

Abstract: A method for commanding and performing network entry is disclosed. The method for commanding network entry using a non-periodic message in a Base Station (BS) includes broadcasting a first pattern indicating ready for restart once or more times to a Mobile Station (MS), when the BS determines to restart due to a serious error of the BS, and performing a restart procedure, and broadcasting a second pattern indicating network entry to the MS, upon completion of the restart procedure.

Abstract: A computer turning on/off testing apparatus for turning on a computer automatically includes a control module, a switch module, and a power supply module. The control module outputs control signals and receives a turn on signal from the computer to determine whether the computer turns on successfully. The switch module receives the control signals and turns on/off the computer according to the control signals. The power supply module provides power to the control module and the switch module. The control module stores a predetermined test time. The control module records abnormal information and test times when the computer turns on/off, and outputs the control signals to turn on the computer again when the computer cannot restart. The computer is turned on and off until a turning on/off time of the computer is equal to the predetermined test time.

Abstract: A reset method performs a software reset in a state in which data in a volatile memory is retained, when an abnormality is generated in a monitoring apparatus. Hardware of the monitoring apparatus may include a function to perform a hardware reset in a state in which the data in the volatile memory is retained, but the software reset is performed with respect to the hardware that does not include such a hardware reset function. The volatile memory may store control information for controlling a host computer monitored by the monitoring apparatus, in addition to data including fault check materials to be retained when the fault is generated. The monitoring apparatus may read the fault information from the hardware to judge whether an abnormal value is reached.

Abstract: An apparatus and method improves the fault tolerance of a rocket or missile guidance system which includes a resonant sensor. When improper initialization is detected, the resonant sensor is reinitialized, repeatedly if necessary, until normal operation is achieved. Improper initialization is detected by comparing data from the guidance system with pre-specified physical limits to roll, pitch, yaw, and/or other features of the flight scenario. Embodiments can also detect a fault condition due to an error signal from a “Built-in-Test” (BIT) module. The initialization sequence initiated by the invention can be identical to the power-on sequence, or it can be a separate, reinitiating sequence. Subsequent resets are initiated as needed, for example until the burn of the rocket fuel and the associated vibrations have ceased and the resonant sensor has been successfully initialized.

Abstract: The present invention is aimed to provide means and methods for recovery of an IP Multimedia Subsystem ‘IMS’ where a Home Subscriber Server ‘HSS’ holding subscriber data for subscribers of the IMS has suffered a restart. A first method of recovery is applied after detecting a HSS restart, and as receiving a registration from a given subscriber or an invitation to communicate with a given subscriber from another subscriber. A second method of recovery is applied after detecting a HSS restart, and as receiving a request from a given subscriber at a S-CSCF previously assigned for serving the given subscriber in the IMS.

Abstract: Disclosed in the present invention are a method and an apparatus for restarting communication after registration of a subscriber identity module SIM card fails, which belongs to the field of mobile communications. The method includes: acquiring failure information about registration of the SIM card; displaying the failure information and prompt information on an interface, and receiving confirmation information that is replied by a user according to the prompt information; and restarting, according to the confirmation information, a communication processor under the condition of not turning off an application processor or not restarting the application processor, so as to re-register the SIM card.

Abstract: A method and system for recovery of a computing environment includes monitoring during a pre-boot phase and a runtime phase of a computing device for selection of a hot key sequence by a user and performing a recovery action in response to the selection of the hot key sequence by the user. The recovery action may be any one of a number of predetermined and/or selectable actions such as restoring system defaults, migrating memory, displaying a menu of options, setting various software flags, restarting or rebooting the computing device, and/or the like.

Abstract: Methods for collection of device reset history from a network communication device comprising: (a) determining whether a reset condition is triggered by software or hardware, (b) for a software triggered reset: (i) upon a software exception, retrieving related reset information, (ii) upon an operator initiation, retrieving related reset information, (iii) allocating space in non-volatile memory, (iv) storing retrieved current reset information together with a corresponding reset time, and (v) adding the current reset information to historical reset information, (c) proceeding with the reset, (d) executing startup code during reboot, (e) upon a hardware triggered reset; (i) retrieving hardware registry and other residual hardware information still present, (ii) allocating space in non-volatile memory, (iii) storing the current retrieved reset information together with a current time that corresponds approximately to the reset and (iv) adding the reset information to historical reset information, and (f) contin

Abstract: An I/O device includes a host interface configured to process function level reset (FLR) requests in a specified amount of time. The host interface includes a control unit and groups of configuration space registers, each group corresponding to a function. The host interface also includes application availability registers, each associated with a respective function, and which may indicate whether application hardware within the respective function is available for access by a corresponding application device driver. The I/O device also includes application hardware resources associated with a respective function. In response to receiving an FLR request of a particular function, the control unit may cause the associated application availability register to indicate that the application hardware within the particular function is not available to the driver.

Abstract: A control apparatus includes a lower layer control unit configured to perform control of a load, an upper layer control unit configured to control the lower layer control unit, a communication unit configured to perform communication between the upper layer control unit and the lower layer control unit via a communication line, a detection unit configured to detect power supply voltage of the lower layer control unit, wherein the upper layer control unit detects communication abnormality of the communication unit and notifies the communication abnormality, the upper layer control unit notifying abnormality of power supply voltage of the lower layer control unit, in such a manner as to be identified from the communication abnormality of the communication unit.

Abstract: A method and system for recovery of a computing environment includes monitoring during a pre-boot phase and a runtime phase of a computing device for selection of a hot key sequence by a user and performing a recovery action in response to the selection of the hot key sequence by the user. The recovery action may be any one of a number of predetermined and/or selectable actions such as restoring system defaults, migrating memory, displaying a menu of options, setting various software flags, restarting or rebooting the computing device, and/or the like.

Abstract: A forced power down signal issues from an I/O device to an information handling system through an optical interconnect if the information handling system fails to power down in response to a normal power down message. A 100% duty cycle signal issues from an optical interface at the I/O device and is detected by an optical interface of the information handling system, which issues a command to force a power down of the information handling system in response to the forced power down signal.

Abstract: The present invention is related to a microcomputer mutual monitoring system in which mutual monitoring is performed between a first microcomputer 11 and a second microcomputer 12, characterized in that if a reset of the second microcomputer is performed due to an occurrence of an abnormal event in the second microcomputer, the monitoring of the first microcomputer is performed by an alternative monitoring function 142 incorporated in the first microcomputer instead of the monitoring of the first microcomputer by a monitoring function of the second microcomputer during the reset. With this arrangement, the microcomputer mutual monitoring system, which can prevent reduced marketability while maintaining reliability as a system, can be obtained.

Abstract: Described herein are a method, system, and computer readable medium for resetting a subsystem of a communication device. The method involves utilizing a subsystem error handler to generate a reset request signal indicating the subsystem has experienced an exception; distributing to a software component, residing externally to the subsystem, a status message indicative of a current state of the subsystem; performing a reset of the subsystem in response to the reset request signal; and rebooting the subsystem. When the subsystem can be reset without performing a system wide reset of the communication device, communication device downtime is reduced, which facilitates a positive user experience.

Abstract: A method for reset a register includes the following step: a computer starts to be booted and perform a booting procedure. Wherein, the computer includes at least one register. Power is supplied to the at least one register. Determine if the computer is booted successfully. If it is determined that the computer fails to be booted, the at least one register is kept to be grounded for a predetermined period of time to reset the at least one register. After the at least one register is grounded, power is supplied to the at least one register again, and the computer is rebooted.

Abstract: A method, computer-readable storage medium, and computer system are provided. In an embodiment, a detection is made that at least one thread, in a plurality of threads executing in a computer, has hung. A lock order of a plurality of locks used by the plurality of threads is determined. A determination is made that a first thread in the plurality of threads violates the lock order. After the determination that the first thread violates the lock order, the computer is restarted and the first thread that violates the lock order is scheduled on a reduced-speed processor.

Abstract: A data processing apparatus executes instructions in a sequence of pipelined execution stages. An error detection unit twice samples a signal associated with execution of an instruction and generates an error signal if the samples differ. An exception storage unit maintains an age-ordered list of entries corresponding to instructions issued to the execution pipeline and can mark an entry to show if the error signal has been generated in association with that instruction. A timer unit is responsive to generation of the error signal to initiate timing of a predetermined time period. An error recovery unit initiates a soft pipeline flush procedure if an oldest pending entry in the list has said error marker stored in association therewith and initiates a hard pipeline flush procedure if said predetermined time period elapses, said hard flush procedure comprising resetting said pipeline to a predetermined state.

Abstract: Hardware reset circuitry including user interface circuitry having at least a first state and a second state and configured, when in the first state, to prevent generation of a hardware reset output signal.

Abstract: A microcontroller device comprising a receiver component configured to receive a one or more reset signals for the microcontroller device; an identification component configured to identify a source of the or each reset signals received by the receiver component; a time interval determining component configured to determine a length of a time interval in accordance with the identified source of the or each reset signals received by the receiver component; a voltage setting component configured to set a voltage of an output of the microcontroller device to a first value on receipt of a reset signal by the receiver component; and a control component configured to maintain the voltage of the output at the first value for the duration of the determined length of the time interval; and set the voltage of the output to a second value on substantial completion of the determined length of the time interval.

Abstract: A forced power down signal issues from an I/O device to an information handling system through an optical interconnect if the information handling system fails to power down in response to a normal power down message. A 100% duty cycle signal issues from an optical interface at the I/O device and is detected by an optical interface of the information handling system, which issues a command to force a power down of the information handling system in response to the forced power down signal.

Abstract: A microprocessor integrated circuit includes first and second processors. The first processor is configured to detect that the second processor has not retired an instruction for a predetermined amount of clock cycles and to responsively reset the second processor. The microprocessor integrated circuit also includes microcode. The second processor is configured to execute the microcode in response to a reset of the second processor. The microcode is configured to read debug information within the microprocessor integrated circuit and to output the debug information external to the microprocessor integrated circuit in response to determining that the reset was performed by the first processor.