Abstract: A communication apparatus includes: a transmitting unit, a receiving unit and a control unit. The transmitting unit transmits video data to an external apparatus via a first transmission line. The receiving unit receives a command from the external apparatus via a second transmission line. The control unit that resets the transmitting unit without resetting the receiving unit if a communication error relating to the first transmission line is detected, and resets the receiving unit without resetting the transmitting unit if a communication error relating to the second transmission line is detected.

Abstract: A method, apparatus, and computer program product for handling a failure condition in a storage controller is disclosed. In certain embodiments, a method may include initially detecting a failure condition in a storage controller. The failure condition may be associated with a specific host and a specific storage device connected to the storage controller. The method may further include determining a failure ID associated with the failure condition. Using the failure ID, en entry may be located in a data collection and recovery table. This entry may indicate one or more data collection and/or recovery processes to execute in response to the failure condition. The method may then execute the data collection and/or recovery processes indicated in the entry. While executing the data collection and/or recovery processes, connectivity may be maintained between hosts and storage devices not associated with the failure condition.

Abstract: A system and method in accordance with exemplary embodiments may include detecting a fault associated with a network element that is communicatively coupled to a network. After detecting the fault, the network element may receive a reset signal in response to the fault detection. After receiving the reset signal, the network element may store a new image of an operating system of the network element into memory associated with the network element. After storing the new image, the network element may reboot. During reboot, the method may load the stored new image of the operating system from memory associated with the network element.

Abstract: Various systems and methods can provide high availability of an application executing in a highly-available virtual machine environment. One method involves receiving information indicating a state of an application executing in a virtual machine from a monitoring agent executing in the virtual machine. In response to receiving the information, the method involves determining whether the virtual machine should be restarted. Based upon that determination, the method then determines whether the monitoring agent should send a heartbeat message to a virtualization controller prior to expiration of a timeout interval. The virtualization controller is configured to restart the virtual machine if the virtual machine does not send the heartbeat message prior to expiration of the timeout interval.

Abstract: Embodiments disclosed herein provide systems and methods that allow a wireless device to reinitialize operating software of the wireless device due to a quantity of failed communication network access requests. In a particular embodiment, a wireless device transfers a plurality of access requests to a communication network during a period of time. The wireless device monitors responses to the plurality of access requests to determine a quantity of failed access requests during the period of time. Then, the wireless device determines whether the quantity of failed access requests is greater than a threshold value. If the quantity of failed access requests is greater than the threshold value, then wireless device reinitializes the operating software of the wireless device.

Abstract: A probe (hereinafter also referred to as a breakpoint) can be added into source code of an application program. The probe can be exported to a file or any other form of storage. The probe is then associated with a unique test case for the application program thereby creating a direct mapping between the application program and the test case for the application program. In one embodiment, the probe can be added to at least one of a function or module of the application program.

Abstract: Apparatus and methods for monitoring a self-service device network. The network may include an electronic payment platform and self-service devices that electronically exchange payment information and are in electronic communication with a transaction authorization channel. The apparatus and methods may involve a receiver module and a web server module. The receiver module may receive fault-related event information from the electronic self-service devices. The receiver module may receive a transaction authorization channel error notification corresponding to the transaction authorization channel. The web server module may provide reporting information based on the fault-related events and the transaction authorization channel error notification to a user.

Abstract: Preventing time out of an IO transaction during CPU re-initialization by controlling the IO transaction so that the time when the IO transaction is continuously stopped during the CPU re-initialization process is within a predetermined time that prevents complete time out of an interrupt of an IO transaction. In a case where the IO transaction would be continuously stopped for greater than the predetermined time during a CPU re-initialization the IO transaction is stopped and restarted within the predetermined time. The status of the interrupt during such stopping and starting is stored so as not to loose the interrupt status during the interval between such stopping and starting.

Abstract: The present invention is directed towards systems and methods for determining failure in and controlling access to a shared resource in a multi-core system. In some embodiments of a multi-core system, individual cores may share the same resource. Additionally, the resource may occasionally fail or need to be reset, and the period during which the resource is being reset may be non-instantaneous. In an embodiment without coordination between the cores, one core experiencing a failure may reset the resource. During the period in which the resource is resetting, another core may interpret the reset as a failure and reset the resource. As more cores interpret the resets as failures, they will trigger resets, quickly resulting in the resource being constantly reset and unavailable. Thus, in some embodiments, a coordination system may be utilized to determine failure of a shared resource and control resets and access to the shared resource.

Abstract: In one embodiment, an intelligent communications device for operating in a network is disclosed. The device includes a storage device having a plurality of partitions storing images for performing boot operations. The device also includes a detection module that is operative to detect a boot failure, and a first restoration module that is operative to restore an active image with a first backup image, in response to a detected boot failure from an active image. The device further includes a second restoration module that is operative to restore a second backup image in response to a detected boot failure after restoration from a first backup image. The device also includes a programmable processor that is programmed to cause execution of boot operations and functions performed by the detection module, first restoration module, and second restoration module.

Abstract: A “high availability” system comprises multiple switches under the control of a control processor (“CP”). The firmware executing on the processor can be changed when desired. Consistent with the high availability nature of the system (i.e., minimal down time), a single CP system implements a firmware change by loading new firmware onto the system, saving state information pertaining to the old firmware, preventing the old firmware from communicating with the switches, bringing the new firmware to an active state and applying the saved state information to the new firmware.

Abstract: After power is restored to a node in a utility network, that node employs one or more of its neighboring nodes as proxies to route a message to a central control facility of the utility. The message contains information about the restored node, and possibly one or more of its neighbor nodes. This information may include reboot counters, the amount of time that the node was down, momentary outages or power fluctuations, and/or the time of power restoration. The node that creates and initially sends the message can be the restored node itself, or another node that recognizes when a restored node has recently come back online.

Abstract: Systems, methods, apparatus and software can implement a flexible I/O fence mechanism framework allowing clustered computer systems to conveniently use one or more I/O fencing techniques. Various different fencing techniques can be used, and fencing mechanism can be customized.

Abstract: A microprocessor includes a bus interface unit that interfaces the microprocessor to a bus that includes a signal that, when asserted, instructs all bus agents to refrain from initiating bus transactions. Microcode causes the bus interface unit to assert the signal in response to detecting an event and resets the microprocessor, but does not reset a portion of the bus interface unit that asserts the signal on the bus. After the reset, the microcode causes the bus interface unit to deassert the signal on the bus. Additionally, the microcode sets a flag and saves the microprocessor state to memory before resetting itself, but does not reset the interrupt controller. After the reset, the microcode reloads the state of the microprocessor from the memory. However, if the microcode determines that the flag is set, it forgoes reloading the state of the interrupt controller.

Abstract: An embodiment of the invention is a client on a local area network that periodically and automatically evaluates its physical connectivity with the local area network, exercises local-network services such as DHCP, and verifies Internet connectivity and function by pinging one or more numerically specified IP addresses and by pinging one or more IP addresses specified by an FQDN (Fully Qualified Domain Name) known to the assigned DNS servers. An embodiment of the invention may include a plurality of client elements monitoring one or more networks. Functionality according to embodiments of the invention can send notices, automatically initiate action, and otherwise assist in, among other things, remote monitoring and administration of networks, and particularly wireless networks.

Abstract: Storage system arrangement wherein: when a transmission destination determines that a source-side serial number included in a received packet is the same as a current destination-side serial number in the transmission destination, the transmission destination processes a content of the received packet in accordance with a command included in the received packet; and when the transmission destination determines that the source-side serial number is not the same as the current destination-side serial number, the transmission destination does not process a content of the received packet.

Abstract: A scalable and fault tolerant finite state machine engine, for example, for use in an automated incident management system, logs or records data in persistent storage at different points or levels during various internal processing of an event associated with an information technology element, and action taken associated with the event, by executing a finite state machine instance that encodes policies for handling incidents on such types of information technology elements. In the event that the finite state machine engine is shutdown during processing, the finite state machine engine is able to pick up from where it left off when it was shutdown, for each abnormally terminated finite state machine instance, by using the data logged in the persistent storage and determining a point of processing from where it should continue its execution.

Abstract: A network system includes a server computer connected to at least one client device and configured to perform at least one operation corresponding to an operation signal received from the at least one client device, and transmitting result data based on the performed operation to a corresponding client device and the at least one client device configured to transmit the operation signal in response to an input from a user, receive the result data transmitted from the server computer and processing the result data, wherein the at least one of the client devices configured to determine whether the result data from the server computer is normal and perform power halting operation for a predetermined time period based on a determination that the result data is abnormal.

Abstract: A storage control apparatus of the present invention reduces the frequency of disk drive failures. An error management part manages the number of times errors occur in respective disk drives. A disk drive in which the number of errors meets or exceeds a threshold value is selected as a disk drive to be restarted. A restart control part commences difference management prior to restarting the disk drive targeted for restart. A difference management part manages parity group-related update locations using a difference bitmap. After commencing difference management, the restart control part restarts the disk drive in which the error was detected. This makes it possible to resolve an error caused by a firmware hangup or the like.

Abstract: A storage system includes first and second expanders for connecting storage units, each of the first and second expanders being connected cascade each other, a first controller connected one of the first and one of the second expanders and a host, a second controller connected the one of the second expanders, the one of the first expanders and the host, the second controller detecting a failure of at least one of the first controller, the first expanders and the second expanders, the second controller selectively controlling a first boot sequence which boots the first controller after the first expanders have been booted and a second boot sequence which boots the first controller before the first expanders have been booted, determining one of the first boot sequence and the second boot sequence on the basis of a place where a failure has occurred in a recovery process.

Abstract: The system monitors a wireless device, detects when the device has failed or is not operating properly, and is able to remotely reset the device. The device may be reset remotely without a technician required to physically attend to the device. This out of band management allows for quicker, cheaper and more efficient handling of undesired states of a device, such as failure to operate. For a modem, the system may detect that the modem is not broadcasting a signal or is not communicating with the Internet or other network. The reset may be implemented through an access point in communication with the malfunctioning modem. For an access point, the system may detect that the access point is not communicating with a modem or another access point. The reset may be implemented by a neighboring access point or modem.

Abstract: A mechanism is provided for detecting and correcting a first number of bit errors in a segment of data stored in a memory region being read, while concurrently detecting the presence of higher numbers of bit errors in that segment of data. In the event of detection of a higher number of bit errors in any single segment of data of the memory region, error correction of that higher number of bit errors is performed on the memory region, while concurrently detecting the presence of an even higher level of bit errors. By performing error correction of higher levels of bit errors in such a hierarchical order, memory latency associated with such error correction can be avoided in the majority of data accesses, thereby improving performance of the data access.

Abstract: A device for improving the fault tolerance of a processor installed on a motherboard, the motherboard comprising memory units and a data input/output interface, the processor being able to execute at least one application, includes: a software layer, called a hypervisor, centralizing exchanges between the said processor and the said application and implementing fault tolerance management mechanisms, and a programmable electronic component forming an interface between the processor on the one hand.

Abstract: A processor and memory system includes memory, a table of exceptions, and a processor. The memory includes a plurality of memory blocks. The table of exceptions identifies at least one of the plurality of memory blocks that includes an expected error. The processor diagnoses a security fault based on data stored in at least one of the plurality of memory blocks and the table of exceptions.

Abstract: A soft-function trigger state machine includes state machine logic defined to use a scan-in waveform to sample a scan-clock waveform to obtain a sampled data pattern. The state machine logic is defined to compare the sampled data pattern to a soft action pattern to determine whether the sampled data pattern matches the soft action pattern. The state machine logic is also defined to trigger an action associated with the soft action pattern when the sampled data pattern matches the soft action pattern.

Abstract: Provided herein are systems and methodologies for bare metal machine restoration of a client computing environment over a network-based backup system. System recovery can be performed by performing a network boot from a predetermined server or set of servers on the Internet and/or an associated local network, followed by retrieving information relating to an operating system and/or environment of a system being recovered, such as incremental or full operating system images. Upon retrieval of information, the information can be used to conduct a full restore of the operating environment of the computing device. Additionally, a user can restore personal or other system data following rebuilding of the system operating environment. A cloud-based structure is provided herein as well as a hybrid peer-to-peer/cloud-based structure, wherein information used in a restore can be obtained from a global network location (e.g., cloud server(s)) and/or from one or more local peers.

Abstract: Provided are a method, system, and article of manufacture for system recovery. An operating system and a backup copy of the operating system are both maintained in a partition of a computational device. A boot loader receives an indication to load the backup copy of the operating system. The boot loader loads the backup copy of the operating system. The computational device is rebooted with the loaded backup copy of the operating system.

Abstract: A boot test apparatus and method can repeatedly execute actions of power-on and power-off for a cold boot test of a computer to test whether the computer is operable. The boot test apparatus includes a microprocessor, a controller, and a power switch. The microprocessor generates a control signal according to a period voltage provided by an internal power supply. The control signal includes a pulse signal and a voltage signal. The controller controls a power switch to send the pulse signal to the computer through a power button of the computer, and controls the power switch to send the voltage signal to the computer through a power input port of the computer. The microprocessor further obtains test information from the computer when the computer executes a cold boot process according to the control signal, and displays the test information on an LED when the cold boot process is abnormal.

Abstract: A circuit monitors and resets a co-processor. The circuit includes a hang detector module for detecting a hang in co-processor. The circuit also includes a selective processor reset module for resetting the co-processor without resetting a processor in response to detecting a hang in the co-processor.

Abstract: A system and a method for handling a system failure are disclosed. The method is adapted for an information handling system having a basic input and output system and a micro-controller. The method includes the following steps: sending, via the micro-controller, a signal; checking, via the micro-controller, whether an acknowledgement is received from the basic input and output system responsive to the signal; and scanning, via the micro-controller, a type of a system failure in response to the acknowledgement being not received.

Abstract: A messaging system may operate on multiple processor partitions in several configurations to provide queuing and topic subscription services on a large scale. A queue service may receive messages from a multiple transmitting services and distribute the messages to a single service. A topic subscription service may receive messages from multiple transmitting services, but distribute the messages to multiple recipients, often with a filter applied to each recipient where the filter defines which messages may be transmitted by the recipient. Large queues or topic subscriptions may be divided across multiple processor partitions with separate sets of recipients for each partition in some cases, or with duplicate sets of recipients in other cases.

Abstract: Error handling is simplified for a self-virtualizing IO resource that utilizes a physical function adjunct partition for a physical function in the self-virtualizing IO resource to coordinate error recovery for the self-virtualizing IO resource, by restarting each virtual function adjunct partition associated with that physical function to avoid the need to coordinate error recovery within the logical partitions to which such virtual function adjunct partitions are assigned.

Abstract: A reset method performs a software reset in a state in which data in a volatile memory is retained, when an abnormality is generated in a monitoring apparatus. Hardware of the monitoring apparatus may include a function to perform a hardware reset in a state in which the data in the volatile memory is retained, but the software reset is performed with respect to the hardware that does not include such a hardware reset function. The volatile memory may store control information for controlling a host computer monitored by the monitoring apparatus, in addition to data including fault check materials to be retained when the fault is generated. The monitoring apparatus may read the fault information from the hardware to judge whether an abnormal value is reached.

Abstract: An HVAC controller, a method for determining the source of a reset of a HVAC unit and a HVAC system are disclosed herein. In one embodiment, the HVAC controller includes: (1) a power on reset (POR) register configured to indicate if a POR has occurred for said controller, (2) a non-volatile memory having a first reset code section and a second reset code section, wherein said first and second reset code sections are each configured to store a reset code and (3) a processor configured to deduce when a source of a reset for said controller is a watchdog reset based on content of said POR register, said first reset code section and said second reset code section.

Abstract: A server having a plurality of system boards, comprising: a panic processing unit configured to stop (panic) the server; a system board information storage unit configured to store information to identify a system board having a memory used by a kernel; a system board detaching processing unit configured to detach the system board having the memory used by the kernel before server stoppage; and a reboot processing unit configured to reboot the server using system boards other than the separated system board among the plurality of system boards, after detaching the system board having the memory used by the kernel.

Abstract: A power-saving computer system comprises a plurality of storage areas provided by one or more storage systems, including at least one first storage area which is always powered on and at least one second storage area which is periodically powered on and off according to a power control schedule. The at least one first storage area provides primary and secondary volumes of a first backup set that is scheduled as always paired. For a second backup set that is scheduled as normally suspended and resynchronized according to a backup schedule, a primary volume of the second backup set is included in the at least one first storage area and a secondary volume of the second backup set is included in the at least one second storage area. The at least one second storage area is powered on during every backup time for resynchronizing the second backup set according to the backup schedule.

Abstract: A semiconductor memory device for use in a multiprocessor system includes a shared memory area and a reset signal generator. The shared memory area is accessible by the processors of the multiprocessor system through different ports, and is assigned to a portion of a memory cell array. The reset signal generator is configured to provide a reset enable signal to a processor, predetermined as a slave processor among the multiple processors, for a predetermined time after an initial booting of the multiprocessor system. The reset signal generator also provides a reset disable signal to the slave processor after the predetermined time lapses.

Abstract: Methods for collection of device reset history from a network communication device comprising: (a) determining whether a reset condition is triggered by software or hardware, (b) for a software triggered reset: (i) upon a software exception, retrieving related reset information, (ii) upon an operator initiation, retrieving related reset information, (iii) allocating space in non-volatile memory, (iv) storing retrieved current reset information together with a corresponding reset time, and (v) adding the current reset information to historical reset information, (c) proceeding with the reset, (d) executing startup code during reboot, (e) upon a hardware triggered reset; (i) retrieving hardware registry and other residual hardware information still present, (ii) allocating space in non-volatile memory, (iii) storing the current retrieved reset information together with a current time that corresponds approximately to the reset and (iv) adding the reset information to historical reset information, and (f) contin

Abstract: Various embodiments include a software provisioning system and method for a vehicle infotainment computer. Software provisioning of the vehicle infotainment computer may occur during vehicle assembly. A software provisioning request may be received for custom installing software to the vehicle infotainment computer. The custom install may be based on a customization schedule which may include a location identifier (such as uniform resource identifiers or file paths) for locating the software. In response to the request, the software may be located on a provisioning server or a portable memory device based on the customization schedule. The software may be transmitted to memory of the vehicle infotainment computer and custom installed on the vehicle infotainment computer.

Abstract: A method and system for recovery of a computing environment includes monitoring during a pre-boot phase and a runtime phase of a computing device for selection of a hot key sequence by a user and performing a recovery action in response to the selection of the hot key sequence by the user. The recovery action may be any one of a number of predetermined and/or selectable actions such as restoring system defaults, migrating memory, displaying a menu of options, setting various software flags, restarting or rebooting the computing device, and/or the like.

Abstract: A method, apparatus, and computer program product are disclosed in a shared processor data processing system for coordinating error reporting for and resetting of a physical I/O adapter that supports virtualization. The physical I/O adapter is virtualized by generating virtual I/O adapters that each represent a portion of the physical I/O adapter. Each one of the virtual I/O adapters is assigned to a different one of client logical partitions. A determination is made regarding whether the physical I/O adapter may have experienced an error. If the physical I/O adapter has experienced an error, all of the client logical partitions are notified about the error and a recovery of the physical I/O adapter is coordinated among all of the client logical partitions by waiting for each client logical partition to acknowledge the error notification before the physical I/O adapter is reset.

Abstract: Device for determining an error induced by a high-pass filter in a signal, including a unit (3) for calculating the error according to the formula: E(t)=Ve(t)?Vs(t)=2·?·Fc·??=t0t(Vs(?)? Vs(?))·d?+E(t0) with: E(t) the value of the error induced by the high-pass filter, as a function of the time variable t, ? the trigonometric constant, Fc the cutoff frequency of the high-pass filter, t0 the initial instant, ? integration variable, Ve the signal input to the high-pass filter, Vs the signal output by the high-pass filter, Vs the mean value of the signal Vs. A method of correcting the error induced is also presented and applicable to the error correction of a piezoelectric pressure sensor.

Abstract: A virtual computer system executes a virtual computer control program on a physical computer and thereby causes guest programs on the logical partitions, respectively. The virtual computer control program includes an error recovery module to periodically recover from an error in a cache memory, an error interruption handler module responsive to an interruption notice caused by an error which has occurred in the cache memory, to recover from an error in the cache memory, and an error data initialization module to recover from an error in the cache memory with shutdown or restart of one of the logical partitions as a momentum. And the virtual computer control program conducts recovery processing from an error in the cache memory.

Abstract: An integrated circuit card includes a central processing unit, a memory and an abnormal condition detector. The memory stores data to be processed by the central processing unit. The abnormal condition detector detects whether at least one operating condition of the integrated circuit card is within one of a suspend region or a reset region. The abnormal condition detector controls an operation of the central processing unit in accordance with the detection.

Abstract: A resource management module of a management server for controlling a multi-root I/O manager connected to a PCI switch for connecting a plurality of I/O devices and a plurality of computers with each other includes: failure handling content information indicating, for each computer sharing a multi-root I/O device, a content of a failure handling at an occurrence of a failure in the multi-root I/O device; and failure handling availability status information indicating whether a hardware reset of the multi-root I/O device is possible and updates, upon reception of a notification of the occurrence of the failure in the multi-root I/O device, the failure handling availability status information, and instructs, based on the failure handling availability status information, the multi-root I/O manager to restrain or cancel the hardware reset of the multi-root I/O device.

Abstract: There is disclosed a method capable of resetting a fault tolerant computer in complete synchronization among modules. The method includes a step of generating a reset requesting signal by one of the modules, a step of dividing the reset requesting signal to first and second reset requesting signals, a step of transmitting the second reset requesting signal to the other module, a step of delaying the first reset requesting signal in the one module by a time required for transmitting the second reset requesting signal to the other module, a step of resetting at least one CPU included in the one module by a first CPU reset signal generated based on the first reset requesting signal delayed in the one module, and a step of resetting at least one CPU included in the other module by a second CPU reset signal generated based on the second reset requesting signal transmitted to the other module.

Abstract: A method for operating a system, as well as a computer program and a computer program product for executing the method. In the method for operating a system, which includes a plurality of control units, in the event that a special state exists for one of the control units, at least one of the other control units is informed about it.

Abstract: The present invention relates to a method for managing the restarting of automatic control equipment, consisting in: backing up, on an outage of the main electrical power supply, in a non-volatile memory (Flash 2) of the automatic control equipment, the data and a signature (LID?) associated with the mapping of the data in the volatile memory (RAM) of the application program which is running at the time of the outage, after the end of the main electrical power supply outage, reloading the application program into the volatile memory (RAM) from a backup available in another non-volatile memory (Flash 1), comparing the signature (LID?) with a signature backed up (LID) to decide on a restart of the automatic control equipment.

Abstract: An outdoor unit includes an outdoor unit control circuit, an inverter substrate and a compressor. Periodic communication showing the operating condition of the inverter substrate is set from the inverter substrate to the outdoor unit control circuit. Thus, when the communication is performed normally, the drive of the compressor is changed to a power saving process according to the necessity of the power consumption and the operating condition of the inverter substrate. When the communication is defective, the power-on reset is done to the inverter substrate.

Abstract: A microprocessor includes a bus interface unit that interfaces the microprocessor to a bus that includes a signal that, when asserted, instructs all bus agents to refrain from initiating bus transactions. Microcode causes the bus interface unit to assert the signal in response to detecting an event and resets the microprocessor, but does not reset a portion of the bus interface unit that asserts the signal on the bus. After the reset, the microcode causes the bus interface unit to deassert the signal on the bus. Additionally, the microcode sets a flag and saves the microprocessor state to memory before resetting itself, but does not reset the interrupt controller. After the reset, the microcode reloads the state of the microprocessor from the memory. However, if the microcode determines that the flag is set, it forgoes reloading the state of the interrupt controller.