Abstract: A testing system for bus parameters includes a wave displaying unit and a control module connected to the wave displaying unit. The control module includes a decode unit, a testing unit connected to the decode unit, and an output unit connected to the testing unit. The decode unit is connected to the wave displaying unit. The wave displaying unit is configured for receiving an electronic signal from a bus to be tested. The decode unit is configured for decoding the electronic signal to determine if the electronic signal is valid. The testing unit tests parameters of the bus. The output unit displays testing results for the parameters.

Abstract: A semiconductor device including an electronic circuit, a memory, and an error detecting module. The electronic circuit is configured to receive an input signal having been generated by a test module, and generate an output signal based on the input signal. The memory is configured to store a predetermined output value that is expected to be output from the electronic circuit based on the electronic receiving the input signal, wherein the predetermined output value is stored in the memory prior to the input signal being generated by the test module. The error detecting module is configured to (i) generate a sample value of the output signal, (ii) compare the sample value of the output signal to the predetermined output value stored in the memory, and (iii) generate a result signal that indicates whether the sample value of the output signal matches the predetermined output value.

Abstract: A system for monitoring a device under test implemented within an integrated circuit (IC) can include at least one probe that detects a designated type of data transaction, where in response to detecting the designated type of data transaction, each probe outputs a single data transaction detection signal. The system also can include a data collector coupled to each probe, where the data collector stores an indication of each data transaction detection signal that is output by each probe. The data collector can be configured so that no value of any probed signal is stored.

Abstract: A novel RDMA connection failover technique that minimizes disruption to upper subsystem modules (executed on a computer node), which create requests for data transfer. A new failover virtual layer performs failover of an RDMA connection in error so that the upper subsystem that created a request does not have knowledge of an error (which is recoverable in software and hardware), or of a failure on the RDMA connection due to the error. Since the upper subsystem does not have knowledge of a failure on the RDMA connection or of a performed failover of the RDMA connection, the upper subsystem continues providing requests to the failover virtual layer without interruption, thereby minimizing downtime of the data transfer activity.

Abstract: A data processing device includes a computing circuit that accesses a peripheral device connected to through a internal bus, an internal bus connection circuit that is provided between the computing circuit and the internal bus, and switches an enable and a disable state of an access from the computing circuit to the internal bus, an exception notification controller that outputs an exception occurrence notification signal to the computing circuit based on an error occurred in the peripheral device, and a bus disablement controller that instructs the internal bus connection circuit to disable an access from the computing circuit to the internal bus in accordance with the notification of the exception occurrence notification signal, and instructs the internal bus connection circuit to cancel the disablement of the access in accordance with a start of an exception processing based on the exception occurrence notification signal.

Abstract: Method and system for processing a management operation command received from a management entity is provided. The management operation command is received by an emulation module for a switch element operationally coupled to the management entity. The switch element includes a plurality of ports, each port having a plurality of components designated as managements devices. The emulation module determines if identification information for a management device in the command matches with identification information stored by the switch element to emulate the management device. If the information matches, then the management operation identified in the management operation command is performed by the emulation module interfacing with a switch element processor.

Abstract: A method for detecting peripheral component interconnect (PCI) system errors is applied in a computing device. The computing device includes a north bridge, a baseboard management controller (BMC) connected to the north bridge, and a PCI bus connected to the north bridge. The north bridge detects a PCI system error of the PCI bus, and notifies the BMC of the PCI system error. In response to notification of the PCI system error, the BMC records error information of the PCI system error in a storage system of the computing device.

Abstract: A device may detect and report failure in point-to-point Ethernet links. In one implementation, the device may determine, based on a periodic timing signal, whether at least one packet was received on an incoming Ethernet link during a previous period of the periodic timing signal. The device may update an entry in a circular buffer to indicate whether the at least one packet was received during the previous period of the periodic timing signal and analyze the circular buffer to determine whether there is a signal failure on the incoming Ethernet link.

Abstract: A network monitor and control apparatus for controlling the monitoring of a network are provided. The network monitor includes an error monitor including an error information gatherer for gathering error information of a monitor target apparatus; and a monitor result notifier for notifying of monitor results, wherein if there are N types of monitor target functions, the error monitor includes N error information gatherers for the respective N types of monitor target functions (N=1, 2, 3, . . . ) and wherein each of the N error information gatherers gathers the error information from one of an existing monitor target apparatus and a newly added monitor target apparatus on a per monitor target function basis.

Abstract: Verifying a customer premises connection to a communication system having a plurality of ports, each of which serves a corresponding customer premises. A known quantity of data is transmitted to an address corresponding to a specific customer premises. A quantity of data received at a first trial port of the plurality of ports is monitored. If the known quantity of data matches the monitored quantity of data received at the first trial port, then the customer premises connection to the first trial port is thereby verified. If the known quantity of data does not match the monitored quantity of data received at the first trial port, then quantity of data received at a second trial port of the plurality of ports is monitored and, if the known quantity of data matches the monitored quantity of data received at the second trial port, then the customer premises connection to the second trial port is thereby verified.

Abstract: A method may include receiving a first set of parameters associated with a test environment, the test environment including a test system for testing a network, receiving a test objective, conducting a first test case based on the received first set of parameters and the test objective, automatically determining, by the test system, whether the test objective has been satisfied based on a first test result associated with the first test case, and automatically adapting, by the test system, a second test case based on the first test result when it is determined that the test objective has not been satisfied.

Abstract: An access node (e.g., DSLAM, OLT/ONT) is described herein that implements a trust verification method comprising the steps of: (a) filtering an up-stream message initiated by a non-trusted device (e.g., CPE); (b) intercepting the filtered up-stream message if the filtered up-stream message is a connectivity fault management message (e.g., LB message, LBR message, CC message); (c) inserting a trusted identification into the intercepted up-stream message; and (d) outputting the intercepted up-stream message with the inserted trusted identification. Thereafter, a trusted device (e.g., BRAS) receives and analyzes the outputted up-stream message with the inserted trusted identification message to ascertain a trustworthiness of the non-trusted device (e.g., CPE). Several different ways that an access network (e.g., IPTV network) can implement the trust verification method are also described herein.

Abstract: A management system for managing storage systems, having first correspondence information concerned with correspondence of copy pairs with copy groups as setting of remote copying of data in logical volumes of the storage systems, and second correspondence information concerned with correspondence of physical paths and logical paths between the storage systems with the copy groups, wherein when failure information designating a certain physical path is received, a copy group affected by failure in the certain physical path is specified and displayed by referring to the first correspondence information and the second correspondence information. Consequently, physical paths can be monitored from the viewpoint of remote copying.

Abstract: An I/O device management table that manages the types of I/O devices connected to an I/O switch is provided, and one or plural unallocated I/O devices are defined and registered as standby I/O devices. When a failure occurs in any of I/O devices, the I/O device management table is used to select an I/O device of the same type as the failed I/O device from the standby I/O devices, and the selected I/O device is allocated to a computer to which the failed I/O device is connected. I/O device management can be eased at failure in a computer including an I/O switch device.

Abstract: A multi-chassis network device sends state information to internal consumers within the multi-chassis device via a hierarchical distribution. As one example, a primary master routing engine within a control node of a multi-chassis router forwards state information to local routing engines within other chassis, which in turn distribute the state information to consumers on each chassis. Each local routing engine defers sending acknowledgement to the master routing engine until acknowledgements have been received from all consumers serviced by the local routing engine. Embodiments of the invention may reduce control plane data traffic and convergence times associated with distribution of state updates in the multi-chassis network device.

Abstract: A method for detecting lack of forward progress in a PCI Express includes a step in which a data flow measurement is received or performed. This data flow measurement provides the capacity of the connected Switch or Endpoint device to receive data packets from a Root Complex transmit channel. An error is logged when the data flow measurement does not substantially change in a predetermined period of time. A recovery protocol is executed after logging of the error. A system implementing the method of the invention is also provided.

Abstract: An input/output controller, including: a first/a second input/output units that sends and receives data to and from a first and a second external apparatus, a third input/output unit operating in one of a plurality of working modes including a first/a second working mode for sending and receiving data to and from the first/the second external apparatus, an abnormal state detecting unit which detects that the first input/output unit or the second input/output unit is in an abnormal state and a working mode setting unit which makes the third input/output unit operate in the first/the second working mode when it is detected that the first/the second input/output unit is in an abnormal state.

Abstract: A storage system includes a storage device for storing data, a pair of adapters connected with the storage device, each of the adapters transmitting and receiving the data to and from the storage device respectively. The storage system includes a controller, connected with the adapters, for collecting performance information indicating performance of each of the adapters, comparing the collected performance information of the adapters with each other, and detecting a suspected adapter that is suspected of having a performance failure on the basis of a result of the comparison.

Abstract: A system and method for verifying the receive path of an input/output device such as a network interface circuit. The device's operation with various different input sources (e.g., networks) and output sources (e.g., hosts, host buses) is modeled in a verification layer that employs multiple queues to simulate receipt of packets, calculation of destination addresses and storage of the packet data by the device. Call backs are employed to signal completion of events related to storage of packet data by the device and modeling of data processing within the verification layer. Processing of tokens within the verification layer to mimic the device's processing of corresponding packets is performed according to a dynamic DMA policy modeled on the device's policy. The policy is dynamic and can be updated or replaced during verification without interrupting the verification process.

Abstract: Stream data is structured including data tuples as a query process target and a recovery point tuple for indicating a position of the data tuples in the stream data. Upon detection of a failure at a computer, another computer reads position information in the stream data indicating a position of data tuples already subjected to the query process by a stream processing apparatus from a recovery points, uses the recovery point positioned lastly among the read recovery points as a reenter point of the input stream, and instructs a stream distribution apparatus to reenter the input stream starting from the reenter position into the other computer.

Abstract: A communication device for transmitting data to a communication partner device includes a transmitter for transmitting transmit data to the communication partner device, a determiner for determining a check value from the transmit data in accordance with a determination specification, a receiver for receiving a verification value from the communication partner device, and a checker configured to compare the check value with the verification value and to provide a fault indication signal as a function of the comparison.

Abstract: An approach is provided for bit error rate characterization. A test signal representing one or more Ethernet frames exhibiting a particular bit error rate is generated. The test signal is output to a device under test. Traffic is received from the device under test. A determination is made as to whether a link failure condition exists at a port on an Ethernet switch.

Abstract: An apparatus and method for testing a network-based storage virtualization system. A tester is connected to a host side of a storage virtualization system. The tester provides test scripts to the storage virtualization system to test I/O and other operations. A separate link, independent of said storage virtualization system, is provided to a storage side of said storage virtualization system to allow verification of the correct translation from virtual to physical independent of the data path used by the virtualization system. Thus, the tester verifies, over the separate link, the physical configuration of VLUNs and data written to the VLUNs by the tester on storage devices.

Abstract: Systems and methods to respond to schedule commands at a memory controller are disclosed. A transmission error between a first memory controller port and a first redrive device may be detected. A first corrective action may be initiated at the first memory controller port in response to the detection of the transmission error. A particular method may include determining that a second memory controller port initiated a second corrective action. Incoming read commands may be distributed based on a comparison of the first corrective action and the second corrective action.

Abstract: A method tests peripheral component interconnect express (PCI-E) switches. A second PCI-E switch to be tested electronically connects to a first PCI-E switch of a computing device. A first data packet is created by the computing device and sent from the first PCI-E switch to the second PCI-E switch. A second data packet sent back by the second PCI-E switch is received by the computing device. The second PCI-E switch works normally if the first data packet is identical to the second data packet. The second PCI-E switch does not work normally if the first data packet is not identical to the second data packet.

Abstract: An electronic adapter device and an electronic system that comprises the electronic adapter device are described. The electronic adapter device comprises a device and a redundant device able to receive data from a first plurality of electronic devices and redundant data from a second plurality of electronic devices, and able to select therefrom first data and first redundant data respectively. The electronic adapter device also comprises a controller able to receive the selected first data and the selected first redundant data and is able to generate therefrom an error signal indicating a fault in an electronic device of the first plurality or a fault in the device.

Abstract: An embodiment of the invention is a technique to manage failover and failback. A failover of a first path is detected. The first path corresponds to a first device in a plurality of physical devices having M device types. A connection status of the first device is determined if the failover is detected. The connection status is one of a connected status and a disconnected status. The disconnected status corresponds to the failover. The first path is adjusted according to the connection status.

Abstract: A computer system including a plurality of PCIe paths is configured such that a failed PCIe path only is disabled, thereby preventing the computer system from system resetting. The computer comprises a root port for detecting a failure on a PCIe path, and then for issuing a SMI (System Maintenance Interrupt) to a CPU; and the CPU for, on the receipt of the SMI, executing BIOS to issue, through the root port, a PCIe reset to the PCIe path on which the failure has occurred.

Abstract: A network component is disclosed that includes a memory comprising a data structure comprising an optical network terminal management and control interface (OMCI) comprising a plurality of managed entities (MEs), wherein one of the MEs is a description of the OMCI. Also disclosed is a network component comprising a processor configured to implement a method comprising promoting the sending of an OMCI Description to an optical line terminal (OLT), wherein the OMCI Description comprises an OMCI Object, whose instance describes the types of MEs supported by an OMCI, a plurality of Managed Entity Objects, whose instances describe each ME supported by the OMCI, and a plurality of Attribute Objects, whose instances describe each attribute supported by the OMCI.

Abstract: Methods and systems for capturing error information regarding a Serial Advanced Technology Attachment (SATA). An initiator device is enhanced in accordance with features and aspects hereof to detect an error condition in operation of the system and to transmit error information to the SATA target device during a soft reset condition applied to the SATA target device. The SATA target device discards all such frames received during the soft reset condition until the initiator device clears the soft reset condition. The error information may be captured for further analysis and debug of the error condition by suitable error analyzer equipment such as a SATA bus analyzer. The initiator device may be a SATA initiator or a Serial Attached SCSI (SAS) initiator using the SATA Tunneling Protocol (STP). Features and aspects hereof may also include a SAS/SATA bridge device coupling a SAS initiator to the SATA target device.

Abstract: An apparatus, system, and method are disclosed for rapidly grading the operating condition of computer storage. A storage log module 312 logs error information regarding any error in a storage subsystem 302 that occurs during normal operation. A storage test module 314 performs a cursory check 318 of the storage subsystem 302 as requested by a user. A storage diagnostic module 316 grades the storage subsystem 302 on an operating condition scale based at least in part upon the error information logged and upon results of the cursory check 318. In one embodiment, the storage subsystem 302 is graded as pristine if no error has been logged and no error was detected by the cursory check 318, as potentially failing if any error has been logged but no error was detected by the cursory check 318, and as failing if any error was detected by the cursory check 318.

Abstract: An apparatus, program product and method logically divide a group of nodes and causes node pairs comprising a node from each section to communicate. Results from the communications may be analyzed to determine performance characteristics, such as bandwidth and proper connectivity.

Abstract: A network switch including a first port, a transfer circuit, and a redirect circuit. The first port is configured to exchange frames of data with a network, the first port configured to operate in a first mode and a second mode. The transfer circuit is configured to transfer the frames of data from the first port to a second port based on information stored in a forwarding table when the first port is operating in the first mode. The redirect circuit is configured to transfer the frames of data to a predetermined backup port associated with the first port when the first port is operating in the second mode.

Abstract: An apparatus and method are described for discovering a configured tunnel between nodes on a path in a data communications network. In an embodiment, an apparatus is arranged to remotely access at least one node on the path, identify whether a tunnel is configured on the access node and, if so, identify whether the identified tunnel has a fault.

Abstract: A diagnostic control methodology provides reduced disruption of device operation when performing diagnostics on devices within a computer system. A diagnostic application notifies a device driver that controls a particular device that diagnostics should be performed during a period of low activity on the device. In response to receiving the notification, the device driver waits for a time of low activity and either notifies the application to unload the device driver and load a diagnostic device driver, or enters a diagnostic mode directly if such operation is supported by the functional device driver. A timeout duration can be specified, and may be set by the notification, so that the diagnostics will be performed within the timeout period even if a time of low activity has not occurred by the expiration of the timeout.

Abstract: A self-checking network is provided, comprising a first command processor configured to execute a performance function and a second command processor configured to execute the performance function, coupled to the first command processor. The self-checking network also comprises a first monitor processor configured to execute a monitor function that is coupled to the first command processor and a second monitor processor configured to execute the monitor function that is coupled to the second command processor. The first and second command processors compare outputs, the first and second monitor processors compare outputs, and the first monitor processor determines whether an output of the first command processor exceeds a first selected limit.

Abstract: A bussed system with a fast and compact majority voter in the circuitry responsible for the bus inversion decision. The majority voter is implemented in analog circuitry having two branches. One branch sums the advantage of transmitting the bits without inversion, the other sums the advantage of transmitting the bits with inversion. The majority voter computes the bus inversion decision in slightly more than one gate delay by simultaneously comparing current drive in each branch.

Abstract: A communications architecture utilizes modules arranged in a daisy-chain, each module supporting multiple input and output ports. Point-to-point links are arranged so that a first output link of each of multiple modules connects to the next module in the chain, and a second output link connects to a module after it, and inputs arranged similarly, so that any single module can be by-passed in the event of malfunction. Multiple chains may be cross-linked and/or serviced by hubs or chains of hubs. Preferably, the redundant links are used in a non-degraded operating mode to provide higher bandwidth and/or reduced latency of communication. The exemplary embodiment is a memory subsystem in which the modules are buffered memory chips.

Abstract: A method to minimize performance degradation during communication path failure in a data processing system, comprising a host computer, a storage controller, and a plurality of physical communication paths in communication with the host computer and the storage controller, where the method establishes a threshold communication path error rate, and determines an (i)th actual communication path error rate for an (i)th physical communication path, wherein that (i)th communication path is one of the plurality of physical communication paths. If the (i)th actual communication path error rate is greater than the threshold communication path error rate, the method discontinues use of the (i)th physical communication path.

Abstract: Techniques for monitoring distributed software health and membership of nodes and software components operating in a compute cluster are disclosed. In one embodiment, each node in the compute cluster operates a watchdog monitoring component in addition to software operating components. The watchdogs are provided with a list of all nodes in a compute cluster that identifies every node's neighboring nodes. Each watchdog checks the health of one of its neighboring node, ensuring that this neighboring node is healthy and is operating successfully. Additionally, each watchdog verifies the cluster membership of its other neighboring nodes to ensure that the cluster is operating an adequate number of operating nodes, and that an adequate number of watchdogs are present in the cluster. If an unhealthy or non-member node is identified, the watchdog may initiate corrective action and attempt to restore the node to a correct operational state.

Abstract: A method performed by a domain name service client includes storing DNS entries in a local cache; sending a DNS query to another device to obtain an update to one of the DNS entries; determining whether a DNS response is received; and resetting a time-to-live (TTL) timer associated with the one of the DNS entries when the DNS response is not received.

Abstract: A method and circuit for implementing enhanced memory reliability using memory scrub operations to determine a frequency of intermittent correctable errors, and a design structure on which the subject circuit resides are provided. A memory scrub for intermittent performs at least two reads before moving to a next memory scrub address. A number of intermittent errors is tracked where an intermittent error is identified, responsive to identifying one failing read and one passing read of the at least two reads.

Abstract: A computer program product is provided for performing a method including: receiving transmission data over a selected time interval for each of a plurality of communication paths; calculating an average round-trip transmission time for each of the plurality of communication paths over the time interval; comparing an average round-trip transmission time for a communication path having the highest average round-trip transmission time to a threshold value and to a multiple of an average round-trip transmission time for a communication path having the lowest average round-trip transmission time; and determining, based on a result of comparing the highest round-trip transmission time to the threshold value and to a multiple of the lowest round-trip transmission time, whether the time period indicates a delay in communication between the I/O subsystem and the control unit requiring at least one of a monitoring action and a recovery action.

Abstract: A process control system is provided having a plurality of I/O devices in communication using a bus. A primary redundant I/O device and a secondary redundant I/O device are coupled to the bus, where the secondary redundant I/O device is programmed to detect a primary redundant I/O device fault. The secondary redundant I/O device, upon detecting the primary redundant I/O device fault, publishes a primary redundant I/O device fault message on the bus. The controller may deactivate the primary redundant I/O device and activate the secondary redundant I/O device responsive to the primary redundant I/O device fault message.

Abstract: A USB test circuit for use in a USB device such as a system LSI with a USB function for testing the USB function generates and outputs a packet to be measured for a signal quality test. In the test circuit, a test signal including a test_sin signal carrying operation mode information is inputted via a serial interface to a serial interface block, and a packet to be measured is generated by a data pattern generation block and a transmission data delivery block depending on the operation mode information. The packet to be measured is outputted via a UTMI interface to a USB PHY layer. Thus, a packet to be measured for a signal quality test is generated and outputted without receiving packets not to be measured such as a SETUP packet and a DATA packet, thereby reducing the test time.

Abstract: An information handling system includes a peripheral component interconnect express root complex, a basic input output system, and a root complex mirroring block. The peripheral component interconnect express root complex includes a plurality of peripheral component interconnect express ports. The basic input output system is in communication with the peripheral component interconnect express root complex, and is configured to detect a peripheral component interconnect express adaptor configuration, and to set a peripheral component interconnect express mirroring setting based on the peripheral component interconnect express adaptor configuration. The root complex mirroring block is in communication with the basic input output system, and is configured to mirror data between a first peripheral component interconnect express adaptor and a second peripheral component interconnect express adaptor based on the peripheral component interconnect express mirroring setting.

Abstract: Method and system is provided where PHY state change (PHY CHANGE) notifications from one or more PHYs in a storage infrastructure are monitored as a potential error condition. The rate of PHY CHANGE notifications is monitored to determine if the rate of PHY CHANGE notifications may cause a loss of service or degrade I/O performance. An excessive rate of PHY CHANGE notification that may cause a loss of service is detected by comparing a current PHY CHANGE count with a burst threshold value. The current PHY CHANGE count is also compared to an operational threshold value to detect if the rate of PHY CHANGE notification may result in degradation of overall I/O performance. If the PHY CHANGE count for a PHY equals or exceeds the burst threshold value or the operational threshold value, then the PHY is disabled.

Abstract: A communicator is adapted to perform communications with an external apparatus. A rewritable memory stores a control program configured to control an operation of the electronic apparatus, and a first communication program. An unrewritable memory stores a second communication program. A first inspector is operable to judge whether the control program is normal. A second inspector is operable to judge whether the first communication program is normal. A first downloader is operable to download the control program from the external apparatus by way of the communicator under the control of the first communication program, in a case where the first inspector judges the control program is not normal and the second inspector judges the first communication program is normal.

Abstract: An interface system is provided between a source component (210) and a destination component (220) having multiple parallel lines for transmitting data or parity bits (231-234, 251-253) and one or more spare lines (241-243). An error detection means (222) identifies one or more faulty lines. A mapping means (228) re-routes data or parity from a faulty line to a spare line. A communication link (208) is provided for communicating the re-routing between the source component (210) and the destination component (220). The error detection and mapping can be repeated to detect and re-route sequential multiple-bit line errors using additional spare lines (241-243).

Abstract: Isolation of faulty links in a transmission medium including a method that includes receiving an atomic data unit via a multi-link transmission medium that has a plurality of transmission links An error condition is detected and it is determined that the error condition is isolated to a single transmission link. It is determined if the single transmission link has been isolated previously as a failing transmission link a specified number of times within an interval specified by a timer. If the single transmission link has been isolated previously as a failing transmission link a specified number of times within an interval specified by a timer then: identifying the single transmission link as a faulty transmission link; resetting the timer; and outputting an identifier of the single transmission link.