Including Emulation Patents (Class 717/134)
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Patent number: 8352907Abstract: A software application recreation in a computing environment is provided. One embodiment involves analyzing program execution trace data of a software application, and using the analysis results in recreating an executable version of the software application from data traced at significant points during the software application execution. Recreating an executable version of the software application involves creating white space code to simulate the software application execution timing by replacing business logic code of the software application with white space code in the recreated executable version. The recreated executable version of the software application programmatically behaves essentially similarly to the software application.Type: GrantFiled: August 10, 2009Date of Patent: January 8, 2013Assignee: International Business Machines CorporationInventors: Paul Kettley, Ian J. Mitchell
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Publication number: 20120331441Abstract: Various exemplary embodiments relate to a method and related network node including one or more of the following: determining, by the session establishment node, that a session should be established for the developer; transmitting, to a sandbox server, an instruction to establish a sandbox for the session; transmitting to the sandbox server, an identification of an emulator associated with the session; and notifying the developer when the sandbox is available for use. Various exemplary embodiments relate to a method and related network node including one or more of the following: receiving, by the sandbox server, an instruction to establish a sandbox; establishing the sandbox on the sandbox server; and instantiating a device emulator on the sandbox.Type: ApplicationFiled: June 24, 2011Publication date: December 27, 2012Applicant: ALCATEL-LUCENT TELECOM LTD.Inventor: Kevin S. Adamson
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Publication number: 20120317555Abstract: A method for developing and testing an application for a device with one or more sensors using a sensor emulation environment that may allow testing of the application in a programmatic manner. The sensor emulation environment may emulate actual physical sensors. The sensor emulation environment may receive sensor simulation data from multiple types of sources of sensor data. A sensor data engine may receive sensor simulation data from a selected data source via an API. The data engine may provide data values at times that represent operation of a sensor. The sensor emulation environment may further include a sensor interface component that emulates a hardware interface to the emulated sensor in a physical target device such that application components, such as a driver, may interact with the sensor emulation environment.Type: ApplicationFiled: June 10, 2011Publication date: December 13, 2012Applicant: Microsoft CorporationInventors: Vamsee R K Aluru, Pankaj Kachrulal Sarda, Madhu Vadlapudi
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Patent number: 8332818Abstract: A computer-based automated testing framework tests a multimedia application (such as a Flash application running in a player module) that includes one or more Flash objects by executing test scripts in an external Java-based test module that uses proxy objects in the test module to represent the Flash objects in the player module. Correspondence between the proxy object and Flash objects is maintained by translating the first test script into a command, sending the command from the external test module to the player module, interpreting the command by accessing a lookup table at the player module, and then returning a value to the external test module in response to the command.Type: GrantFiled: June 26, 2006Date of Patent: December 11, 2012Assignee: Versata Development Group, Inc.Inventors: Justin Haugh, Ryan Kennedy, Matt Schemmel
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Patent number: 8321837Abstract: Techniques are provided for determining a minimum set of permissions for a software component. A first set of minimum permissions is determined for proper execution of the software component. The first set designates one or more permissions. Determining the first set includes performing iterative testing to determine whether one or more user permissions are included in the first set by only disabling one of the user permissions on an iteration. Verification processing may be performed in which a second set of minimum permissions is determined and the first set may be compared to the second set to determine whether the first set is equivalent to the second set.Type: GrantFiled: January 23, 2006Date of Patent: November 27, 2012Assignee: Microsoft CorporationInventors: Eric D. Broberg, Matthew B. Jeffries, Matthew Cohen
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Patent number: 8307435Abstract: The execution of a software application is diverted to detect software object corruption in the software application. Software objects used by the software application are identified and their pointers are inspected. One or more tests are applied to pointers pointing to the virtual method tables of the software objects, addresses (or pointers) in the virtual method tables, and memory attributes or content of the memory buffer identified by the addresses for inconsistencies that indicate corruption. A determination of whether the software objects are corrupted is made based on the outcome of the tests. If software object corruption is detected, proper corrective actions are applied to prevent malicious exploitation of the corruption.Type: GrantFiled: February 18, 2010Date of Patent: November 6, 2012Assignee: Symantec CorporationInventors: Uriel Mann, Nishant Doshi
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Patent number: 8271962Abstract: Input from a text editor containing lines of text of a script is received, commands to control objects in a simulation are identified in the lines of text in the editor, a state of the simulation is updated in accordance with the input and the commands, and the simulation is displayed in a graphical display. A computer program enables a user to walk around in a simulation, with the events in the simulation determined by pre-written scripts.Type: GrantFiled: September 10, 2007Date of Patent: September 18, 2012Inventor: Brian Muller
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Patent number: 8250545Abstract: An associated development-support apparatus for a semiconductor device enables highly accurate debugging and verification of operations. An emulator stub acquires event information by using a communication control unit, where the event is generated in a debugger, the event information is generated by a debugger stub according to an event, and transmitted by the debugger stub through a communication network. An emulator control unit analyzes the acquired event information, and controls an emulator according to the analyzed event so as to perform emulation processing which virtually emulates operations of the semiconductor device corresponding to the event based on hardware design information. The emulator stub acquires results of the event which is generated in association with the operations of the semiconductor device virtually emulated by the emulator, and notifies the debugger of the results of the event through the communication network and the debugger stub.Type: GrantFiled: June 20, 2003Date of Patent: August 21, 2012Assignee: Fujitsu Semiconductor LimitedInventors: Tetsuya Satoh, Masami Iwamoto, Seiya Itoh, Yuichi Ozawa
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Patent number: 8245201Abstract: Recording and replaying service interactions permits developers to evaluate, iteratively build and test middle-tier and other software components using realistic interaction data and quality of service (QoS) characteristics without requiring constant access to a resource operating in a production environment. Typical service execution sequences can be recorded once by the system administrator/deployer, then replayed as many times as necessary by developers iteratively building and testing middle-tier components.Type: GrantFiled: April 30, 2004Date of Patent: August 14, 2012Assignee: International Business Machines CorporationInventors: Mikhail B. Genkin, Michael Starkey
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Publication number: 20120131560Abstract: A system for testing a base machine includes the base machine that has a base feature set (BFS) and a testing module. The system also includes a test case generator, configured to: select a prior level of the base machine, the prior level having a legacy architecture; determine a feature set of the legacy architecture based on the BFS; generate a set of test instructions based on the feature set; and provide the set of test instructions to the testing module.Type: ApplicationFiled: November 23, 2010Publication date: May 24, 2012Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Ali Y. Duale, Shailesh R. Gami, Dennis W. Wittig
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Patent number: 8156468Abstract: An object-oriented, computer-based system for developing simulation models is provided. The system comprises one or more base objects and one or more graphical processes, wherein new objects are created from base objects by a user by assigning one or more graphical processes to the base object(s). New objects are created without the need for methods or computer programming. A model is built by creating objects that represent the physical components of the system being modeled into the model, and then running the model.Type: GrantFiled: May 22, 2009Date of Patent: April 10, 2012Assignee: Simio LLCInventor: Claude Dennis Pegden
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Publication number: 20120084759Abstract: A system and method for in-vivo multi-path analysis and testing of binary software including binary device drivers is disclosed. The system and method may be used to test a binary software system and may comprise a virtual machine, a symbolic execution engine and a modular plugin architecture. In addition, a device driver testing system is also disclosed wherein symbolic execution may be used to explore the device driver's execution paths and check for device driver behavior.Type: ApplicationFiled: October 1, 2011Publication date: April 5, 2012Inventors: GEORGE CANDEA, Vitaly Chipounov, Volodymyr Kuznetsov
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Patent number: 8132161Abstract: It is possible to provide a semiconductor test program debug device capable of reducing the unnecessary facilities when using a semiconductor test device or a semiconductor test program of different specification.Type: GrantFiled: May 10, 2006Date of Patent: March 6, 2012Assignee: Advantest CorporationInventors: Shigeru Kondo, Hidekazu Kitazawa, Toshihisa Kumagai
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Patent number: 8127278Abstract: In a system and method for recalling a state in an application, a processor may store in a memory data representing a first set of previously executed commands, the first set representing a current application state, and, for recalling a previously extant application state different than the current application state, the processor may modify the data to represent a second set of commands and may execute in sequence the second set of commands.Type: GrantFiled: September 28, 2006Date of Patent: February 28, 2012Assignee: SAP AGInventor: Holger Bohle
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Patent number: 8108198Abstract: A system and method are disclosed to trace memory in a hardware emulator. In one aspect, a first Random Access Memory is used to store data associated with a user design during emulation. At any desired point in time, the contents of the first Random Access Memory are captured in a second Random Access Memory. After the capturing, the contents of the second Random Access Memory are copied to a visibility system. During the copying, the user design may modify the data in the first Random Access Memory while the captured contents within the second Random Access Memory remain unmodifiable so that the captured contents are not compromised. In another aspect, different size memories are in the emulator to emulate the user model. Larger memories have their ports monitored to reconstruct the contents of the memories, while smaller memories are captured in a snapshot RAM. Together the two different modes of tracing memory are used to provide visibility to the user of the entire user memory.Type: GrantFiled: February 21, 2007Date of Patent: January 31, 2012Assignee: Mentor Graphics CorporationInventors: Peer Schmitt, Philippe Diehl, Charles Selvidge, Cyril Quennesson
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Patent number: 8103850Abstract: A system for translating software in a first format into a second format includes a memory containing the software in the first format and an emulator coupled to the memory configured to translate the software from the first format to the second format. The system also includes a host engine coupled to the emulator and configured to perform instructions in the second format. The emulator is configured to determine whether a store command in the first format stores information to a memory page that includes instructions and to convert the store instruction to a special store instruction in the event that the target of the store instruction does not contain an instruction.Type: GrantFiled: May 5, 2009Date of Patent: January 24, 2012Assignee: International Business Machines CorporationInventors: Ravi Nair, Kevin A. Stoodley
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Patent number: 8087007Abstract: During execution of a program, a processor may identify one or more object class instantiations that are associated by the program with a program state obtained during the execution of the program, may store in a file a description of the identified object class instantiations, where at least a portion of the execution of the program is simulatable based on the file, and may modify the first file in response to a user interaction with a graphical representation of one of the described object class instantiations, where a modified version of the portion of the execution of the program is simulatable based on the modified first file.Type: GrantFiled: May 8, 2006Date of Patent: December 27, 2011Assignee: Assima Ltd.Inventor: Eric Duneau
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Patent number: 8074131Abstract: A high integration integrated circuit may comprise a plurality of processing cores, a graphics processing unit, and an uncore area coupled to an interface structure such as a ring structure. A generic debug external connection (GDXC) logic may be provisioned proximate to the end point of the ring structure. The GDXC logic may receive internal signals occurring in the uncore area, within the ring structure and on the interfaces provisioned between the plurality of cores and the ring structure. The GDXC logic may comprise a qualifier to selectively control the entry of the packets comprising information of the internal signals into the queue. The GDXC logic may then transfer the packets stored in the queues to a port provisioned on the surface of the integrated circuit packaging to provide an external interface to the analysis tools.Type: GrantFiled: June 30, 2009Date of Patent: December 6, 2011Assignee: Intel CorporationInventors: Tsvika Kurts, Guillermo Savransky, Jason Ratner, Eilon Hazan, Daniel Skaba, Sharon Elmosnino, Geeyarpuram N. Santhanakrishnan
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Patent number: 8042179Abstract: A method for preventing a return address from being falsified due to a buffer overflow during the program execution, and for detecting the buffer-overflow beforehand. When the return address is re-written during program execution, the debug function of the central processing unit is used to output an error. The falsification of the return address is detected through the error output. Then the falsified return address is re-written to a value stored in advance to enable the program to return to normal operation. When the falsification of the return address is detected, the executing program is terminated.Type: GrantFiled: September 3, 2004Date of Patent: October 18, 2011Assignee: Science Park CorporationInventors: Koichiro Shoji, Yoshiyasu Takafuji, Takashi Nozaki
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Patent number: 8028273Abstract: Methods, data processing systems, and program products supporting the insertion of clone latches within a digital design are disclosed. According to one method, a parent latch within the digital design is specified in an HDL statement in one of the HDL files representing a digital design. In addition, a clone latch is specified within the digital design utilizing an HDL clone latch declaration. An HDL attribute-value pair is associated with the HDL clone latch declaration to indicate a relationship between the clone latch and the parent latch according to which the clone latch is automatically set to a same value as the parent latch when the parent latch is set. Thereafter, when a configuration compiler receives one or more design intermediate files containing the clone latch declaration, the configuration compiler creates at least one data structure in a configuration database representing the clone latch and the relationship between the clone latch and the parent latch.Type: GrantFiled: April 18, 2008Date of Patent: September 27, 2011Assignee: International Business Machines CorporationInventors: Wolfgang Roesner, Derek Edward Williams
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Publication number: 20110231827Abstract: A system debugging program code stored in shared memory and executed by multiple processors or processing cores. Exemplary operation includes determining if an address associated with an executing instruction is outside a first address range associated with the first processor, determining if the address associated with the executing instruction is outside a second address range associated with the second processor; and then raising an emulation event based on the first comparison but not the second comparison. Exemplary embodiments are also capable of identifying instructions corresponding to breakpoints which are executed by only one of multiple processors that execute program code stored in the shared memory.Type: ApplicationFiled: March 22, 2010Publication date: September 22, 2011Inventor: Stephen M. Kilbane
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Patent number: 8024807Abstract: A mechanism for determining a probabilistic security score for a software package is provided. The mechanism calculates a raw numerical score that is probabilistically linked to how many security vulnerabilities are present in the source code. The score may then be used to assign a security rating that can be used in either absolute form or comparative form. The mechanism uses a source code analysis tool to determine a number of critical vulnerabilities, a number of serious vulnerabilities, and a number of inconsequential vulnerabilities. The mechanism may then determine a score based on the numbers of vulnerabilities and the number of lines of code.Type: GrantFiled: May 30, 2008Date of Patent: September 20, 2011Assignee: Trend Micro IncorporatedInventors: Kylene Jo Hall, Dustin C. Kirkland, Emily Jane Ratliff
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Patent number: 8019588Abstract: Systems and methods for reviewing test results are disclosed. In one embodiment, the method includes receiving a first display capture from a testing of a first emulated device executing an application, wherein the first display capture is from a first instance in the application. The method further includes receiving a second display capture from a testing of a second emulated device executing the application, wherein the second display capture is from the first instance in the application. The method also includes creating a display capture package comprising the first display capture and the second display capture. The display capture package is configured to cause the simultaneous display of the first display capture and the second display capture. The method further includes transmitting the display capture package to a display device.Type: GrantFiled: May 27, 2008Date of Patent: September 13, 2011Assignee: Adobe Systems IncorporatedInventors: Tim Wohlberg, Klaas Stöeckmann, Soeren Ammedick, Kai Ortmanns
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Patent number: 7996824Abstract: A synthetic benchmark for a computer program and a method and computer program product for creating a synthetic benchmark for a computer program. The synthetic benchmark is created using statistical information that is collected about an executing program, and some hints about the machine on which the benchmark will be run. When executed, the synthetic benchmark exhibits behavior similar to the computer program to permit computer performance to be accurately measured.Type: GrantFiled: February 28, 2008Date of Patent: August 9, 2011Assignee: International Business Machines CorporationInventor: Robert H. Bell, Jr.
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Patent number: 7996816Abstract: The present invention enables a component under test to bind to a single component, that is capable of simulating most depended upon services, including the details of their interface, whether or not they return explicit results or cause side effects, and regardless of the state of their implementation. This invention includes features that allow for dynamic reconfiguration to meet the needs of both manual and automated testing, including the ability to control normal and exceptional results, as well as features to support both unit and integration testing.Type: GrantFiled: November 15, 2006Date of Patent: August 9, 2011Assignee: International Business Machines CorporationInventors: Timothy Marc Francis, Geoffrey Martin Hambrick, Stephen Joseph Kinder
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Patent number: 7987454Abstract: The processing of server pages is emulated at run time. The system includes a library of custom tags, and a server page emulator for reading the server page, including identifying any calls to the library of custom tags, and further for emulating any calls to the custom tags identified in the server page; and thereby generating and processing the server pages dynamically at runtime. Each server page is parsed to create a tree of nodes for each element of the page, and each node identified as one of template text, custom tag start, custom tag end, and expression language (EL) expression. For each template text node, text is written directly to final markup. For each custom tag node, a return code indicates that the body should be skipped, processed normally, or provided as bulk data to the tag implementation. For each EL expression node, the EL expression is evaluated and the result written to final markup.Type: GrantFiled: December 20, 2005Date of Patent: July 26, 2011Assignee: International Business Machines CorporationInventor: James P. Hennessy
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Patent number: 7975263Abstract: A method for managing a profile includes generating an initial profile of code using an initial sampling frequency. An information entropy value of the profile is computed. A representative profile of the code is determined from additional profiles using a sampling frequency determined from the information entropy value. Other embodiments are disclosed and claimed.Type: GrantFiled: January 10, 2006Date of Patent: July 5, 2011Assignee: Intel CorporationInventors: Robert Geva, Jinpyo Kim
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Patent number: 7950001Abstract: A method of instrumentation, preferably a computer implemented method for instrumentation, in a program which contains an original program. The original instruction is copied into a user address space which has an unused stack space. When a breakpoint is encountered the original instruction is executed out-of-line in the unused stack space by single stepping. Using this debugging in a multithreaded environment is advantageous as all threads will switch into the unused stack space and execute the breakpoint.Type: GrantFiled: September 8, 2006Date of Patent: May 24, 2011Assignee: International Business Machines CorporationInventors: Prasanna S Panchamukhi, Maneesh Soni
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Patent number: 7941787Abstract: A performance tuning method tune a running performance of a program, by managing a measuring condition that is set when the running performance of the program was measured under an arbitrary measuring environment and performance information of the program acquired as a result of the measurement, in a linkable manner with respect to candidates of a measuring environment of the next measurement that is different from the arbitrary measuring environment, automatically setting the measuring condition to be used to measure the running performance of the program using a measuring environment that is different from the arbitrary measuring environment, based on the information that is managed in the linkable manner, and tuning the running performance of the program depending on the performance information.Type: GrantFiled: August 21, 2006Date of Patent: May 10, 2011Assignee: Fujitsu Semiconductor LimitedInventor: Manabu Watanabe
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Patent number: 7930165Abstract: A method and corresponding equipment for emulation of a target programmable unit, which has at least one CPU, by means of an external emulation device, which is coupled to the target programmable unit by means of a communication link, comprising: transferring predetermined initialization data through the communication link to the emulation device for initializing the emulation; transferring through the communication link to the emulation device a CPU clock signal and emulation data; emulating the target programmable unit in the external emulation device using the transferred emulation data; ascertaining respective trace data from the emulation in the external emulation device and storing and/or outputting the trace data; deriving respective target integrity-control data and emulation integrity-control data from respective target-internal data and emulation-internal data; and transferring the derived target integrity-control data from the target programmable unit to the external emulation device.Type: GrantFiled: February 7, 2008Date of Patent: April 19, 2011Assignee: Accemic GmbH & Co. KGInventors: Alexander Weiss, Alexander Lange
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Patent number: 7930683Abstract: A method for testing a software program creates test data by simulating data exchange messages between a server and a client and stores test data in Comma Separated Value (CSV) files. Data repository files stored in the CSV format can be edited by common tools, like a spreadsheet program, and can be maintained easily. The test automation method provides a data capturer tool so that the data repository could be created based on any existing test environment. The test automation method converts data repository files and simulates messages in order to load data to a mobile infrastructure system and set up data fixtures. The test automation method could be integrated in a build process so that data repository and test cases are validated against any program changes periodically.Type: GrantFiled: March 31, 2006Date of Patent: April 19, 2011Assignee: SAP AGInventor: Chunyue Li
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Patent number: 7913118Abstract: An in-circuit debugging (ICD) system includes at least a first target processor, an embedded debug mode with a debug information memory (DIM), a debug host, and an ICD bridge. The first target processor has an embedded debug module (EDM) and performs a program code in normal mode, where the first EDM controls the first target processor in debug mode. The DIM stores debug information for debugging in debug mode, and is invisible to the first target processor when the first target processor operates in normal mode. The debug host has debug software, and is utilized for debugging the program code by using the debug information in debug mode. The ICD bridge has a host debug module (HDM) coupled to the first EDM, and is coupled between the first target processor and the debug host and utilized for bridging information communicated between the first target processor and the debug host.Type: GrantFiled: October 15, 2008Date of Patent: March 22, 2011Assignee: Andes Technology CorporationInventors: Yuan-Yuan Shih, Chi-Chang Lai
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Patent number: 7900258Abstract: An automated analysis system identifies the presence of malicious P-code or N-code programs in a manner that limits the possibility of the malicious code infecting a target computer. The target computer system initializes an analytical virtual P-code engine (AVPE). As initialized, the AVPE comprises software simulating the functionality of a P-code or intermediate language engine as well as machine language facilities simulating the P-code library routines that allow the execution of N-code programs. The AVPE executes a target program so that the target program does not interact with the target computer. The AVPE analyzes the behavior of the target program to identify occurrence of malicious code behavior and to indicate in a behavior pattern the occurrence of malicious code behavior. The AVPE is terminated at the end of the analysis process, thereby removing from the computer system the copy of the target program that was contained within the AVPE.Type: GrantFiled: February 25, 2008Date of Patent: March 1, 2011Assignee: International Business Machines CorporationInventor: Peter A. J. van der Made
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Patent number: 7895514Abstract: Identification and correction of rendering problems that occur when a document (e.g., a web page) is displayed by a document viewer (e.g., web browser) are described. In one exemplary embodiment, a web page has a first element written in a markup language and a second element written in a style sheet language. A method includes receiving a command at a development environment, analyzing a structure of an electronic document responsive to the command, the electronic document having a first element written in a first computer language and a second element written in a second computer language, identifying a relationship between the first and second elements, wherein the relationship causes a rendering problem associated with a document viewer, and presenting information to the user about the rendering problem via the development environment.Type: GrantFiled: October 23, 2006Date of Patent: February 22, 2011Assignee: Adobe Systems IncorporatedInventors: Randall Edmunds, Lori Hylan-Cho
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Patent number: 7877742Abstract: A method, system, and computer program product for generating terminating, pseudo-random test instruction streams, including forward and backward branching instructions. A first instruction stream is generated, including at least one backward branching instruction and at least one forward branching instruction. Each backward branching instruction is preceded by at least one forward branching instruction, which is used to guarantee termination of the loop formed by the backward branching instruction. Backward branching targets are resolved when the backward branching instruction is inserted into the first instruction stream. Forward branching targets remain unresolved in the first instruction stream. A set of potential branch targets is determined for each forward branching instruction. For each forward branching instruction, a branch target is randomly selected from the set of potential branch targets for that forward branching instruction.Type: GrantFiled: June 8, 2006Date of Patent: January 25, 2011Assignee: International Business Machines CorporationInventors: Ali Y. Duale, Theodore J. Bohizic, Dennis W. Wittig
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Publication number: 20100325687Abstract: In various embodiments, a method comprises receiving a custom login script from a first user, receiving a custom change password script from the first user, logging onto an account on a digital device using the custom login script from the first user, changing an old password on the account to a new password at predetermined intervals using the custom change password script from the first user, receiving a password request from a second user, approving the password request, and checking out the new password to the second user.Type: ApplicationFiled: September 30, 2009Publication date: December 23, 2010Inventors: Gyle T. Iverson, Timothy A. Cope, Joseph J. Balint, Jeffery Nielsen
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Patent number: 7849446Abstract: Transactional programming promises to substantially simplify the development and maintenance of correct, scalable, and efficient concurrent programs. Designs for supporting transactional programming using transactional memory implemented in hardware, software, and a mixture of the two have emerged recently. Unfortunately, conventional debugging programs are often inadequate when employed in relation to code that employs transactional memory and new or modified techniques are needed. We describe techniques whereby certain facilities of a transactional memory implementation can be leveraged to provide replay debugging. With replay debugging, the user can examine a partial or complete execution of an atomic block after it has happened—for example, right before the execution commits. Moreover, in some cases the user can modify the replayed execution, and decide to commit the new modified execution instead of the original replayed one.Type: GrantFiled: December 10, 2006Date of Patent: December 7, 2010Assignee: Oracle America, Inc.Inventors: Yosef Lev, Mark S. Moir
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Publication number: 20100293531Abstract: An architecture that allows target service interactions to be realistically simulated in a development environment. The architecture includes a proxy service, an interaction recorder, an interaction store and an emulator service. The proxy service delegates service requests received from a client component to a target service. If it is in “record” mode, the proxy service routes any interaction data corresponding to the interaction (between the target service and the client component) to the interaction recorder. Upon receipt, the interaction recorder records the interaction data in the interaction store. Later, the proxy service can be placed in “replay” mode so that a subsequent service request for the target service is delegated to the emulator service. Upon receipt, the emulator service retrieves the corresponding interaction data from the data store and replays the same to emulate/simulate the target service.Type: ApplicationFiled: May 18, 2010Publication date: November 18, 2010Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Mikhail B. Genkin, Michael Starkey
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Patent number: 7836343Abstract: A method, apparatus and computer program product are provided for use in a system that includes one or more processors, and multiple threads that are respectively associated with the one or more processors. One embodiment of the invention is directed to a method that includes the steps of generating one or more test cases, wherein each test case comprises a specified set of instructions in a specified order, and defining a plurality of thread hardware allocations, each corresponding to a different one of the threads. The thread hardware allocation corresponding to a given thread comprises a set of processor hardware resources that are allocated to the given thread for use in executing test cases. The method further includes executing a particular one of the test cases on a first thread hardware allocation, in order to provide a first set of test data, and thereafter executing the particular test case using a second thread hardware allocation, in order to provide a second set of test data.Type: GrantFiled: March 3, 2008Date of Patent: November 16, 2010Assignee: International Business Machines CorporationInventors: Guo H. Feng, Pedro Martin-de-Nicolas
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Patent number: 7827531Abstract: Techniques for testing software applications in stack-based computing environments are discussed. A tested application is executed at predetermined logical positions in a stack, such as at a layer of the OSI reference model. An expected result of an operation performed by the application is identified. A first set of computer-executable instructions is installed at a first position logically above the tested application, and a second set of computer-executable instructions is installed at a second position logically below the tested application. One or both sets of instructions simulate inputs to the application. The application is executed based on the simulated inputs, and one or both sets of instructions are used to compare outputs from the application with the expected result. Various, virtually unlimited tests can be performed on the software application without the use of extensive test infrastructure.Type: GrantFiled: January 5, 2007Date of Patent: November 2, 2010Assignee: Microsoft CorporationInventors: Siddhartha Sen, Amit Date
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Patent number: 7822587Abstract: A database schema architecture and operators therefor is disclosed for storing data providing information about membership of items in one or more groups, wherein when such a group is a simulated group, access to group item data related to activities of the group items prior to creation of the simulated group is provided. When such a group is an actual group, access to group item data related to activities of the group items prior to creation of the group is constrained such that group entities have database Type 2 behavior. The architecture provides a common schema for both actual and simulated groups. The architecture provides the ability to create simulated or hypothesized groups of agents in a contact center, wherein the groups can be evaluated using agents' past performance. Such groups are represented by the same schemas as actual groups, and the data entities for the actual groups exhibit Type 2 database behavior.Type: GrantFiled: October 3, 2005Date of Patent: October 26, 2010Assignee: Avaya Inc.Inventors: Roger I. Krimstock, Rodney A. Thomson
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Publication number: 20100257513Abstract: Tools and techniques for providing an assessment of a prospective configuration change in a production database environment. In some cases, tools may record a series of transactions in a production database. This set of transactions can then be replayed by the tools in a test database, both before and after the configuration change has been performed. The performance of the workload in this test environment can be measured under both conditions (pre-change and post-change) to provide insight into a performance impact that might result from implementing the configuration change in the production environment.Type: ApplicationFiled: April 3, 2009Publication date: October 7, 2010Applicant: Oracle International CorporationInventors: Govindarajan Thirumalai, Praveen Arora
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Patent number: 7810083Abstract: Method, apparatus and system embodiments to provide user-level creation, control and synchronization of OS-invisible “shreds” of execution via an abstraction layer for a system that includes one or more sequencers that are sequestered from operating system control. For at least one embodiment, the abstraction layer provides sequestration logic, proxy execution logic, transition detection and shred suspension logic, and sequencer arithmetic logic. Other embodiments are also described and claimed.Type: GrantFiled: December 30, 2004Date of Patent: October 5, 2010Assignee: Intel CorporationInventors: Gautham N. Chinya, Hong Wang, Xiang Zou, James Paul Held, Prashant Sethi, Trung Diep, Anil Aggarwal, Baiju V. Patel, Shiv Kaushik, Bryant Bigbee, John Shen, Richard A. Hankins, John L. Reid
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Patent number: 7797682Abstract: In a method for the controlled execution of a program (26), the program (26) being intended for a virtual machine (VM, VM?), on a portable data carrier, wherein the data carrier has a processor that executes at least a first and a second virtual machine (VM, VM?), the program (26) is executed both by the first and by the second virtual machine (VM, VM?). If, during execution of the program (26), a difference is found between the operating state of the first virtual machine (VM) and the operating state of the second virtual machine (VM?), execution of the program is aborted. A data carrier and a computer program product exhibit corresponding features. The invention provides a technique for the controlled execution of a program, which technique prevents security risks due to an attack or a malfunction of the data carrier.Type: GrantFiled: March 22, 2004Date of Patent: September 14, 2010Assignee: Giesecke & Devrient GmbHInventor: Thomas Stocker
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Patent number: 7793270Abstract: A method and apparatus for verifying program code conversion performed by an emulator. A first emulator configured in a same-to-same (X-X) mode converts subject code into target code for execution by a subject processor. Execution of the subject code natively by the subject processor is compared against execution through the first emulator, to verify that program code conversion. Optionally, the first emulator is then used to incrementally validate program code conversion (i.e. optimisation and/or translation) performed by a second emulator, such as a this-to-that (X-Y) mode emulator running on a target processor.Type: GrantFiled: November 3, 2003Date of Patent: September 7, 2010Assignee: International Business Machines CorporationInventors: John H. Sandham, Paul T. Knowles
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Patent number: 7788647Abstract: The system includes a novel software application interactive representation modeling language, a software application (82) operative to use the modeling language to create, read and modify interactive representation models of the proposed applications, a memory (86) to store requirement data and interactive representation model data, a software application (92) operative to read and update the interactive representation model data across a computer network, a software application (76) operative to maintain a record of the requirements and to administer operation of the system, a software application (78) operative to render interactive representations of the proposed applications in browser readable format, a software application (82) operative to allow multiple instances of other applications to access interactive representation data and requirement data residing in the memory and a software application (84) operative to allow an individual user's interactions with the system to be broadcast across a networkType: GrantFiled: January 22, 2004Date of Patent: August 31, 2010Assignee: iRiseInventors: Maurice Martin, Stephen Brickley, Leon Amdour, Alex Kravets, Brian Fan, Dominic Infante, Stuart Larking, Paul Aldama, Brian Russell
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Patent number: 7783467Abstract: A digital system design method uses a higher programming language. In order to realize a digital system, an algorithm is verified based on a program written by the higher programming language and a program is programmed considering the higher programming language-hardware characteristics before the program is written in the lower programming language, and thus conversion into the lower programming language may be easily performed.Type: GrantFiled: December 11, 2006Date of Patent: August 24, 2010Assignee: Electronics and Telecommunications Research InstituteInventors: Jung-Bo Son, Hee-Jung Yu, Eun-Young Choi, Chan-Ho Yoon, Il-Gu Lee, Deuk-Su Lyu, Tae-hyun Jeon, Seung-Wook Min, Kwhang-Hyun Ryu, Kyoung-Ju Noh, Yun-Joo Kim, Kyoung-Hee Song, Sok-Kyu Lee, Seung-Chan Bang, Seung-Ku Hwang
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Patent number: 7774560Abstract: A storage emulator and method thereof are disclosed. The storage emulator allows a host system to access a storage unit connected to a storage system as if the storage unit is directly coupled to the host system. The storage emulator includes a virtual storage emulating module, a storage-managing unit, and a communicating module. The virtual storage emulating module emulates at least one virtual storage unit corresponding to the storage unit on the host system and receives a storage accessing command from the host system. The storage-managing unit identifies the storage accessing command as either a self-sustaining type command or a non-self-sustaining type command. The communicating module communicates with the storage unit of the storage system via the network. If the storage accessing generates a self-sustaining command response in accordance with the storage accessing command and returns the self-sustaining command response to the host system directly.Type: GrantFiled: November 30, 2007Date of Patent: August 10, 2010Assignee: ATEN International Co., Ltd.Inventors: Chien-hsing Liu, Chih-Hua Lin, Shih-Neng Lin
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Patent number: 7774758Abstract: The present disclosure describes methods and systems for secure debugging and profiling of a computer system. Some illustrative embodiments may include a system including a processor with a first processing stage and a first attribute register associated with the first processing stage, and including a memory system coupled to the processor. An instruction and an attribute value are stored within the memory system, wherein the instruction is loaded into the first processing stage and the attribute value is loaded into the first attribute register. Export of debug and profiling data from the first processing stage is disabled if the attribute value in the first attribute register indicates that the instruction in the first processing stage is a secure instruction, and further indicates that secure emulation is disabled.Type: GrantFiled: May 15, 2006Date of Patent: August 10, 2010Assignee: Texas Instruments IncorporatedInventors: Lewis Nardini, Manisha Agarwala, Oliver P. Sohm
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Patent number: 7770147Abstract: A method for generating hardware description language source files is provided. The method includes extracting an input/output (I/O) list and building a port list declaration file from the I/O list. The method also includes building a default instantiation file according to renaming rules and interpreting coding constructs to determine both variable types and sizes. The method further includes generating a sensitivity list.Type: GrantFiled: September 22, 2005Date of Patent: August 3, 2010Assignee: Adaptec, Inc.Inventors: Marc Spitzer, John Packer