Abstract: Collective operation protocol selection in a parallel computer that includes compute nodes may be carried out by calling a collective operation with operating parameters; selecting a protocol for executing the operation and executing the operation with the selected protocol. Selecting a protocol includes: iteratively, until a prospective protocol meets predetermined performance criteria: providing, to a protocol performance function for the prospective protocol, the operating parameters; determining whether the prospective protocol meets predefined performance criteria by evaluating a predefined performance fit equation, calculating a measure of performance of the protocol for the operating parameters; determining that the prospective protocol meets predetermined performance criteria and selecting the protocol for executing the operation only if the calculated measure of performance is greater than a predefined minimum performance threshold.

Abstract: A system of one or more processors, method, and computer readable storage medium, by which a source program having at least one inner scope is processed by identifying variable names in the source program that are upward referencing and storing the upward referencing variable names with an identifier for the associated scope. A candidate shadow variable in a current scope of the source program is determined from variable names that are not among the identified upward referencing variable names. The determined candidate shadow variable is renamed to a variable name that is in an outer scope relative to the current scope. The source program is stored with the renamed variable. The stored source program can be compressed to a size smaller than the original source program in order to require less bandwidth during transmission over a network.

Abstract: A system and method for automatically modifying a native code module accessed in a user software application are described herein. The user software application may include virtual machine bytecode. Access to the native code module may be detected during execution of the virtual machine bytecode. The native code module may be automatically modified by adding instrumentation code to determine various types of information regarding execution of the native code module, and the access may be directed to the modified native code module.

Abstract: A computer implemented method, software infrastructure and computer usable program code for improving application performance. A delinquent memory operation instruction is identified. A delinquent memory operation instruction is an instruction associated with cache misses that exceeds a threshold number of cache misses. A directive is inserted in a code region associated with the delinquent memory operation to form annotated code. The directive indicates an address of the delinquent memory operation instruction and a number of memory latency cycles expected to be required for the delinquent memory operation instruction to execute. The information included in the annotated code is used to optimize execution of an application associated with the delinquent memory operation instruction.

Abstract: A method and apparatus for translating a multithread program code are provided. The method includes: dividing a multithread program code into a plurality of statements according to a synchronization point; generating at least one loop group by combining one or more adjacent statements based on a number of instructions included in the plurality of statements; expanding or renaming variables in each of the plurality of statements so that each statement included in the at least one loop group is executed with respect to a work item of a different work group; and enclosing each of the generated at least one loop group respectively with a work item coalescing loop.

Abstract: Arrangements described herein relate to inserting implicit sequence points into computer program code to support debug operations. Optimization of the computer program code can be performed during compilation of the computer program code and, during the optimization, implicit sequence points can be inserted into the computer program code. The implicit sequence points can be configured to provide virtual reads of symbols contained in the computer program code when the implicit sequence points are reached during execution of the computer program code during a debug operation performed on the computer program code after the computer program code is optimized and compiled.

Abstract: Systems and methods for automatic generation of one or more test programs to be used in conjunction with a test framework for testing a compiler are disclosed. A compiler is instrumented to generated data exposing various internal decisions and/or actions made by the compiler. A test program is generated by test framework and compiled by the compiler and the output is validated by the test framework to ensure that the compiler is behaving according to its compiler specification.

Abstract: A method is provided of evolving algorithms for network node control in a telecommunications network by genetic programming to (a) generate algorithms (b) determining fitness level of the algorithms based on a model of the telecommunications network and (c) select the algorithm that meet a predetermined fitness level or number of generations of evolution. The model is updated and the steps (a), (b) and (c) are repeated automatically to provide a series of algorithms over time adapted to the changing model of the network for possible implementation in the network.

Abstract: A system for automatically monitoring and controlling an infrastructure or process includes a plurality of remote clients installed along various portions of an industrial infrastructure or an infrastructure performing a process. Each of the remote clients collects data. A plurality of server replicas is in communication with the plurality of remote clients. The server replicas receive the collected data from the remote clients and process the received data. The plurality of remote clients and the plurality of server replicas communicate across an electronic network. The plurality of server replicas includes a state machine replication system that is tolerant of a failure of one or more of the server replicas.

Abstract: Systems and methods provide a debugger that debugs code using two versions of code, an optimized and a debuggable version of object code for subroutines, methods or functions. The debugger causes the appropriate version of the code to be executed depending on whether debug commands have been applied with respect to particular subroutines, methods or functions.

Abstract: A method, computer readable medium and system are disclosed. At least one embodiment of a method includes receiving one of a character and a string; determining a character string part space based on a remaining portion of a character string part capacity, of an existing array element, and a length of one of the character and the string; and one of (1) storing one of the character and the string in the existing array element if the length of one of the character and the string is less than or equal to the remaining character string part capacity of an existing array element and (2) adding a new array element and storing one of the character and the string in the new array element if the length of one of the character and the string is greater than the remaining character string part capacity of an existing array element.

Abstract: Optimizations are provided for processing environments. Selected memory objects are tagged with unique identifiers by an operating system of the environment, and those identifiers are used to manage processing within the environment. By detecting by a processing platform of the environment that a memory object has been tagged with a unique identifier, certain tasks may be bypassed and/or memory objects may be reused, even if located at a different location.

Abstract: An apparatus, process, and computer program product to merge types in an object-oriented program is disclosed herein. In one embodiment, a process may include analyzing a method within an object-oriented program to identify merge candidates. These merge candidates may then be recorded in a merge candidate list. The process may further include identifying at least two code paths in the method that merge into a single code path and that operate on different types. The types in these code paths may then be merged to a nearest common superclass listed in the merge candidate list. In selected embodiments, the types may be merged to the java.lang.Object class in the event the merge candidate list is empty.

Abstract: A method for optimizing binary code in a language having access to binary coded decimal variable. The method includes: generating a first compiler expression of the binary code; analyzing a use-definition and/or a definition-use for the first compiler expression; generating a second compiler expression by identifying logical binary coded decimal (BCD) variables in the first compiler expression; assigning temporary variables to the logical BCD variables, wherein the second compiler expression includes packed decimal operations and the assigned temporary variables; and converting a packed decimal operation in the second compiler expression and an assigned temporary variable to a decimal floating point (DFP) if sign information and precision information are not lost during conversion from BCD to DFP, wherein identifying logical BCD variables includes: in the use-definition and/or definition-use of operands, regarding an operand of definition and an operand of use as the same logical BCD variables.

Abstract: The invention relates to a system and method for demarcating information related to one or more blocks in an application source code. This invention provides a means to annotate block information in the source code. It parses the application source code to generate an abstract syntax tree and instruments the source code to capture information related to the one or more blocks generated at the time of dynamic analysis of the application. The information related to the one or more blocks are stored in Hash Map and based on this information the abstract syntax tree is modified to add the information related to the one or more blocks and inserting this information in the application source code.

Abstract: Particular embodiment compile a C++ program having one or more input variables to obtain bytecode of the C++ program; compile a C++ library to obtain bytecode of the C++ library; symbolically execute the bytecode of the C++ program and the bytecode of the C++ library, comprising assign a symbolic input to each input variable of the C++ program; determine one or more execution paths in the C++ program; and for each execution path, construct a symbolic expression that if satisfied, causes the C++ program to proceed down the execution path; and generate one or more test cases for the C++ program by solving the symbolic expressions.

Abstract: Disclosed is a novel computer implemented system, on demand service, computer program product and a method that provides a set of lock usages that improves concurrency resulting in execution performance of the software application by reducing lock contention through refactoring. More specifically, disclosed is a method to refactor a software application. The method starts with accessing at least a portion of a software application that can execute in an operating environment where there are more two or more threads of execution. Next, a determination is made if there is at least one lock used in the software application to enforce limits on accessing a resource. In response to determining that there is a lock with a first type of construct with a given set of features, the software application is refactored with the lock to preserve behavior of the software application.

Abstract: The present invention relates to a method for compiling high-level software code into hardware, transforming each instruction into a respective hardware block and using an execution control signal representing the program pointer for triggering the execution within each respective hardware block.

Abstract: A system including an input compiler that receives a unified input description containing syntax rules for both regular and context-free expressions and interspersed code, the first compiler configured to translate the unified input description into a common internal representation is disclosed. The system also includes a regular expression checker, a context-free expression checker, a code checker and a second compiler coupled to the code checker.

Abstract: A method to instrument program code for a virtual machine that comprises, in the course of loading a class to a virtual machine, adding code to the class to declare a field that corresponds to a field declared in a first bootstrap class.

Abstract: A system and method for monitoring the performance and execution flow of a target application and generating a corresponding data model are provided. The system and method comprise attaching to a thread or process of a target application and tracking the execution of subroutines using instrumentation commands. Data representing the execution flow of the various subroutines, subroutine calls, and their performance is gathered and used to generate data models representing the threads and processes of the application. The data models are optionally merged and/or pruned. A visualization of the data models is generated indicating relevant points of interest within the target application's execution flow.

Abstract: A loop detection method, system, and article of manufacture for determining whether a sequence of unit processes continuously executed among unit processes in a program is a loop by means of computational processing performed by a computer. The method includes: reading address information on the sequence of unit processes; comparing an address of a unit process as a loop starting point candidate with an address of a last unit process in the sequence of unit processes; reading call stack information on the sequence of unit processes; comparing a call stack upon execution of the unit process as the loop starting point candidate with a call stack upon execution of the last unit process; outputting a determination result indicating that the sequence of unit processes forms a loop if the respective comparison results of the addresses and the call stacks match with each other.

Abstract: An embodiment is directed to determining, by a compiler, that a call to a named barrier is matched across all of a plurality of threads, and based at least in part on determining that the call to the named barrier is matched across all of the plurality of threads, replacing, by the compiler, the named barrier with an unnamed barrier.

Abstract: A method and apparatus is disclosed providing an improvement in performance for arithmetic computations by a computer system for calculations which include decimal numeric variables. The improvement in at least one embodiment includes use of a special compiler in cooperation with a special decimal numeric subroutine library. The compiler provides comparative alignment information based upon comparing alignments of a plurality of decimal variables. The decimal subroutine library can then provide improved performance at run time by utilizing the information compared by the compiler at compiler time rather than making those computations repeatedly at run time.

Abstract: This invention relates to a method and framework for invisible code rewriting. A method, system, and computer program for allowing modification of executable program code in a computer platform comprising: providing a virtual address space on the platform, said virtual space comprising a first and second address space; identifying a program into the first address space; identifying an enhancement to the program; copying the program into the second address space; modifying the program copy in the second address space to provide the enhancement; and configuring the platform to execute the program and executing the enhanced program in second address space.

Abstract: Methods are disclosed of compiling a software application having multiple functions. At least one of the functions is identified as a targeted function having a significant contribution to performance of the software application. A code version of the targeted function is generated with one of multiple machine models corresponding to different target utilizations for a target architecture, specifically corresponding to the one with the greatest of the different target utilizations. The generated code version of the targeted function is matched with an application thread of the target architecture.

Abstract: Method and system for direct access of language metadata are disclosed. In an implementation, the method includes receiving commands from a user to modify language metadata of a programming language. The metadata is modified based on the command and the modified metadata is utilized as a feature in the programming language at runtime.

Abstract: A system and method for improving software maintainability, performance, and/or security by associating a unique marker to each software code-block; the system comprising of a plurality of processors, a plurality of code-blocks, and a marker associated with each code-block. The system may also include a special hardware register (code-block marker hardware register) in each processor for identifying the markers of the code-blocks executed by the processor, without changing any of the plurality of code-blocks.

Abstract: A facility for identifying functionally distinct memory access reorderings for a multithreaded program is described. The facility monitors execution of the program to detect, for each of one or more memory locations, an order in which the memory location was accessed by the threads of the program, each access being at least one of a read access and a write access. Among a number of possible memory access reorderings of a read access by a reading thread to a location and a write access by a writing thread to the same location where the write access preceded the read access, the facility identifies as functionally distinct memory access reorderings those possible memory access reorderings where the reading thread could have become newly aware of changed state of the writing thread as a result of the indicated read access.

Abstract: Architecture-dependent assets are automatically built and retargeted. An asset originally built for one architecture is downloaded and automatically retargeted on another architecture. This automatically retargeting may be performed on demand, at runtime.

Abstract: Disclosed herein are methods and compilers for compiling code. The methods and compilers disclosed can compile a callable compilable unit of code free of declarations and assertions that identify attributes of arguments expressed therein. The attributes of the arguments in the callable compilable unit of code are inferred by the compilers and methods disclosed herein from information provided by a call site that calls a compiler to compile the callable compilable unit of code.

Abstract: Techniques for implementing identification and management of unsafe optimizations are disclosed. A method of the disclosure includes receiving, by a managed runtime environment (MRE) executed by a processing device, a notice of misprediction of optimized code, the misprediction occurring during a runtime of the optimized code, determining, by the MRE, whether a local misprediction counter (LMC) associated with a code region of the optimized code causing the misprediction exceeds a local misprediction threshold (LMT) value, and when the LMC exceeds the LMT value, compiling, by the MRE, native code of the optimized code to generate a new version of the optimized code, wherein the code region in the new version of the optimized code is not optimized.

Abstract: A method for optimization of a software build includes collecting first data representative of inputs for a build process obtained by a set of data accessing operations implemented during a first execution of the build process, the set including a file accessing operation and a non-file accessing operation. A redirection routine embedded within the build process captures the inputs. The first data is compared with second data representative of the inputs obtained in connection with a second execution of the build process. If the first and second data do not match, the second data is recorded in a data store and output data generated by the second execution of the build process is stored. If the first and second data match, output data generated by the first execution of the build process is used as an output for the second execution of the build process.

Abstract: A method, system and computer program product for optimizing memory usage associated with duplicate string objects in a Java virtual machine. The method comprises scanning a heap of the Java virtual machine at the end of the start-up process of the virtual machine to identify duplicate strings associated with the virtual machine, storing the identified strings in a string cache file, and determining whether a new string that needs to be created during start-up already exists in the string cache file. The duplicate strings are added to an interned strings table. A reference to a duplicate string is returned if a string to be created is already in the string cache file.

Abstract: An embodiment is directed to determining, by a compiler, that a call to a named barrier is matched across all of a plurality of threads, and based at least in part on determining that the call to the named barrier is matched across all of the plurality of threads, replacing, by the compiler, the named barrier with an unnamed barrier.

Abstract: In one example, a device includes one or more processors configured to determine an allocated time for execution of an optimization pass for optimizing code for a software program, execute at least some instructions of the optimization pass on the code, and, in response to determining that an actual time for execution of the optimization pass has exceeded the allocated time for execution, preventing execution of subsequent instructions of the optimization pass.

Abstract: In one example, a device includes one or more processors configured to determine a set of optimization pass configuration data for code of a software program to be compiled, wherein the optimization pass configuration data defines a sequence of optimization passes for the software program during compilation, and execute the sequence of optimization passes on code for the software program based on the set of optimization pass configuration data.

Abstract: One embodiment of the present invention sets forth a technique for using a multi-bank register file that reduces the size of or eliminates a switch and/or staging registers that are used to gather input operands for instructions. Each function unit input may be directly connected to one bank of the multi-bank register file with neither a switch nor a staging register. A compiler or register allocation unit ensures that the register file accesses for each instruction are conflict-free (no instruction can access the same bank more than once in the same cycle). The compiler or register allocation unit may also ensure that the register file accesses for each instruction are also aligned (each input of a function unit can only come from the bank connected to that input).

Abstract: Generating decode time instruction optimization (DTIO) object code that enables a DTIO enabled processor to optimize execution of DTIO instructions. A code sequence configured to facilitate DTIO in a DTIO enabled processor is identified by a computer. The code sequence includes an internal representation (IR) of a first instruction and an IR of a second instruction. The second instruction is dependent on the first instruction. A schedule associated with at least one of the IR of the first instruction and the IR of the second instruction is modified. The modifying includes generating a modified schedule that is configured to place the first instruction next to the second instruction. An object file is generated based on the modified schedule. The object file includes the first instruction placed next to the second instruction. The object file is emitted.

Abstract: A compiler compiles code in a target program by reserving at least one register for use by a dynamic binary optimizer during target program execution. When the target program is subsequently executed, the dynamic binary optimizer stores needed state information in the reserved register(s), without affecting register state of the target program. Preferably, the state information in the reserved register(s) includes addressing information for a context save area, used for saving processor state when switching context from the target program to the dynamic binary optimizer.

Abstract: Adapting an existing portfolio optimizer to support one or more valuated dependencies without modifying the existing portfolio optimizer, may include translating one or more original elements and associated dependencies in a portfolio to be optimized based on said one or more valuated dependencies; invoking the existing portfolio optimizer with the translated one or more original elements and associated dependencies; and translating optimization results, if said optimization results contain translated one or more original elements, into a solution characterized in terms of said one or more original elements.

Abstract: A method of sampling instructions executing in a multi-threaded processor which includes selecting an instruction for sampling, storing information relating to the instruction, determining whether the instruction includes an event of interest, and reporting the instruction if the instruction includes an event of interest on a per-thread basis. The event of interest includes information relating to a thread to which the instruction is bound.

Abstract: A method of memory disambiguation hardware to support software binary translation is provided. This method includes unrolling a set of instructions to be executed within a processor, the set of instructions having a number of memory operations. An original relative order of memory operations is determined. Then, possible reordering problems are detected and identified in software. The reordering problem being when a first memory operation has been reordered prior to and aliases to a second memory operation with respect to the original order of memory operations. The reordering problem is addressed and a relative order of memory operations to the processor is communicated.

Abstract: In modern multi-threaded environments, threads often work cooperatively toward providing collective or aggregate throughput for an application as a whole. Optimizing in the small for “thread local” common path latency is often but not always the best approach for a concurrent system composed of multiple cooperating threads. Some embodiments provide a technique for augmenting traditional code emission with thread-aware policies and optimization strategies for a multi-threaded application. During operation, the system obtains information about resource contention between executing threads of the multi-threaded application. The system analyzes the resource contention information to identify regions of the code to be optimized. The system recompiles these identified regions to produce optimized code, which is then stored for subsequent execution.

Abstract: Delayed insertion of safepoint related code is disclosed. Optimization processing is performed with respect to an intermediate representation of a source code. The optimized intermediate representation is analyzed programmatically to identify a safepoint and insert safepoint related code associated with the safepoint. In some embodiments, analyzing the optimized intermediate representation programmatically comprises determining where to place the safepoint within a program structure of the source code as reflected in the intermediate representation.

Abstract: A system and method for partial object dematerialization within a virtual machine (VM), and particularly Java Virtual Machines. In accordance with an embodiment, the system allows for applying partial object dematerialization to situations where the object is either created locally, or is retrieved from external code where it might have already escaped. In accordance with an embodiment, the system comprises a computer; a virtual machine for executing a software application; memory space for the application byte code and the generated machine code; and a compiler with an object dematerializer, and dematerializer injector. Runtime partial object dematerialization code is injected into the intermediate code representation in such a way that additional or standard optimizer techniques can be applied to it.

Abstract: A function may be memoized when a side effect is a read only side effect. Provided that the read only side effect does not mutate a memory object, the side effect may be considered as an input to a function for purity and memoization analysis. When a read only side effect may be encountered during memoization analysis, the read only side effect may be treated as an input to a function for memoization analysis. In some cases, such side effects may enable an impure function to behave as a pure function for the purposes of memoization.

Abstract: Techniques for calculating the actual footprint of a computer-implemented method are disclosed. An example computer-implemented method includes a computer creating a map indicating to which code method each instruction included in compiled code belongs. This computer-implemented method also includes the computer sampling instructions executed using a hardware performance counter. This computer-implemented method also includes the computer mapping the sampled instructions to the code methods to which the instructions belong using the map. This computer-implemented method also includes the computer calculating the actual footprint of each code method as the total number of instructions sampled at least once among the instructions belonging to the code methods.

Abstract: The technologies provided herein relate to protecting the integrity of original code that has been optimized. For example, a processor may perform a fetch operation to obtain specified code from a memory. During execution, the code may be optimized and stored in a portion of the memory. The processor may obtain the optimized code from the portion of the memory. An entry of a first table may be modified to indicate a relationship between the particular code and the optimized code. One or more entries of a second table may be modified to specify the one or more physical memory locations. Each of the one or more entries of the second table may correspond to the entry of the first table. The processor may execute the optimized code when each of the one or more entries of the second table are valid.

Abstract: A compiler apparatus, which can perform software pipelining optimization that has a considerable effect of reducing the number of execution cycles taken to complete a loop process, converts a source program into a machine program for a processor which is capable of parallel processing. The compiler apparatus is composed of: a parsing unit operable to parse the source program and then to convert the source program into an intermediate program which is described in an intermediate language; an optimization unit operable to optimize the intermediate program; and a conversion unit operable to convert the optimized intermediate program into the machine language program, wherein the optimization unit is operable to execute software pipelining, by inserting a transfer instruction, which is used for transferring data between operands, into a loop process included in the intermediate program so that a data dependence relation is changed.