Abstract: In performance tuning, a program is created by development engineers. Data A, data B, data C, . . . are given to the program to execute the program. Performance index values of functions for each data are measured. The results of the measurement are combined for each function and combining results and the number of times of combining (experience value) are obtained. Based on the combining results, the targets of the tuning functions are selected. Performance index values are combined for each function selected. The functions to be the tuning targets are output as tuning points.

Abstract: A method for grouping algorithms included in a program into groups and thus for assisting in analyzing the program. The method includes the steps of: converting each of the algorithms into a directed graph; judging, as to each representative directed graph stored in a storage unit of a computer system, whether or not the directed graph obtained by the conversion is similar to the representative directed graph; and determining a group to which the directed graph obtained by the conversion belongs from among groups stored in the storage unit in accordance with the similarity judgment. A computer system for performing the above method and a computer program for causing a computer system to perform the above method are also described.

Abstract: Object code is generated from an internal representation that includes a plurality of source operands. The generating includes performing for each source operand in the internal representation determining whether a last use has occurred for the source operand. The determining includes accessing a data flow graph to determine whether all uses of a live range have been emitted. If it is determined that a last use has occurred for the source operand, an architected resource associated with the source operand is marked for last-use indication. A last-use indication is then generated for the architected resource. Instructions and the last-use indications are emitted into the object code.

Abstract: Methods, apparatus and computer software product for optimization of data transfer between two memories includes determining access to master data stored in one memory and/or to local data stored in another memory such that either or both of the size of total data transferred and the number of data transfers required to transfer the total data can be minimized. The master and/or local accesses are based on, at least in part, respective structures of the master and local data.

Abstract: Embodiments of the invention provide systems and methods for throughput-aware software pipelining in compilers to produce optimal code for single-thread and multi-thread execution on multi-threaded systems. A loop is identified within source code as a candidate for software pipelining. An attempt is made to generate pipelined code (e.g., generate an instruction schedule and a set of register assignments) for the loop in satisfaction of throughput-aware pipelining criteria, like maximum register count, minimum trip count, target core pipeline resource utilization, maximum code size, etc. If the attempt fails to generate code in satisfaction of the criteria, embodiments adjust one or more settings (e.g., by reducing scalarity or latency settings being used to generate the instruction schedule).

Abstract: Memoization may be deployed using a configuration file or database that identifies functions to memorize, and in some cases, includes input and result values for those functions. As an application is executed, functions defined in the configuration file may be captured and memoized. During the first execution of the function, the return value may be captured and stored in the configuration file. For subsequent executions of the function, the return value may be stored in the configuration file. In some cases, the configuration file may be distributed with the return values to client computers. The configuration file may be created by one device and deployed to other devices in some deployments.

Abstract: A function's purity may be estimated by comparing a new input vector to previously analyzed input vectors. When a new input vector is within a confidence boundary, the new input vector may be treated as a known vector, even when that vector has not been evaluated. The input vector may reflect the input parameters passed to a function, and the function may be analyzed to determine whether to memoize with the input vector. The function may be a function that behaves as a pure function in some circumstances and with some input vectors, but not with others. By memoizing the function when possible, the function may be executed much faster, thereby improving performance.

Abstract: One embodiment of the present invention sets forth a technique for emitting coherent output from multiple threads for the printf( ) function. Additionally, parallel (not divergent) execution of the threads for the printf( ) function is maintained when possible to improve run-time performance. Processing of the printf( ) function is separated into two tasks, gathering of the per thread data and formatting the gathered data according to the formatting codes for display. The threads emit a coherent stream of contiguous segments, where each segment includes the format string for the printf( ) function and the gathered data for a thread. The coherent stream is written by the threads and read by a display processor. The display processor executes a single thread to format the gathered data according to the format string for display.

Abstract: A sampling based DBR framework which leverages a separate core for program analysis. The framework includes a hardware performance monitor, a DBR service that executes as a separate process and a lightweight DBR agent that executes within a client process. The DBR service aggregates samples from the hardware performance monitor, performs region selection by deducing the program structure around hot samples, performs transformations on the selected regions (e.g. optimization), and generates replacement code. The DBR agent then patches the client process to use the replacement code.

Abstract: Transforming dynamic code. The method includes obtaining one or more first data structures defining constructs in a body of dynamic language source code. From the one or more first data structures, identifier information is extracted for one or more of the defined constructs. Knowledge about the constructs is augmented. Using the identifier information and augmented knowledge, metadata is generated about the body of the dynamic language source code. The generated metadata is represented as a symbol table. Using the symbol table, the body of dynamic language source code is transformed.

Abstract: A conversion apparatus for converting a source code into a machine language code, includes an information obtainment unit that obtains profile information from the source code; a determination unit that determines an optimal position of a prefetch command for access to a multi-dimensional array of multiple loops having a nest level of two or greater, on the basis of the profile information; and a placement unit that places the prefetch command at the optimal position.

Abstract: According to one aspect of the present disclosure, a method and technique for reducing branch misprediction impact for nested loop code is disclosed. The method includes: responsive to identifying code having an outer loop and an inner loop, determining a quantity of iterations of the inner loop for an initial number of iterations of the outer loop; determining a number of processor cycles for executing the quantity of iterations of the inner loop for the initial number of iterations of the outer loop; determining whether the number of processor cycles is less than a threshold; and responsive to determining that the number of processor cycles is less than the threshold, fully unrolling the inner loop for the initial number of iterations of the outer loop.

Abstract: The present disclosure simplifies programming debugging by dynamically injecting debugger compiled instrumentation into the debuggee process such that the debuggee process executes the instrumentation without executing the debugger. In one example method, the debugger controls compiling a description of the instrumentation as an instrumentation method. The debugger can then write the instrumentation method into the debuggee. The debuggee can save the state of a target method of the debuggee process at a predetermined location. The debuggee process calls the instrumentation method from the debuggee. In addition, the state of the target method can be restored and the resumed from the predetermined location after the instrumentation method executes.

Abstract: Various domains may wish to specify different implementations of the type; e.g., a compilation domain may describe the type statically, an execution domain may instantiate objects of the given type, while a debugging execution domain may associate additional debugging information such as a symbol name. This may be achieved by specifying a type implementation of a particular type within respective domains which all implement a common type interface. A type binding instruction set may then select a type implementation for the type within the target instruction set according to the domain, and may bind type instances of the type within target instruction set to the selected type implementation for the current domain. This technique yields domain-specific variance in type implementation without having to reconfigure the target instruction set or perform domain-checking logic there-within.

Abstract: A system may include computer code for analyzing an upgrade from a first version to a second version of a software program that has been customized without performing the upgrade. The system may provide default state information of default program objects. The default program objects would be included in a default installation of the second version of the software program. The computer code may retrieve current state information of current program objects from an application database. The software program that has been customized may include the current program objects. The system may generate upgrade information based on a comparison between the current state information and the default state information. The upgrade information may identify a subset of the current program objects that would be impacted by the upgrade.

Abstract: An information processing apparatus to create an arithmetic expression by combining one or more operators includes a detection unit to detect a permutation of plural operators existing in common to the plural created arithmetic expressions, and a registration unit to register the detected permutation of the operators as a new operator.

Abstract: A compiler and method for compiling source code comprising: a library of code patterns and control flow information for each code pattern, wherein each code pattern comprises one or more variable; and a processor arranged to: evaluate the control flow of an expression in the source code, wherein the expression comprises one or more variable, match the expression to one of the code patterns in the library based on the evaluated control flow information, assign value numbers to the one or more variable within the expression, determine if the expression and the matched code pattern are equivalent based on the assigned value numbers, and replace the expression in the source code with a replacement expression if the expression and the matched code pattern are equivalent.

Abstract: Systems and methods for dynamically generating computer executable technical support procedures, as well as updating/augmenting such executable procedures, by tracking and processing sequences of actions (execution traces) that are taken by experts (or users) when performing a procedure or when executing an executable procedure.

Abstract: Disclosed are a method and system for optimized, dynamic data-dependent program execution. The disclosed system comprises a statistics computer which computes statistics of the incoming data at the current time instant, where the said statistics include the probability distribution of the incoming data, the probability distribution over program modules induced by the incoming data, the probability distribution induced over program outputs by the incoming data, and the time-complexity of each program module for the incoming data, wherein the said statistics are computed on as a function of current and past data, and previously computed statistics; a plurality of alternative execution path orders designed prior to run-time by the use of an appropriate source code; a source code selector which selects one of the execution path orders as a function of the statistics computed by the statistics computer; a complexity measurement which measures the time-complexity of the currently selected execution path-order.

Abstract: For a program that is made up of functions in units, each function is divided into instruction code blocks having a size CS where CS is the instruction cache line size of a target processor and an instruction code block that is Xth counting from the top of each function F is expressed as (F, X). Flow information of nodes that take (F, X) as identification names is extracted from an executable file of the function program. For each identification name, as neighborhood weight of each identification name that differs from that identification name, information for which that the frequency of appearance of each identification name is taken into consideration that belongs to a function that differs from that function in the neighborhood of each appearing node in the flow information is found. Based on said neighborhood weight information, the functions are arranged in the memory space such that the number of conflicts of said instruction cache is reduced.

Abstract: A sequence generator generates a table of optimal instruction sequences for all bitwise expression having a specific number of variables. An index generator generates a bit-string index that corresponds to a particular bitwise expression. The bit-string is generated from a truth table. A table lookup unit is coupled with the index generator. The table lookup unit finds an optimal instruction sequence for the bitwise expression from within the table of optimal instruction sequences based at least in part on the generated bit-string index.

Abstract: Techniques for representing a program are provided. The techniques include creating one or more sub-variables for each of one or more variables in the program, and maintaining a single size of each of the one or more variables throughout a life-span of each of the one or more variables. Additionally, techniques for performing register allocation are also provided. The techniques include representing bit-width information of each of one or more variables in a powers-of-two representation, wherein the one or more variables comprise one or more variables in a program, coalescing the one or more variables, packing the one or more coalesced variables, and using the one or more packed variables to perform register allocation.

Abstract: Methods and an apparatus for dynamic best fit compilation of mixed mode instructions are provided. In one embodiment, a provided method includes receiving a non-native software instruction at a device, generating a first native software instruction from a first instruction set based on the non-native software instruction, the generation of the first native software instruction occurring at the device, executing the first native software instruction at the device, generating a second native software instruction from a second instruction set based on the non-native software instruction, the generation of the second native software instruction occurring at the device, and executing the second native software instruction at the device.

Abstract: Systems and methods that enhance and balance a late binding and an early binding in a programming language, via supplying an option component to opt-in (or opt-out) late binding, and wherein a late binding is triggered based on a static type for the variable (e.g., object or a type/string.) Additionally, the variable is enabled to have different static types at different regions (e.g., a program fragment) of the programming language.

Abstract: Executable code may be recompiled so that generic portions of code may be replaced with specific portions of code. The recompilation may customize executable code for a specific use or configuration, making the code lightweight and executing faster. The replacement mechanism may replace variable names with fixed values, replace conditional branches with only those branches which are known to be executed, and may eliminate executable code portions that are not executed. The replacement mechanism may comprise identifying known values defined in the executable code for variables, and replacing those variables with the constant value. Once the constants are substituted, the code may be analyzed to identify branches that may be evaluated using the constant values. Those branches may be reformed using the constant value and the rest of the conditional code that may not be accessed may be removed.

Abstract: Apparatus, systems, and methods for a compiler are described. One such compiler converts source code into an automaton comprising states and transitions between the states, wherein the states in the automaton include a special purpose state that corresponds to a special purpose hardware element. The compiler converts the automaton into a netlist, and places and routes the netlist to provide machine code for configuring a target device.

Abstract: A bootup device and method for an application program on a mobile equipment to improve the bootup speed of the application program on the mobile equipment. The bootup device has an application management module, that boots up a virtual machine module based on the application program to be run. A virtual machine module, loads codes of the application program and Just in Time (JIT) compilation results of a bootup process of the application program into a memory, search, in the JIT compilation results, for local JIT compiled codes corresponding to the bootup process code segment to be executed, and executes the found local JIT compiled codes when executing each bootup process code segment of the application program. A storage management module, store and reads the codes of the application program and the JIT compilation results obtained from the JIT compilation of the bootup process of the application program.

Abstract: A compiler of a single instruction multiple data (SIMD) information handling system (IHS) identifies “if-then-else” statements that offer opportunity for conditional branch conversion. The SIMD IHS employs a processor or processors to execute the executable program. During execution, the processor generates and updates SIMD lane mask information to track and manage the conditional branch loops of the executing program. The processor saves branch addresses and employs SIMD lane masks to identify conditional branch loops with different branch conditions than previous conditional branch loops. The processor may reduce SIMD IHS processing time during processing of compiled code of the original “if-then-else” statements. The processor continues processing next statements inline after all SIMD lanes are complete, while providing speculative and parallel processing capability for multiple data operations of the executable program.

Abstract: Interactive iterative program parallelization based on dynamic feedback program parallelization, in one aspect, may identify a ranked list of one or more candidate pieces of code each with one or more source refactorings that can be applied to parallelize the code, apply at least one of the one or more refactorings to create a revised code, and determine performance data associated with the revised code. The performance data may be used to make decisions on identifying next possible ranked list of refactorings.

Abstract: An embodiment is directed to determining, by a compiler, that a call to a named barrier is matched across all of a plurality of threads, and based at least in part on determining that the call to the named barrier is matched across all of the plurality of threads, replacing, by the compiler, the named barrier with an unnamed barrier.

Abstract: According to one embodiment, a system including a compiler to produce an executable module to be executed by a computer system including a main processor and active memory devices is provided. The system configured to perform a method including dividing source code into code sections, identifying a first code section to be executed by the active memory devices and identifying data structures that are used by the first code section. The method also includes classifying the data structures based on pre-defined attributes, formulating, by the compiler, a storage mapping plan for the data structures based on the classifying and generating, by the compiler, mapping code that implements the storage mapping plan, wherein the mapping code is part of the executable module and wherein the mapping code maps storing of the data structures to storage locations in the active memory devices.

Abstract: Methods and systems for optimizing generation of natively executable code from non-native binary code are disclosed. One method includes receiving a source file including binary code configured for execution according to a non-native instruction set architecture. The method also includes translating one or more code blocks included in the executable binary code to source code, and applying an optimizing algorithm to instructions in the one or more code blocks. The optimizing algorithm is selected to reduce a number of memory address translations performed when translating the source code to native executable binary code, thereby resulting in one or more optimized code blocks. The method further includes compiling the source code to generate an output file comprising natively executable binary code including the one or more optimized code blocks.

Abstract: The latencies associated with retrieving instruction information for a main thread are decreased through the use of a simultaneous helper thread. The helper thread is a speculative prefetch thread to perform instruction prefetch and/or trace pre-build for the main thread.

Abstract: A computer implemented program analysis method employing a set of new abstract domains applicable to non-convex invarients. The method analyzes programs statically using abstract interpretation while advantageously considering non-convex structures and in particular those situations in which an internal region of an unreachable state exists within a larger region of reachable states. The method employs a new set of non-convex domains (donut domains) based upon the notion of an outer convex region of reachable states (Domain D1) and an inner region of unreachable states (Domain D2) which advantageously permits capture of non-convex properties by using convex regions and operations.

Abstract: Product data pertaining to a plurality of products is gathered from a plurality of sources. Dependency information for the plurality of products is extracted from the product data. The dependency information is analyzed to determine dependencies for each product of the plurality of products. The dependencies for each product of the plurality of products are displayed to a user.

Abstract: A system and method for redundant array copy removal in a virtual machine (VM), or other runtime environment, and particularly for use in a system that includes a Java Virtual Machine (JVM). In pointer free languages array copy operations are common and time consuming. Embodiments of the present invention enable the compiler to detect situations where the compiled code can safely use the source array as the destination array without performing any copy operation. By avoiding array copy operations, the performance of the application is improved.

Abstract: A method for vectorization of a block of code is provided. The method comprises receiving a first block of code as input; and converting the first block of code into at least a second block of code and a third block of code. The first block of code accesses a first set of memory addresses that are potentially misaligned. The second block of code performs conditional leaping address incrementation to selectively access a first subset of the first set of memory addresses. The third block of code accesses a second subset of the first set of memory addresses starting from an aligned memory address, simultaneously accessing multiple memory addresses at a time. No memory address belongs to both the first subset and the second subset of memory addresses.

Abstract: A mechanism for replacing memory pointers with implicit pointers is disclosed. A method of embodiments of the invention includes determining a memory pointer in a source code compiling on a computer system. The memory pointer is associated with a first value in the source code and serves as a referencing link to a second value in memory. The method further includes replacing the memory pointer with an implicit pointer as the memory pointer is optimized away during code optimization of the source code such that the implicit pointer is provided in a compiler-generated debug output to serve as an implicit reference link between the first value and second value. The implicit reference link was once provided as an explicit reference link by the memory pointer before getting optimized away.

Abstract: Object code is generated from an internal representation that includes a plurality of source operands. The generating includes performing for each source operand in the internal representation determining whether a last use has occurred for the source operand. The determining includes accessing a data flow graph to determine whether all uses of a live range have been emitted. If it is determined that a last use has occurred for the source operand, an architected resource associated with the source operand is marked for last-use indication. A last-use indication is then generated for the architected resource. Instructions and the last-use indications are emitted into the object code.

Abstract: A model is provided for transforming a program with a priori given class hierarchy that is induced by inheritance. An inheritance remover is configured to remove inheritance from a given program to produce an analysis-friendly program which does not include virtual-function pointer tables and runtime libraries associated with inheritance-related operations. The analysis-friendly program preserves the semantics of the given program with respect to a given class hierarchy. A clarifier is configured to identify implicit expressions and function calls and transform the given program into at least one intermediate program having explicit expressions and function calls.

Abstract: One or more computer-readable media store executable instructions that, when executed by processing logic, perform parallel processing. The media store one or more instructions for initiating a single programming language, and identifying, via the single programming language, one or more data distribution schemes for executing a program. The media also store one or more instructions for transforming, via the single programming language, the program into a parallel program with an optimum data distribution scheme selected from the one or more identified data distribution schemes, and allocating the parallel program to two or more labs for parallel execution. The media further store one or more instructions for receiving one or more results associated with the parallel execution of the parallel program from the two or more labs, and providing the one or more results to the program.

Abstract: A computing device-implemented method includes receiving a program, analyzing and transforming the program, determining an inner context and an outer context of the program based on the analysis of the program, and allocating one or more portions of the inner context of the program to two or more labs for parallel execution. The method also includes receiving one or more results associated with the parallel execution of the one or more portions from the two or more labs, and providing the one or more results to the outer context of the program.

Abstract: A compiler and method of optimizing code by partial inlining of a subset of blocks of called blocks of code into calling blocks of code. A restart of the called blocks of code is provided for the case where non-inlined blocks of code are reached at run time. Blocks selected for partial inlining may include global side effects depending on the computer program environment. Global side effects in the selected blocks of code leading to a restart are sanitized in order to defer changes to the global state of the computer program.

Abstract: Systems, methods, and computer-readable media for optimizing emulated fixed-function and programmable graphics operations are provided. Data comprising fixed function and programmable states for an image or scenario to be rendered is received. The data for the image is translated into operations. One or more optimizations are applied to the operations. The optimized operations are implemented to render the scenario.

Abstract: A computer implemented method includes receiving an ordered sequence of programming language statements, identifying a first statement and one or more second statements that are configured to be executed after the first statement, in which the first statement is configured to initiate an asynchronous task that executes asynchronously with respect to the one or more second statements, and configuring the one or more second statements to execute upon completion of the asynchronous task.

Abstract: Method, apparatus and system embodiments provide support for multiple SoEMT software threads on multiple SMT logical thread contexts. A sleep state mechanism maintains a current value of an element of architecture state for each physical thread. The current value corresponds to an active virtual thread currently running on the physical thread. The sleep state mechanism also maintains sleep values of the architecture state element for each inactive thread. The active and inactive values may be maintained in a cross-bar configuration. Upon a read of the architecture state element, simplified mux logic selects among the current values to provide the current value for the appropriate active thread. Upon a thread switch, control logic associated with the sleep state mechanism swaps the active state value for the current thread with the inactive state value for the new thread.

Abstract: A novel system, computer program product, and method are disclosed for transforming a program to facilitate points-to analysis. The method begins with accessing at least a portion of program code, such as JavaScript. In one example, a method with at least one dynamic property correlation is identified for extraction. When a method m is identified for extraction with the dynamic property correlation, a body of the loop l in the method m is extracted. A new method mp is created to include the body of the loop l with the variable i as a parameter. The loop l is substituted in the program code of the method m with the new method mp to create a transformed program code.

Abstract: A compiler module for providing instruction signature support to a compiler includes a language construct identifier and a placeholder insertion component. The language construct identifier is configured to identify an instruction signature-relevant language construct in a high level language source code supplied to the compiler. The placeholder insertion component is configured to interact with the compiler for inserting at least one instruction signature-related placeholder based on the instruction signature-related language construct into a compiled code processed by the compiler on the basis of the high level language source code.

Abstract: Methods, systems, computer-readable media, and apparatus for determining function side effects of a program function are disclosed. Source code of one or more prototype functions that is configured to simulate the function side-effect behaviors of a program function can be provided, and the compiler can determine the functional side effects of the program function in various specific program contexts based on the source code of the prototype functions rather than the source code of the program function. Optimization procedures can be performed based on the function side effects of the program function derived from the prototype functions and the program contexts.

Abstract: A compiled program has an advanced-load instruction and a load-checking atomic section. The load-checking atomic section follows the advanced-load instruction in the compiled program. The advanced-load instruction, when executed, loads a value from a shared memory address. The load-checking atomic section includes a check instruction for checking the validity of the shared memory address.