Static (source Or Intermediate Level) Patents (Class 717/152)
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Patent number: 7921418Abstract: A method and system for evaluating a call to a library function at compile time. A first call included in a program being compiled by a compiler is identified. The first call is a call to a library function included in a pre-defined list of library functions external to the program. The first call includes one or more arguments associated with one or more formal arguments of a library function in the pre-defined list. The identification of the first call includes searching the pre-defined list of library functions for the library function. The arguments are determined to be constants. A second call to the library function is constructed in an optimizer of the compiler. A result of the second call is statically computed in the optimizer by issuing the second call with the constants as arguments. During compile time, the first call is replaced with the result.Type: GrantFiled: August 15, 2006Date of Patent: April 5, 2011Assignee: International Business Machines CorporationInventors: Rohini Nair, Thomas James Christopher Ward
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Publication number: 20110078671Abstract: An illustrative embodiment provides a computer-implemented method for an alternate type system for optimizing the evaluation and use of meta-template instantiations. The computer-implemented method obtains a source code, instantiates an element of the source code to form an instantiated element and identifies a meta-template within the instantiated element to form an identified meta-template. The computer-implemented method creates an entry for the identified meta-template in a first data structure, wherein the entry comprises a set of mapped entries, creates an associated entry in a second data structure linked to the entry comprising the set of mapped entries, wherein the associated entry represents the set of mapped entries, and uses the associated entry of the second data structure in combination with the entry of the first data structure.Type: ApplicationFiled: September 30, 2010Publication date: March 31, 2011Applicant: International Business Machines CorporationInventor: Sean Douglas Perry
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Patent number: 7917899Abstract: A program development apparatus includes a storage device configured to store an operation definition defining a program description in a source program subjected to be optimized and a complex intrinsic function including an inline clause describing statements after the optimization. An analyzer is configured to perform a syntax analysis of the complex intrinsic function by reading the complex intrinsic function out of the storage device, so as to detect the operation definition and the inline clause. A code generator is configured to generate an object code from the source program by optimizing a program description corresponding to the operation definition in the source program into the statements in the inline clause.Type: GrantFiled: February 28, 2006Date of Patent: March 29, 2011Assignee: Kabushiki Kaisha ToshibaInventors: Yutaka Ota, Atsushi Mizuno
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Patent number: 7917900Abstract: A source code clarification system is described. In various embodiments, the source code clarification system receives clarified source code and transforms the clarified source code into standard source code or object code that implements asynchronous components. The standard software source code can contain expressions for enabling asynchronous communications. The clarified code can be software source code that is expressed in an imperative language and is capable of static analysis. The clarified source code can contain a coordination primitive that encapsulates interactions between asynchronous components. By using the coordination primitives and events, the clarified source code can express interactions between asynchronous components so that the clarified source code is easier for developers to understand and for static analysis tools to analyze.Type: GrantFiled: March 30, 2007Date of Patent: March 29, 2011Assignee: Microsoft CorporationInventors: Sriram K. Rajamani, Prakash Chandrasekharan, Christopher L. Conway, Joseph Joy
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Patent number: 7908597Abstract: A synchronous reference code indicative of the fact that synchronous updating was made is provided to data which is to be applied to a critical section, and the code is set when synchronous updating is made. After a sentence in the critical section is executed, it is confirmed whether or not the synchronous updating of the data was made. In a thread for synchronous reference, reference is made, it is confirmed whether or not synchronous updating was made, and then the correctness of the updating is confirmed. When the synchronous updating is not made, the execution of the critical section is completed. Thereby the simultaneous execution of the critical sections and reduction of an overhead are realized.Type: GrantFiled: December 1, 2005Date of Patent: March 15, 2011Assignee: Hitachi, Ltd.Inventors: Hiroyasu Nishiyama, Kei Nakajima
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Patent number: 7900197Abstract: An embedded system comprises a storage device, a main memory, and an operating system (OS). The storage device stores executable files, data files, and at least one dependency tag of an application which have been installed on the embedded system. The dependency tag records relationships between the application and related data files utilized by the application under various execution statuses. The OS comprises a module which, when requested to execute the application, locates the related data files of the application according to the dependency tag, loads the executable file and the related data files to the main memory, and execute the executable file.Type: GrantFiled: May 18, 2006Date of Patent: March 1, 2011Assignee: Lite-On Technology CorporationInventor: Jiun-Jeng Huang
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Patent number: 7890939Abstract: Partial methods enable separation of method declaration and/or calls from method implementation. A partial method specifies a signature of a join or hook point in a class. Calls to a partial method specify a join or hook point in code that can optionally be linked with an actual method implementation of the same signature. Separate method implementations or other code related to a partial method are injected into a single program prior to execution. Unimplemented partial methods are treated as no operation instructions or otherwise ignored.Type: GrantFiled: February 13, 2007Date of Patent: February 15, 2011Assignee: Microsoft CorporationInventors: Dinesh C. Kulkarni, Mads Torgersen, Henricus Johannes Maria Meijer, Anders Hejlsberg, Matthew J. Warren, Peter A. Hallam
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Patent number: 7861234Abstract: An application compiled to a binary executable according to a first set of binary interface rules has selected caller/callee pairs that present parameter passing improvement possibilities modified from compliance with the first set of binary interface rules to compliance with a second set of binary interface rules to improve the efficiency of parameter passing, such as by reducing the number of instructions used to pass the parameters. A binary executable search engine searches the binary executable to locate functions having parameter passing improvement possibilities. Identified caller/callee function pairs are updated with a function modifier to pass the parameters more efficiently. Selected of the identified callee functions are cloned so that a cloned function is modified instead of the original function, thus leaving the original function to pass parameters with functions beyond the view of the binary executable search engine.Type: GrantFiled: February 23, 2005Date of Patent: December 28, 2010Assignee: Oracle America, Inc.Inventors: Sheldon Lobo, Fu-Hwa Wang
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Patent number: 7861232Abstract: Disclosed is a method, system and computer product for retrieving and parsing dynamic data at runtime by use of an interpreted language script that utilize Java and XML technologies. The interpreted scripting language uses a set of proxies, introspection and configuration to access and retrieve data elements that are in existence within underlying applications but not immediately available to the interpreter.Type: GrantFiled: September 26, 2005Date of Patent: December 28, 2010Assignee: Travelocity.com LPInventors: Ann Ebie, Anthony Swan
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Patent number: 7856627Abstract: A method for handling Simple Instruction Multiple Data (SIMD) architecture restrictions through data reshaping, padding, and alignment, including: building a global call graph; creating array descriptors for maintaining array attributes; gathering array affinity information; performing global pointer analysis and escape analysis; performing loop-based analysis to identify a SIMD opportunity; building an array affinity graph; performing graph partitioning on the array affinity graph to construct an array reshaping plan; performing data reshaping on the array affinity graph; and performing SIMDization on the array affinity graph wherein SIMDization comprises automatic generation of SIMD code.Type: GrantFiled: August 8, 2006Date of Patent: December 21, 2010Assignee: International Business Machines CorporationInventors: Roch G. Archambault, Shimin Cui, Yaoqing Gao, Raul E. Silvera
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Patent number: 7853938Abstract: An XSLT-based transformation process addresses the performance problems of ordinary XSLT transformations and provides for an efficient conversion of many sources of raw, or interpreted, application data into many different interpretations. In addition, the data may be filtered to downstream users, thus enabling the use of security measures by way of the filters.Type: GrantFiled: August 28, 2003Date of Patent: December 14, 2010Assignee: International Business Machines CorporationInventors: Wassim Melhem, Christine N. Knight
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Patent number: 7853935Abstract: A method and system for generating programming code and/or configuration data for programmable controller and the networks on which they operate is disclosed. In one embodiment, programming code is generated on a centralized server having a web-enabled engineering tool. The engineering tool operates on client devices that are in communication with the server over a network, such as the Internet. Preferably, the engineering tool runs in a browser application (or other network-interfacing-application) on the client device and a user generates the programming code on the server with the aid of the client device. By centralizing the engineering tool, which may contain a configuration editor and a configuration management tool having version management functionality, a new business paradigm for providing engineering tool services to customers having programmable controllers. In addition, new methods and tools for collaborative engineering of programming code are enabled.Type: GrantFiled: December 21, 2004Date of Patent: December 14, 2010Assignee: Siemens Industry, Inc.Inventor: George Lo
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Patent number: 7854002Abstract: Spyware programs are detected even if their binary code is modified by normalizing the available code and comparing to known spyware patterns. Upon normalizing the known spyware code patterns, a signature of the normalized code is generated. Similar normalization techniques are employed to reduce the executable binary code as well. A match between the normalized spyware signature and the patterns in the normalized executable code is analyzed to determine whether the executable code includes a known spyware. For pattern matching, Deterministic Finite Automata (DFA) is constructed for basic blocks and simulated on the basic blocks of target executable, hash codes are generated for instructions in target code and known spyware code and compared, register usages are replaced with common variables and compared, and finally Direct Acyclic Graphs (DAGs) of all blocks are constructed and compared to catch reordering of mutually independent instructions and renamed variables.Type: GrantFiled: April 30, 2007Date of Patent: December 14, 2010Assignee: Microsoft CorporationInventors: Harish Mohanan, Perraju Bendapudi, Rajesh Jalan, SriSatya Aravind Akella
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Publication number: 20100306754Abstract: A method and system for enhancing the execution performance of program code. An analysis of the program code is used to generate code usage information for each code module. For each module, the code usage information is used to determine whether the code module should be separated from its original module container. If so, the code module is migrated to a new module container, and the code module in the original module container is replaced with a reference to the code module in the new module container.Type: ApplicationFiled: August 12, 2010Publication date: December 2, 2010Applicant: International Business Machines CorporationInventors: Taimur Javed, Philip Loats, William J. Tracey, II, David A. Wood, III
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Patent number: 7840951Abstract: One embodiment of the present invention provides a system that reduces the overhead involved in executing a native code method in an application running on a virtual machine. During operation, the system selects a call to a native code method to be optimized within the virtual machine, decompiles at least part of the native code method into an intermediate representation, and obtains an intermediate representation associated with the application. Next, the system combines the intermediate representation for the native code method with the intermediate representation associated with the application running on the virtual machine to form a combined intermediate representation, and generates native code from the combined intermediate representation, wherein the native code generation process optimizes interactions between the application running on the virtual machine and the native code method. A variation on this embodiment involves optimizing callbacks by the native code method into the virtual machine.Type: GrantFiled: August 22, 2003Date of Patent: November 23, 2010Assignee: Oracle America, Inc.Inventors: Gregory M. Wright, Mario I. Wolczko, Matthew L. Seidl
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Patent number: 7840952Abstract: A method and system are described for generating reference tables in object code which specify the addresses of branches, routines called, and data references used by routines in the code. In a suitably equipped processing system, the reference tables can be passed to a memory management processor which can open the appropriate memory pages to expedite the retrieval of data referenced in the execution pipeline. The disclosed method and system create such reference tables at the beginning of each routine so that the table can be passed to the memory management processor in a suitably equipped processor. Resulting object code also allows processors lacking a suitable memory management processor to skip the reference table, preserving upward compatibility.Type: GrantFiled: January 25, 2006Date of Patent: November 23, 2010Assignee: Micron Technology, Inc.Inventor: Dean A. Klein
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Patent number: 7840954Abstract: A computer implemented method, data processing system, and computer usable code are provided for generating code to perform scalar computations on a Single-Instruction Multiple-Data (SIMD) Reduced Instruction Set Computer (RISC) architecture. The illustrative embodiments generate code directed at loading at least one scalar value and generate code using at least one vector operation to generate a scalar result, wherein all scalar computation for integer and floating point data is performed in a SIMD vector execution unit.Type: GrantFiled: November 29, 2005Date of Patent: November 23, 2010Assignee: International Business Machines CorporationInventor: Michael Karl Gschwind
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Publication number: 20100269095Abstract: A code analysis system is described herein that provides code completion for programming languages that include elements that are not statically discoverable and that provides results in a predictable period that is acceptable for an interactive user interface. The system compiles each file into an intermediate state that can be stored and cached to speed later analysis of files. In addition, when executing a particular file, the system monitors a time-based threshold and/or a recursion depth so that if the compilation time is exceeding the threshold or a function is exceeding the recursion depth the system can stop the execution and use the intermediate results obtained up to that point to provide as much information as possible within a bounded execution time. When dynamic analysis fails, the system falls back to static analysis.Type: ApplicationFiled: April 21, 2009Publication date: October 21, 2010Applicant: Microsoft CorporationInventors: Jefferson King, Alan Oursland
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Patent number: 7805716Abstract: A first software program may be read in by way of a compiler, which is included in a computer, and is converted into a second software program that may be executed by the computer. This second software program may be executed on the computer so that a control function of a stored-program controller can be taken over by a computer by way of a particular process.Type: GrantFiled: June 16, 2003Date of Patent: September 28, 2010Assignee: Siemens AktiengesellschaftInventor: Dieter Kleyer
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Patent number: 7805717Abstract: A system and method for instrumenting program instructions. A processing system includes a compiler and a profiler. The compiler is configured to notify the profiler of a compilation event corresponding to first program instructions. In response to detecting the event, the profiler is configured to intercept compilation of the first program instructions, determine whether an instrumented version of the first program instructions is currently available, instruct the compiler to compile the instrumented version of the first program instructions if available, and retrieve and instrument the first program instructions if not available. The profiler may maintain an instrumentation cache for storing instrumented versions of program instructions. The instrumentation cache may further include metadata which identifies portions of program code which have been instrumented and their location. The profiler may generally instrument program instructions once during the resident life of a corresponding application.Type: GrantFiled: October 17, 2005Date of Patent: September 28, 2010Assignee: Symantec Operating CorporationInventors: Michael P. Spertus, Christopher D. Metcalf, Gadi Wolfman
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Patent number: 7788672Abstract: According to one embodiment, an information processing apparatus includes a plurality of execution modules and a scheduler which controls assignment of a plurality of basic modules to the plurality of execution modules. The scheduler includes assigning, when an available execution module which is not assigned any basic modules exists, a basic module which stands by for completion of execution of other basic module to the available execution module, measuring an execution time of processing of the basic module itself, measuring execution time of processing for assigning the basic module to the execution module, and performing granularity adjustment by linking two or more basic modules to be successively executed according to the restriction of a execution sequence so as to be assigned as one set to the execution module and redividing the linked two or more basic modules, based on the two execution measured execution times.Type: GrantFiled: April 6, 2009Date of Patent: August 31, 2010Assignee: Kabushiki Kaisha ToshibaInventor: Yasuyuki Tanaka
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Patent number: 7788655Abstract: A compilation mechanism is disclosed for facilitating the keeping of local variables in the same hardware registers across multiple code blocks. In one implementation, each code block has a list of local variables associated therewith. This list of local variables represents the local variables that should be loaded into registers prior to entering a code block. For multiple code blocks, the various lists may have local variables in common. In one implementation, the mechanism orders the local variables in the various lists in such a manner that, as much as possible, the same local variables are placed in the same slots of the various lists. By doing so, the mechanism minimizes the movement of local variables from register to register when going from code block to code block.Type: GrantFiled: August 30, 2005Date of Patent: August 31, 2010Assignee: Oracle America, Inc.Inventor: Christopher J. Plummer
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Patent number: 7784041Abstract: A method is disclosed for reducing dynamic pauses during dynamic compilation. Applications running on a system detect the rendering of dynamic output to a user. The dynamic output represents a change in visual or audio data while any application is running. When an application detects such output it notifies the system, which monitors the frequency of the dynamic output. If the frequency of the dynamic output exceeds a threshold, the system informs a compiler on the system to suspend compilation. Compilation normally occurs when an interpreter on the system is instructed to pass processing control to the compiler. One way this occurs is if a method currently being processed by the interpreter has been marked for compilation. Thus, in order to suspend compilation, the compiler ceases to mark methods for compilation so that the interpreter will not be instructed to pass processing control to the compiler.Type: GrantFiled: March 30, 2006Date of Patent: August 24, 2010Assignee: Oracle America, Inc.Inventors: Ioi K. Lam, Oleg A. Pliss
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Patent number: 7779399Abstract: Methods, software tools and systems for analyzing software applications, e.g., Web applications, are described. A software application to be analyzed is transformed into an abstract representation which preserves its information flow properties. The abstract interpretation is evaluated to identify vulnerabilities using, for example, type qualifiers to associate security levels with variables and/or functions in the application being analyzed and typestate checking. Runtime guards are inserted into the application to secure identified vulnerabilities.Type: GrantFiled: May 16, 2006Date of Patent: August 17, 2010Assignee: Armorize Technologies, Inc.Inventors: Yao-Wen Huang, Fang Yu, Chung-Hung Tsai, Christian Hang, Der-Tsai Lee, Sy-Yen Kuo
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Patent number: 7765535Abstract: In a computer where a software development tool program is started, an updating elapse degree and an execution frequency for a series of source programs used for generating an execution module are acquired. An optimization option of the level according to the updating elapse degree or the execution frequency is set for each of the source programs. Compiling accompanied by the optimization of the level indicated by the optimization option is performed for each of the source programs. Object programs created by the compiling are coupled.Type: GrantFiled: April 24, 2006Date of Patent: July 27, 2010Assignee: Fujitsu LimitedInventors: Masatoshi Haraguchi, Masaki Arai, Kotaro Taki
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Patent number: 7765539Abstract: A method of porting a video game or other application from one platform to another involves decompiling the game executable to develop source code in a high level programming language such as C. The (re)generated source code is re-linked using target native libraries to handle hardware functions (e.g., video, audio, etc.) for the target platform. The resulting “trans-compiled” executable is able to efficiently run on the target platform, potentially providing orders of magnitude speed performance boost over other traditional techniques.Type: GrantFiled: May 19, 2005Date of Patent: July 27, 2010Assignee: Nintendo Co., Ltd.Inventors: Scott Elliott, Phillip R. Hutchinson
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Patent number: 7757225Abstract: A method and apparatus are disclosed for optimizing the runtime behavior of database or other applications by allowing selection of alternative code segments during linking of pre-compiled object modules. A macro-preprocessor inserts a declaration for a global variable in the source code in response to an occurrence of a command of interest. The linker selects object modules for executing other commands based on the presence or absence of the declaration for the global variable in the preprocessed source code. The method and apparatus are useful in implementing programming language statements including non-procedural programming languages such as the Embedded Structured Query Language (ESQL).Type: GrantFiled: June 29, 2001Date of Patent: July 13, 2010Assignee: Microsoft CorporationInventors: Jeffrey L. Copeland, Jason D. Zions, Donn S. Terry
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Patent number: 7757221Abstract: A method and apparatus for dynamic binary translator to support precise exceptions with minimal optimization constraints. In one embodiment, the method includes the translation of a source binary application generated for a source instruction set architecture (ISA) into a sequential, intermediate representation (IR) of the source binary application. In one embodiment, the sequential IR is modified to incorporate exception recovery information for each of the exception instructions identified from the source binary application to enable a dynamic binary translator (DBT) to represent exception recovery values as regular values used by IR instructions. In one embodiment, the sequential IR may be optimized with a constraint on movement of an exception instruction downward past an irreversible instruction to form a non-sequential IR. In one embodiment, the non-sequential IR is optimized to form a translated binary application for a target ISA. Other embodiments are described and claimed.Type: GrantFiled: September 30, 2005Date of Patent: July 13, 2010Assignee: Intel CorporationInventors: Bixia Zheng, Cheng C. Wang, Ho-seop Kim, Mauricio Breternitz, Jr., Youfeng Wu
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Patent number: 7752611Abstract: Various embodiments that may be used in performing speculative code motion for memory latency hiding are disclosed. One embodiment comprises extracting an asynchronous signal from a memory access instruction in a program to represent a latency of the memory access instruction, and generating a wait instruction to wait the asynchronous signal.Type: GrantFiled: December 10, 2005Date of Patent: July 6, 2010Assignee: Intel CorporationInventors: Long Li, Jinquan Dai, Zhiyuan Lv
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Patent number: 7747990Abstract: A compiling method compiles an object program to be executed by a processor having a plurality of execution units operable in parallel. A first availability chain is created from a producer instruction (p1) to a first consumer instruction (c1), when the execution of the instruction requires a value produced by the producer instruction. The first availability chain includes at least one move instruction (mv1-mv3) for moving the required value from a first point (20: ARF) accessible by the producer execution unit to a second point (22: DRF) accessible by a first consumer execution unit. When a second consumer instruction (c2), also requiring the same value, is scheduled for execution by an execution unit (23: EXU) other than the first consumer execution unit, at least part of the first availability chain is reused to move the required value to a point (23: DRF) accessible by that other execution unit.Type: GrantFiled: October 7, 2002Date of Patent: June 29, 2010Assignee: Altera CorporationInventors: Marcio Merino Fernandes, Raymond Malcolm Livesley
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Patent number: 7747991Abstract: Noting that there is a case where a type of a pointer “this” in a member function can be specified, the present invention provides a program converting method in which a virtual function call can be converted into a direct function call, and by which improvement of execution performance as well as reduction of a code size of a program can be achieved. The program converting method is a method for converting a program described in an object-oriented language, including: analyzing, in the program, a type of an instance by which a method is called; extracting, from a definition of the method, a virtual method call which is called by the instance; and converting, based on the type of the instance analyzed by the analyzing, the virtual method call extracted by the extracting, into a direct method call.Type: GrantFiled: November 14, 2005Date of Patent: June 29, 2010Assignee: Panasonic CorporationInventor: Hirohisa Tanaka
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Patent number: 7747986Abstract: A computing system for determining performance factors for using in performance modeling of a deployed subject system, is presented. The computing system includes a plurality of software components comprising the subject system. Each of the components is susceptible to event tracing while executing on the computing system. The computing system includes a tracing component. The tracing component is configured to trace events of the components of the subject system as they execute. The computing system includes a transaction identification table. The transaction identification table comprises starting and ending actions for transactions performed by the subject system. The computing system also includes a transaction identification component that identifies actions from traced events, identifies related actions corresponding to a transaction according to the starting and ending actions in the transaction identification table, and stores the related actions in the transaction workflow data store.Type: GrantFiled: June 15, 2005Date of Patent: June 29, 2010Assignee: Microsoft CorporationInventors: Glenn F LaVigne, Efstathios Papaefstathiou, Jonathan C Hardwick, Quanzhan Zheng, Rebecca Isaacs, Paul Barham
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Patent number: 7743367Abstract: A method is described that comprises receiving from a classfile registration information. The registration information comprises a class name and a different method name for each of the class's methods. Each of the methods are modified with at least one additional byte code instruction to cause, for its respective method, a plug-in module's handler method to provide output function treatment for the respective method. Also, a plug-in pattern is referred to in order to determine which of a plurality of plug-in modules are appropriate for each of the class's methods. The plug-in pattern lists for each of the plug-in modules those of the methods that are to be handled with its corresponding output function treatment.Type: GrantFiled: December 30, 2003Date of Patent: June 22, 2010Assignee: SAP AGInventors: Nikolai G. Nikolov, Mario Kabadiyski
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Patent number: 7739674Abstract: In one embodiment of the present invention an interpreted language, such as, for example, Java, is selectively optimized by partitioning the interpreted language code (98) into a plurality of blocks (80-83) based on the complexity of each of the interpreted language instructions. In one embodiment of the present invention, each of the plurality of blocks is identified as either a block to be compiled into native code (80-82) if the block is simple, or a block to be interpreted (83) if the block is complex. The compiled and interpreted blocks are appended to form in-line mixed code (99) that contains both native code (90-92) and interpreted language code (93). This mixed code is formed before run-time, so that no further compilation is required at run-time. A processing unit (102) may be used to execute the native code directly without the use of a Java VM (10), while also executing, in-line, the interpreted language code (93) which requires use of the Java VM (10) to interpret the Java bytecodes.Type: GrantFiled: June 29, 2004Date of Patent: June 15, 2010Assignee: Freescale Semiconductor, Inc.Inventors: Howard Dewey Owens, Viatcheslav Alexeyevich Kirillin, Mikhail Andreevich Kutuzov, Dmitry Sergeevich Preobrazhensky
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Patent number: 7730464Abstract: The contents of a cache of specialized code interpreted into an intermediate language may be recompiled for execution in a managed execution environment in accordance with an automated process in such a manner to minimize any impact on machine resources.Type: GrantFiled: September 14, 2005Date of Patent: June 1, 2010Assignee: Microsoft CorporationInventor: Sean E. Trowbridge
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Patent number: 7730459Abstract: A compiler transforms source code into intermediate code and provides the intermediate code to a profiler. The profiler executes the intermediate code. The profiler generates a performance profile that indicates the performance of the intermediate code, and annotates the intermediate code based, at least in part, on data from the performance profile. The compiler receives annotated intermediate code from the profiler and transforms the annotated intermediate code into machine code. Alternatively, the compiler transforms intermediate code to machine code and provides the machine code to a profiler. The profiler executes the machine code and generates a data file that indicates the performance of the machine code. The compiler receives the data file, and modifies the machine code based on the data file.Type: GrantFiled: September 30, 2003Date of Patent: June 1, 2010Assignee: Intel CorporationInventors: Frank G. Gates, James L. Jason, Erik J. Johnson
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Patent number: 7716657Abstract: A method for compiler optimization particularly well suited to object-oriented language that permit dynamic class loading. The method permits the compiler optimization of code associated with a potentially polymorphic object that is a call parameter to a virtual procedure where the procedure is a candidate for devirtualization through inlining. The method includes steps for guarded devirtualizing of the procedure, insertion of code to ensure privatization of the object before the procedure is executed, creation of a guard assumptions associated with the object and application of known optimization techniques to the code associated with the object.Type: GrantFiled: October 28, 2004Date of Patent: May 11, 2010Assignee: International Business Machines CorporationInventors: Derek Bruce Inglis, Ali Ijaz Sheikh
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Publication number: 20100095287Abstract: A method for analyzing a program is provided. The method includes, determining an object type that may exist at an execution point of the program, wherein this enables determination of possible virtual functions that may be called; creating a call graph at a main entry point of the program; and recording an outgoing function call within a main function. The method also includes analyzing possible object types that may occur at any given instruction from any call path for virtual calls, wherein possible object types are determined by tracking object types as they pass through plural constructs; and calling into functions generically for handling specialized native runtime type information.Type: ApplicationFiled: December 14, 2009Publication date: April 15, 2010Applicant: Lantronix, Inc.Inventor: Timothy Chipman
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Patent number: 7698696Abstract: A compiler comprises an analysis unit that detects directives (options and pragmas) from a user to the compiler, an optimization unit that is made up of a processing unit (a global region allocation unit, a software pipelining unit, a loop unrolling unit, a “if” conversion unit, and a pair instruction generation unit) that performs individual optimization processing designated by options and pragmas from a user, following the directives and the like from the analysis unit, etc. The global region allocation unit performs optimization processing, following designation of the maximum data size of variables to be allocated to a global region, designation of variables to be allocated to the global region, and options and pragmas regarding designation of variables not to be allocated in the global region.Type: GrantFiled: June 30, 2003Date of Patent: April 13, 2010Assignee: Panasonic CorporationInventors: Hajime Ogawa, Taketo Heishi, Toshiyuki Sakata, Shuichi Takayama, Shohei Michimoto, Tomoo Hamada, Ryoko Miyachi
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Patent number: 7689979Abstract: Modification of source code reduces a launch time associated with an application program so that the application program more quickly responds to input from a user after startup. One technique of modifying source code includes converting globally defined variables in the source code to local static variables associated with respective newly created functions. Inclusion of the globally defined variables in the source code impacts application launch time because a compiler creates initialization code associated with the globally defined variables that must be run at launch time to initialize the variables in case they are used by functions in the application program. On the other hand, local static variables are initialized when the function that contains them is first called. Thus, use of local static variables in respective newly created functions in lieu of globally defined variables reduce application program launch time.Type: GrantFiled: August 2, 2005Date of Patent: March 30, 2010Assignee: Adobe Systems Inc.Inventors: David G. Sawyer, Dylan Ashe, Brent E. Rosenquist
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Patent number: 7685586Abstract: Global escape analysis using instantiated type analysis (ITA) is applied to a method of an object-oriented application to analyze control flow beginning with an invocation of the method. The instantiated type analysis methodology (inter-procedural control flow analysis) tracks instantiated objects, following both the flow of execution and the flow of these objects throughout the method invocations and field instances of the software, ultimately determining which instantiated objects do not escape. Not all method invocations must be followed and therefore a closed system is not required. This ITA algorithm has been enhanced for the purposes of escape analysis, so that is well-suited for runtime environments in which classes are loosely specified, or in circumstances in which a subset of a program is unavailable.Type: GrantFiled: March 19, 2009Date of Patent: March 23, 2010Assignee: International Business Machines CorporationInventor: Sean C. Foley
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Patent number: 7681188Abstract: One embodiment of the present invention provides a system that facilitates locked prefetch scheduling in general cyclic regions of a computer program. The system operates by first receiving a source code for the computer program and compiling the source code into intermediate code. The system then performs a trace detection on the intermediate code. Next, the system inserts prefetch instructions and corresponding locks into the intermediate code. Finally, the system generates executable code from the intermediate code, wherein a lock for a given prefetch instruction prevents subsequent prefetches from being issued until the data value returns for the given prefetch instruction.Type: GrantFiled: April 29, 2005Date of Patent: March 16, 2010Assignee: Sun Microsystems, Inc.Inventors: Partha P. Tirumalai, Spiros Kalogeropulos, Yonghong Song
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Patent number: 7681187Abstract: A method and apparatus for optimizing register allocation during scheduling and execution of program code in a hardware environment. The program code can be compiled to optimize execution given predetermined hardware constraints. The hardware constraints can include the number of register read and write operations that can be performed in a given processor pass. The optimizer can initially schedule the program using virtual registers and a goal of minimizing the amount of active registers at any time. The optimizer reschedules the program to assign the virtual registers to actual physical registers in a manner that minimizes the number of processor passes used to execute the program.Type: GrantFiled: March 31, 2005Date of Patent: March 16, 2010Assignee: NVIDIA CorporationInventors: Michael G. Ludwig, Jayant B. Kolhe, Robert Steven Glanville, Geoffrey C. Berry, Boris Beylin, Michael T. Bunnell
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Patent number: 7669193Abstract: A method for analyzing a program is provided. The method includes, determining an object type that may exist at an execution point of the program, wherein this enables determination of possible virtual functions that may be called; creating a call graph at a main entry point of the program; and recording an outgoing function call within a main function. The method also includes analyzing possible object types that may occur at any given instruction from any call path for virtual calls, wherein possible object types are determined by tracking object types as they pass through plural constructs; and calling into functions generically for handling specialized native runtime type information.Type: GrantFiled: March 2, 2004Date of Patent: February 23, 2010Assignee: Lantronix, Inc.Inventor: Timothy Chipman
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Patent number: 7669197Abstract: Disclosed herein is a component architecture platform (CAP) framework that provides a mechanism to update firmware, drivers, and/or application software in an embedded system, such as in mobile electronic devices. The framework also facilitates access to generated update packages by the embedded system and provides updates to firmware, drivers, content or application software in a fault tolerant mode. Generation of update packages is more efficient and the update packages employing CAP are more compact than prior solutions. A distributed version of CAP, (DCAP), also provides access to functionality or components located at remote locations on other platforms.Type: GrantFiled: September 3, 2003Date of Patent: February 23, 2010Assignee: Hewlett-Packard Development Company, L.P.Inventors: Patrick O'Neill, Bindu Rama Rao, Eugene Wang
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Patent number: 7665078Abstract: A method for optimizing a code sequence by tuning the representations of an instruction set based on the frequency of operations performed by the code sequence. For example, the number of bit symbols used to represent a code sequence may be reduced using the present invention.Type: GrantFiled: August 21, 2003Date of Patent: February 16, 2010Assignee: Gateway, Inc.Inventor: Frank Liebenow
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Patent number: 7661097Abstract: Methods and systems are provided for analyzing a source code. The method includes collecting function entry information during the execution of tests on the source codes. The function entry information is then converted into symbolic codes. The function calls are replaced by the elements of the symbolic codes in the source codes. The elements can be in the form of functions. Subsequently, static analysis is performed on the source code by using the mapping between the function calls and the functions in the source code.Type: GrantFiled: April 5, 2005Date of Patent: February 9, 2010Assignee: Cisco Technology, Inc.Inventor: Lakshmankumar Mukkavilli
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Patent number: 7657881Abstract: A method to automatically replace computationally intensive functions with optimized functions in managed code is disclosed. If the underlying processor has associated optimized functions, managed application code is disassembled and parsed to find computationally intensive functions. The computationally intensive functions are then replaced with optimized functions, and the application code is re-compiled if necessary.Type: GrantFiled: December 21, 2004Date of Patent: February 2, 2010Assignee: Intel CorporationInventors: Gururaj Nagendra, Stewart N. Taylor
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Patent number: 7634767Abstract: A method is presented including assigning a first register class to at least one symbolic register in at least one instruction, determining and assigning a second register class to the at least one register, reducing register class fixups and renaming the at least one symbolic register. Also presented is a system including a processor having at least one register and a compiler executing in the processor that inputs a source program having many operation blocks. The compiler assigns a first register class in at least one instruction to at least one symbolic register, determines and assigns a second register class to the at least one symbolic register, reduces register class fixups, and renames the at least one symbolic register.Type: GrantFiled: March 31, 2004Date of Patent: December 15, 2009Assignee: Intel CorporationInventors: Bo Huang, Jinquan Dai, Cotton Seed
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Patent number: 7631305Abstract: Methods and products for processing a software kernel of instructions are disclosed. The software kernel has stages representing a loop nest. The software kernel is processed by partitioning iterations of an outermost loop into groups with each group representing iterations of the outermost loop, running the software kernel and rotating a register file for each stage of the software kernel preceding an innermost loop to generate code to prepare for filling and executing instructions in software pipelines for a current group, running the software kernel for each stage of the software kernel in the innermost loop to generate code to fill the software pipelines for the current group with the register file being rotated after at least one run of the software kernel for the innermost loop, and repeatedly running the software kernel to unroll inner loops to generate code to further fill the software pipelines for the current group.Type: GrantFiled: September 20, 2004Date of Patent: December 8, 2009Assignee: University of DelawareInventors: Hongbo Rong, Guang R. Gao, Alban Douillet, Ramaswamy Govindarajan