Abstract: A method by which the each module of a token passing local area network complying with IEEE standard 802.4 determines if the communication cable from which it is receiving signals is faulty and switches to a second, or redundant cable. Each module transmits the same signals over both cables, but can receive signals from only one, its selected cable. In normal operations, all modules receive signals from the same cable. Each of the modules has the capability of detecting faults in its selected cable, and of switching cables so that its second cable becomes its selected cable. Each module also has the capability of initiating the process or re-establising the network whenever a module switches cables in response to detecting a fault. Each module in response to the process of initiating re-establishing the network, switching cables so that all modules are listening to, or receiving signals from the same cable.

Abstract: A process control system includes a primary processor connected to a primary memory via a bus. The primary processor transfers data to be stored to said primary memory. An apparatus of the present invention connected to the bus, collects predetermined data of the data being transferred simultaneously with the transfer of the data to the primary memory. The predetermined data collected by the apparatus is subsequently transferred to a backup processor controller to update the data base of the backup process controller. The apparatus comprises a storage element which stores the data collected. A logic unit controls the operation of the apparatus including the collection of the predetermined data. A control unit of the apparatus transfers the predetermined data stored in the storage element to the backup process controller.

Abstract: A process control system includes a process controller which has a first and second controller, one of the controllers being designated as a primary controller and the other controller being designated as a secondary controller. Each controller has a respective data base. The primary controller performs predefined control functions of the process control system which includes updating the data base associated with the primary controller as a result of performing the predefined control functions. A method for updating the data base associated with the secondary controller comprises the steps of performing the control functions. Results therefrom are utilized to update the data base associated with the primary controller. Simultaneously with updating the data base, predetermined information being stored in the primary data base is collected. At the completion of performing the control functions, the predetermined information which was collected is transferred to the secondary controller.

Abstract: A current source is controlled by the output signal from a digital to analog converter. The output signal from the digital to analog converter is applied to an amplifier unit. The output of the amplifier unit controls current through a pass transistor element, the pass transistor element current being the current applied to the load impedance. A feedback signal is generated by a differential amplifier in response to the current applied to the load impedance. The output signal from the difference amplifier is applied to an input terminal of the digital to analog converter with a polarity resulting in a change in the output signal of the amplifier unit which compensates for any change in the current through the load impedance. A voltage level changing element is included in the pass transistor control terminal to interrupt the current to the load impedance in the event of a degradation in the power supply.

Abstract: An A/D converter circuit generates a precise digital signal which accurately corresponds to an analog input signal. The A/D converter comprises a converter element, having a first and second, input terminal for receiving control signals, and having an output terminal, and further having at least one analog input terminal. The analog input signal is coupled to the analog input terminal, for converting the analog input signal to an uncorrected digital signal. The uncorrected digital signal includes inaccuracies of the parameter differentials of the converter element. A memory unit, stores information defining the actual parameter values of the converter element. A processor, controls the conversion of the analog input signal to the precise digital signal, wherein the actual parameter values are applied to the uncorrected digital signal thereby removing the inaccuracies of the converter element to obtain the precise digital signal.

Abstract: The lubrication insertions system of the present invention inserts lubricating oil into the critical areas of a bearing. The system comprises a delivery element for delivering lubricating oil to a predetermined point relative to the bearing. The bearing, which is rotating, causes the lubricating oil to be slung outward of the spin axis of the bearing. A cage element, having a lip that extends beyond the edge of the bearing, captures the lubricating oil and directs the lubricating oil into the bearing to the outer race of the bearing and to the rolling elements of the bearing, which track the oil to the inner race of the bearing.

Abstract: A combination wedge-lock type circuit card retainer and guide slot for use in an electronic chassis. The combination including an elongated base member having a circuit card guide wall formed along one side. One end of the base member has a fixed wedge formed thereon spaced from and facing the guide wall. A support aligned with the fixed wedge is formed adjacent the other end of the base member and it also is spaced from the guide wall. The combination retainer also includes a shaft having a head end and a thread end. The shaft extends through the fixed wedge with its thread end engaged in the support. An end wedge is threaded onto the shaft adjacent the thread end with a center wedge mounted on the shaft between the fixed and end wedges. The center wedge is provided with a spring that is grounded on the base member for biasing the center wedge into engagement and alignment with the fixed and the end wedges. The aligned wedges together with the guide wall forming a circuit card channel or slot.

Abstract: In a low resolution color printer having a color set, a set of shaded colors is generated thereby expanding the color set of the printer. The method for generating the shaded colors determines if a critical line is to be printed. Then a check is made to determine if a shaded color is to be printed. If a pattern of a shaded color is to be printed, including a non-critical line, a first algorithm is used to generate a print buffer by interspersing a dark (quasi-black) colored pixel among the colored pixels, the blending effect resulting in a shaded color. If a critical line of a shaded color is to be printed, a second algorithm is utilized (to overcome a deficiency of the first algorithm) to insure an interspersing of the dark pixels with colored pixels. Otherwise, the pattern is printed in the designated color.

Abstract: A local area network has a plurality of modules, each module having a corresponding timing subsystem. Each timing subsystem includes a clock unit for generating clock pulses, and an a.c. power source. Each timing subsystem is capable of having the timing information generated by each timing subsystem substantially synchronized to the timing information generated by a timing subsystem designated as a master timing subsystem. Each timing subsystem includes a first element, adapted to receive clock pulses and an a.c. reference signal generated from an a.c. power source, which generates timing information from the clock pulses or the a.c. reference signal in response to commands from the module. A register element stores the timing information generated. A second element updates the timing information stored in the register element with timing information included in a timing frame in response to a predetermined command from the module.

Abstract: In order to insure the accuracy of information transmitted over a network, the initiation of the message must be unambiguously identified. In the present invention, the intermessage spacing consists of a series of identical logic signals that exceeds a minimum value distinguishing this interval from a message character. The message character has predefined length, with a start bit position logic signal and a stop bit position logic signal bounding the character that has the same number of predetermined logic signals for every message character. The character has at least one additional non-data bit position that has a first logic signal for the initial character of a message and the complementary logic signal for the remaining characters in the message.

Abstract: A multiprocessor system architecture in which two processors are each provided with an autonomous bus and the two buses can be selectively connected to each other to form a unique system bus which enables access by all processors to common memory resources connected to one of the autonomous buses. The communication between processors takes place through messages stored into mailboxes located in the common memory. The presence of a message is evidenced by a notify/interrupt signal generated by a logic unit to which each processor has access to modify and verify the logic unit's status, using the processor's autonomous bus, and without interfering with operations using the other autonomous buses of the other processor. Such verification and access does not require access to common memory resources nor polling operations to verify the status of messages stored into "mailboxes".

Abstract: In order to prevent `jabber`, the uncontrolled transmission of messages on a communication channel, an antijabber timing unit is frequently used to determine whether a message on the communication channel exceeds the maximum permitted length of time. The present invention provides testing apparatus to determine when the antijabber timing unit is functioning accurately. In addition, protection is provided so that the testing apparatus does not compromise the function of the antijabber timing unit during subsequent message transmission. The antijabber timing unit is also used as part of the enable function for the transmission of messages over a channel to prevent the failure of a single component from resulting in inadvertent transmission of information.

Abstract: An apparatus controls the movement of a data block between a peripheral and a data processing system, which comprises a bus which includes an address bus, a first data bus, and a second data bus, the peripheral being connected to the second data bus. A first memory, connected to the second data bus, stores data, and a second memory, connected to the first data bus, stores a plurality of dummy routines in predetermined areas, the predetermined areas of the second memory having corresponding buffer areas in the first memory. The first memory and the second memory correspond to a first memory area and a second memory area within a total predefined memory space, each memory location within the total memory space being defined by a unique memory space address. A processor connected to the first data bus, fetches an instruction, in response to a control signal from the peripheral, from a preselected one of the dummy routines.

Abstract: A bidirectional repeater for Manchester encoded data (MED) signals present on a coaxial cable and fiber optic cable forming the transmission media of a local area network. The repeater receives and then reconstitutes the MED signals present on the coaxial cable and transmits the reconstituted MED signals onto the fiber optic cable. MED data present on the fiber optic cable is received, reconstituted, and transmitted onto the coaxial cable. Signals can be received from only one cable at any one time. Transmission of reconstituted MED signals is terminated when a special set of MED signals identifying the end of a transmission by a module of the network is received.

Abstract: In a process control network, apparatus and method for periodic testing of a thermocouple element includes a switching mechanism that inserts a circuit with known parameters in series with the thermocouple. Voltages levels with and without the inserted circuit are compared and used to identify a failed or failing thermocouple.

Abstract: A controller of a microprocessor includes a control store for storing microinstructions. A programmable logic array (PLA), enabled when a predetermined macroinstruction type is to be executed, translated the operand field of the macroinstruction into information bits which are used to modify the microinstruction as it is being fetched from the control store. The bits of the microinstruction which are changeable are coupled from the control store to a first input of a multiplexer. The output of the PLA is coupled to a second input of the multiplexer. A select signal for the multiplexer is generated when the predetermined instruction type is to be excuted, thereby effecting a modification of the fetched microinstruction, and yielding a modification to the basic operation of the macroinstruction.

Abstract: In a control system, having at least one controller for communicating with at least one station within the control system whereby the controllers require control of a token for initiating the communications, and further wherein the stations cannot obtain control of the token, a method of communicating between the controllers and the station wherein an instruction with a response request is sent from a controller to a station. Index data is sent back from the station and indicates a store position of status information that corresponds to the above instruction. Desired status information is retrieved by the controller utilizing the above index data, so that an execution result of the instruction sent by the controller can be verified.

Abstract: A circuit for producing a receive Manchester clock from serially received Manchester encoded data signals. The encoded data signals are differentiated to produce a primary clock pulse for each voltage transition of the applied signals. Each primary clock pulse is delayed a predetermined period of time to produce secondary clock pulse and each secondary clock pulse is delayed for substantially the same period of time to produce a tertiary clock pulse. The primary, secondary and tertiary clock pulses are applied to a gate which produces a receive Manchester clock pulse when a primary, secondary, or tertiary clock pulse is applied to the gate. The frequency of the receive Manchester clock is twice that of the basic frequency of the received Manchester encoded data signals.

Abstract: A finger-touch coordinate input apparatus according to the present invention comprises printed circuit boards provided between a display screen and its front frame and having light-emitting and light-receiving element groups thereon, and LED filters provided outside the printed circuit boards at a predetermined distance therefrom, constituting side edges of the display screen, and having light-transmitting portions at part thereof, wherein spaces formed between the printed circuit boards and the LED filters are connected to an air supply source so that an air flow is generated in at least one space, thereby easily and properly eliminating degradation of the detection function due to dust or the like at photodetectors in which the light-emitting and light-receiving elements for coordinate position detection are arranged.

Abstract: The present invention relates to a cable for transmitting light signals and electrical signals. In optical fiber cables steel wires are added to strengthen the cable. The present invention utilizes the steel wires or any other electrically conductive wires to couple electrical signals or to provide power to remote devices attached to a central station.