Abstract: The invention relates to systems and method to facilitate downloading a data file. In one embodiment, a method includes receiving at a first wireless communication device a request to download a requested data file. A determination is made at the first wireless communication device whether the requested data file is stored at a second wireless communication device with which the first wireless communication device communicates via a local wireless link. If the requested data file is determined to be stored at the second wireless communication device, the first wireless communication device retrieving the requested data file from second wireless communication device via the local wireless link.

Abstract: A current switching system is described. This system includes first and second mirrored devices coupled to each other and a coupled terminal, and the first and second mirrored devices are coupled to an input terminal and an output terminal; a storage element in element in parallel with the first mirrored device and the first degeneration device; a variable impedance device coupled between the coupled terminal and a low voltage device; and a current mirroring accuracy enhancing circuit coupled between the coupled terminal and a high voltage device, wherein the variable impedance device dynamically changes a current at the coupled terminal to a second level depending when a threshold is met, and an impedance on the coupled terminal remains low both before switching and during switching.

Abstract: A method (300) for fabricating an integrated circuit includes the step of providing a substrate having a semiconductor surface (305). For at least one masking level (e.g. gate electrode, contact or via) of the integrated circuit, a mask pattern for the masking level is partitioned into a first mask and at least a second mask (310). The first mask provides features in a first grid pattern and the second mask provides features in a second grid pattern. The first and second grid pattern have respective features that interleave with one another over at least one area. A first photoresist film is applied onto the surface of the substrate (315). The first grid pattern is printed using the first mask (320). The second grid pattern is printed using the second mask (325). The first and said second grid pattern are then etched into the surface of the substrate (330).

Abstract: A digital system is provided that converts compressed data using an indexed transcoding lookup table. A stream of compressed data samples has data samples that represent one of n values corresponding to the first compression format. The transcoding table has at least n indexed entries, and each of the n indexed entries contains a data value corresponding to a second compression format. The transcoding table is accessed by using each of a portion of the received data samples as an index into the table to form a set of transcoded data samples that have a second compression format. The set of transcoded data samples form a stream of compressed data samples that have the second compression format. The transcoding table may be augmented to perform transcoding error correction by concatenating an error value with the data sample to index the table.

Abstract: A novel and useful apparatus for and method of closed loop IQ calibration for use in a transmitter. The IQ calibration mechanism functions to provide calibration of IQ imbalance in the presence of real world RF impairments. An iterative process is used to update the gain and phase mismatch values whereby the metrics are calculated in a differential manner without the need for calculation absolute imbalance values. At each iteration, updating the gain and phase mismatch estimate requires only the direction of the correction to be determined. The direction of the correction is calculated using only the differences between output power measurements. The updated gain and phase mismatch estimates are used to update an IQ correction matrix. This process is repeated until a desired stopping criterion is reached. Gear shifting is used to ensure quick convergence of the algorithm while providing the ability to achieve any desired level of accuracy.

Abstract: Exemplary embodiments provide a method for laying out an IC design and the IC design layout. The IC design layout can include one or more gate features placed on an active region including a first pitch (p1) between any two adjacent gate features. Additionally, the IC design layout can include a printable-gate-assist feature placed adjacent to at least one side of the active region, and placed parallel to and at a second pitch (p2) from one first gate feature of the one or more gate features. In various embodiments, a printable-gate-extension feature can be drawn in the design to extend a second gate feature to match a length with a longer neighboring gate feature of the one or more gate features.

Abstract: A circuit is provided for use with a reference voltage. The circuit includes a voltage source, a common-mode feedback amplifier and a feedback impedance portion. The common-mode feedback amplifier may be connected to the voltage source and may be arranged to receive the reference voltage. The common-mode feedback amplifier may include an input stage, an output stage, a positive input, a negative input and an output. The output may be connected to the feedback impedance portion. The feedback impedance portion may additionally be connected to one of the positive input and the negative input. A feedback factor, based on the feedback impedance portion, is less than one.

Abstract: Conventional muting circuitry for amplifiers (which usually uses clamps) generally has about 20-30 dB of attenuation. Here, an integrated circuit or IC is provided that includes an amplifier, switch networks, and a controller. The controller provides control signals to the switch network to provide mute functionality by actively muting the amplifier. In particular, feedback is provided through at least one of the switch networks to drive the output of the amplifier to null or ground so as to provide 70-80 dB (or more) of attenuation.

Abstract: A system comprises a receiver and a transmitter in wireless communication with the receiver. The receiver receives from the transmitter multiple bursts of data on a paging channel. First and second bursts of data comprise channel protocol information and paging mode data. The second burst comprises an encoding dependency that groups paging mode data independently of channel protocol information.

Abstract: An automatic frequency tuning system and method for a transmit power amplifier. The transmit power amplifier has an antenna feed line including a series capacitor and is coupled to an output of an output driver. In one embodiment, the system includes: (1) a shunt capacitor array having a plurality of capacitors selectably couplable to the antenna feed line to apply a programmable shunt capacitance thereto, (2) a peak detector circuit couplable to nodes of the antenna feed line associated with both terminals of the series capacitor and (3) a processor configured to control the peak detector circuit to determine a ratio of voltage levels measured at the nodes at a given power level of the output driver.

Abstract: Various apparatuses and methods for varying segment activation in a segmented power amplifier are disclosed herein. For example, some embodiments provide a power amplifier including an input, an output, a plurality of amplifier segments and a controller. The amplifier segments are connected in parallel between the input and the output and are adapted to be activated and inactivated. The power level at the output may be controlled by changing a number of the amplifier segments that are activated concurrently. The controller is connected to the amplifier segments and is adapted to vary which of the amplifier segments are activated to arrive at a selected number of activated amplifier segments.

Abstract: A system including storage comprising a first graphical pixel and a second graphical pixel. Each of the first and second graphical pixels is associated with binary codes having red, green and blue sub-codes. The system also comprises processing logic coupled to the storage and adapted to alpha-blend the first and second graphical pixels to produce a blended pixel. The processing logic performs this alpha-blend using the binary codes having red, green and blue sub-codes in concatenated form and without operating on the sub-codes individually. The processing logic displays the blended pixel.

Abstract: The objective of this invention is to provide a semiconductor device containing a photodiode and having stable, high sensitivity with respect to short wavelength light near 405 nm, and a manufacturing method for said semiconductor device. PIN photodiode (100C) has the following layers formed on silicon substrate (110): p-type silicon region (112), n-type silicon layer (114), field oxide film (118), silicon oxide film (120c) that covers the surface of the active region, and silicon nitride film (122c) that covers silicon oxide film (120c). Said field oxide film (118) contains extending portions (160) extending to the interior of the active region; the side portions of extending portions (160) are connected to silicon oxide film (120c), and the exposed surface portions of extending portions (160) become regions for hydrogen diffusion.

Abstract: The disclosed systems and methods of low offset switched capacitor comparator reduce settling errors. The system operates in two major phases. During a first phase, the input voltage is sampled on the input capacitors and a differential amplifier is configured in a unity gain configuration to sample the amplifier offset. During the second phase, the input voltage difference is amplified at the output of the comparator. The amplifier transient sampling error is reduced by shorting the outputs of the differential amplifier for a shorting period at the start of the second phase. A clocked comparator at the output of the differential amplifier provides a fast comparison using internal positive feedback. The differential amplifier should have developed sufficient differential output voltage to overcome the offset of the clocked comparator.