Abstract: A self-biased MOSFET with suitably biased substrate is used as one of the rectifiers in a rectifier circuit for converting a-c power to d-c power for application to a monolithic integrated circuit of which the rectifier circuit is a part. This avoids the parasitic transistor action which would accompany the use of an isolated pn semiconductor junction, which parasitic transistor action undesirably discharges a storage capacitor connected across the output of the rectifier circuit.

Abstract: Operational transconductance amplifiers are described in which the balanced output currents of a preliminary amplifier stage are applied to the input connections of first and second current amplifiers. A third current amplifier has an input connection to which the output connection of the second current amplifier is connected and has an output connection connected to an output signal terminal to which the output connection of the first current amplifier also connects. At least one of the current amplifiers is a non-linear current amplifier with current gain as between its input and output connections that increases with increasing input current. This increases the capability of the amplifier to source or sink output current without increasing quiescent power consumption.

Abstract: An envelope detecting circuit capacitively connected to a signal source and arranged to counteract the effect of d-c potential shifts at the interconnection of capacitor and detector. A portion of the detected signal is integrated to provide a signal proportional to input signal amplitude or duration and applied to said interconnection to dynamically forestall the effect of d-c offset potentials.

Abstract: A balanced-to-single-ended signal converter includes a pair of transistors of the same conductivity type responsive to balanced signals applied to their respective base electrodes to provide a single-ended signal at the interconnection of their serially connected collector-to-emitter paths.

Abstract: A common-emitter-amplifier transistor with tuned collector circuit has its gain controlled by the variation of an emitter degeneration resistance responsive to an automatic gain control voltage. This emitter degeneration resistance is provided by the collector-to-emitter path of a gain-controlling transistor having relatively large emitter-base junction area and receiving the automatic gain control voltage at its base electrode. The amplifier transistor is provided temperature compensated base biasing so its emitter-follower action maintains its emitter electrode at a voltage, which applied as the emitter-to-collector voltage of the gain controlling transistor conditions the gain controlling transistor to operate in saturation. Under strong signal conditions the increase in emitter degeneration resistance reduces the severity of cross-modulation and inter-modulation effects. The disclosure describes an AM radio receiver using this type of automatic gain control for its r-f and i-f amplifier stages.

Abstract: A current I of predetermined temperature coefficient is supplied to the series connection of at least one semiconductor diode and a positive-temperature-coefficient resistance. This resistance is of such value that a voltage drop with a temperature-coefficient equal to that of I, in terms of percentage change per degree of temperature change, appears across the series connection. A relatively large, zero-temperature-coefficient, adjustable resistance, alone or in series with a zero-temperature-coefficient voltage source, parallels the series connection. Adjustment of the relatively large zero-temperature-coefficient resistance provides a trim for the current flow in the series connection, which trim is substantially unaffected by changing temperature.

Abstract: A current amplifier is disclosed, the current gain of which varies directly with changes in input current. A first transistor, arranged as a slave mirroring transistor provides output signal current responsive to a multi-mode transistor master mirroring circuit. The master mirroring circuit includes two master mirroring transistors connected in parallel for receiving input signal current and generating potential for controlling the slave transistor. The first master mirroring transistor includes a serially connected resistor in its principal conduction path, which transistor being arranged to have higher conductance than the second master mirroring transistor, conditions it to receive substantially all of the input signal current for low values of signal and thereby establishing the circuit gain in accordance with the ratio of conductances of the first master and slave mirroring transistors.

Abstract: A self-balancing bridge network has first and second terminals defining a port for receiving power and has third and fourth terminals defining a port across which voltage is to be nulled. Transistors are located between each terminal of the port for receiving power and each terminal of the port across which voltage is to be nulled. A pair of these transistors are differentially degenerated, so that balancing of the bridge establishes predetermined levels of current in all the transistors. Such bridges are useful in two terminal current regulation, reference current sources, and in reference voltage sources.

Abstract: A limit is placed upon the maximum collector current available from a common-emitter transistor in the driver stage of an amplifier provided with overall feedback from its output stage following the driver stage to its input stage preceding the driver stage. This limit is imposed by saturation of a transistor in the input stage, which is of complementary conductivity type to the common-emitter transistor and which applies its collector current as base current to the common-emitter transistor, limiting the voltage applied to its base circuit. The common-emitter transistor in the driver stage is provided with emitter degeneration resistance, so limiting the voltage applied to its base circuit results in limiting the drive capability of the driver stage. This prevents the overall feedback increasing the output current of the driver stage so much it interferes with restriction of the base-current drive whenever a tendency towards overly large current flow through the output transistor is sensed.

Abstract: A precision binary weighted current source comprising a switching network connected to a plurality of nominally equal current sources. The switching network has 2.sup.n inputs connected to 2.sup.n current sources, and has n+1 output currents with a precise binary relation therebetween. The switching network is organized internally as a plurality of two input commutating circuits arranged in a plurality of n ranks between the input terminals and the output terminals. Output terminals are selectively connected to each current source so that the average value of each output current is proportional to the average of all of the 2.sup.n input current sources.

Abstract: No current sensing resistor is used for sensing overcurrent condition in a power transistor in the disclosed overcurrent protection circuit, avoiding the power loss and reduction of available output potential range for the power transistor associated with the use of such sensing resistor. Instead, a differential comparator means is used to sense when the emitter-to-base potential of the power transistor exceeds that of a reference transistor sufficiently to indicate an overcurrent condition in the power transistor.

Abstract: Within a relaxation oscillator of the type having a capacitor that is recurrently being charged from a current source and discharged through a silicon controlled rectifier upon reaching a voltage threshold thereacross, a switch is disposed to interrupt current flow through the SCR in response to the capacitor being discharged to a predetermined level.

Abstract: Within a relaxation oscillator of the type having a capacitor that is recurrently being charged from a current source and then discharged through a silicon controlled rectifier upon reaching a voltage threshold thereacross, the current flow to the gate of the SCR is amplified relative to that being supplied by the current source when the threshold voltage level is reached across the capacitor.

Abstract: A display system for indicating the tuning positions of a tuner for tuning a receiver to any one of a relatively large number of stations includes a plurality of station indicators arranged in a linear array and two position indicators. When a station indicator is activated, it identifies that one station in a respective group of stations including a center and two adjacent stations having respective frequencies below and above the frequency of the center station is tuned. When one position indicator is activated it identifies that the lower adjacent station in a respective group is tuned. When the other position indicator is activated, it identifies that the upper adjacent station in the respective group is tuned. When neither position indicator is activated, the center station in the respective group is tuned.

Abstract: A quasi-linear amplifier, wherein each of first and second current dividers maintains a constant ratio between drive currents to respective output transistor means and dummy output transistor means, uses regulation of the quiescent drive currents to the dummy output transistors to establish the quiescent drive currents to the output transistors. The quiescent drive currents to the output transistors are maintained at levels conditioning these transistors for Class AB amplification of signal currents.

Abstract: Temperature compensation is provided in a switching circuit for the channel resistance of a MOS/FET transistor through which a voltage source is applied to an output terminal. The gate-source voltage of the transistor is varied directly with temperature changes to hold the channel resistance substantially constant within the switching circuit. In a particular embodiment, at least one output level of a pulse amplifier is controlled through the temperature compensated switching circuit of the invention. The other output level of this pulse amplifier is applied through a bipolar transistor of a second switching circuit in another embodiment. The base current of the bipolar transistor is varied inversely with temperature to hold the saturation voltage drop thereacross substantially constant within the second switching circuit.

Abstract: Temperature compensation is provided in a switching circuit for the saturation voltage drop across a bipolar transistor through which a voltage source is applied to an output terminal. The base current of the bipolar transistor is varied inversely with temperature to hold the saturation voltage drop thereacross substantially constant within the switching circuit. High temperature nonsaturating means for interrupting the base current to the bipolar transistor is combined with this temperature compensation to enhance the turn-on speed of the bipolar transistor in one of the described embodiments. In another embodiment a three state logic circuit (saturated, nonsaturation and nonconductive) is used to interrupt the base current to the bipolar transistor and thereby enhance both the turn on and turn off speed of the bipolar transistor.

Abstract: In a drive circuit having output current passing through at least one bipolar transistor, the rise and fall times of the output current are predetermined by controlling the rate of current change in the master path of a current mirror amplifier which has a separate slave path connected to supply base current for each bipolar transistor. The drain-source channel of an MOS transistor is connected to selectively supply current flow through the master path of the current mirror amplifier in one embodiment of the rate control means and the gate of the MOS transistor is connected in parallel with a capacitor to the output of a CMOS inverter to which control signals are applied.

Abstract: A current mirror receives as input current the leakage current through an auxiliary semiconductor pn junction, which leakage current emulates the leakage current of a similar semiconductor pn junction in a bipolar transistor used in the functional portion of the integrated circuit. The resulting output current of the current mirror is applied to counteract the effect of the leakage current.

Abstract: An integrated-circuit MOS capacitor has a first doped semiconductive region forming one of its plates. This first semiconductor region is electrically isolated from the semiconductor substrate by a second doped semiconductor region, which is of opposite conductivity type to and intervenes between the substrate and the first semiconductive region. The present invention resides in the combination of such an MOS capacitor and a circuit for maintaining the potential in the second semiconductor region of the MOS capacitor structure substantially the same as that appearing on the first semiconductor region for minimizing leakage current flow between them. This circuit also provides the leakage current flowing between the second semiconductor region and the substrate, so the leakage current need not flow from the first semiconductor region.