Abstract: A transparent touchbar or touchplate is supported at its edges by a plurality of push-button switches. A plurality of valid touchpoints exist; and the touching of each can be distinguished, though the number of touchpoints is larger than the number of pushbuttons. This is done by logically combining the responses to the push-button switch closures occasioned by the application of force to any one of the valid touchpoints.

Abstract: A bias charge (commonly known as a "fat zero") is divided into a plurality, n, of equal parts. These equal parts are differentially delayed, and the results appearing parallel in time are summed to generate a bias charge with reduced noise. The reduced-noise bias charge is then applied to an input of a charge transfer device -- e.g., one of the charge coupled device (CCD) analog shift registers used in a CCD imager to transport charge packets descriptive of picture elements in an imager.

Abstract: Disclosed are CCD imagers, each with a composite image register comprising two component image registers with interleaved charge transfer channels is operated with charge transfer in opposite directions from the two image registers. Also disclosed are apparatuses for suppressing transfer smear from the output video signals supplied from such CCD imagers.

Abstract: If drain structures bound the field register(s) of a CCD imager on the sides parallel to the direction of charge transfer therethrough, some portion of the charge carriers generated by photoemission will be lost to the drain structures from the charge transfer channels along those sides. If the charge transfer channels along those sides of the field register(s) do not have register boundary drain structures alongside them, on the other hand, charge carriers from the semiconductor substrate outside the field register(s) will migrate to them. These charge carriers may be thermally generated "dark current", for example. In either case the side charge transfer channels do not have adjacent charge transfer channels that the other charge transfer channels in the field register(s) do, leading to undesired edge effects in the outputs of these side charge transfer channels.

Abstract: In a plural-level gate metallization CCD shift register the clocking voltages applied to the levels are automatically supplied differential offset biases to cause the potential wells to have uniform depth. The differential offset biases are developed responsive to the differences in the threshold voltages of insulated-gate field effect transistors integrated on the same semiconductor substrate as the CCD shift register so as to have their gate electrodes in the different levels of gate metallization.

Abstract: Video signals are subjected to two-dimensional high-pass spatial filtering as a first step in reducing their dynamic range. Then, in a second step of the compression process, differentiation spikes generated in response to edges of large objects in the original video signals are suppressed. This is done in real time using an adaptive non-linear amplifier, the gains of which in a number of amplitude zones are controlled by a histogram of the high-pass-filtered video signals.

Abstract: Pulse-duration-modulated signal is generated from samples of an analog signal voltage in a CCD device by fill-and-spill input of charge into the CCD device, scooping of fixed unit charge to generate a pulse train with pulses in a number proportional to the sample analog voltage, and box-car detection. The box-car detection uses a floating electrode, the resetting of which is selectively inhibited until just past the last pulse in the train that equals or exceeds the potential midway between the potentials defining logic ZERO and logic ONE.

Abstract: Grain, a fixed pattern noise which is not attributable just to dark current variations in the imager and which persists even in relatively bright images, is reduced in a CCD imager with three-phase-clocked imager register by introducing an offset potential between gate electrodes in the two clocking phases conventionally held at same potential during image integration times. In field transfer type CCD imagers, using field interlace and three-phase imager-register and field-store-register clocking, the offset potential can be made large enough, not only to reduce grain, but to improve field interlace from two-thirds field interlace towards or to perfect field interlace.

Abstract: In a switching dc-to-dc converter an output current substantially free of pulsations is provided by summing a flyback current and transformed current response to the current used to build up the electromagnetic field that stores the energy for flyback.

Abstract: At low light levels, the floating diffusion output stage of a CCD imager has the peaks of the reset pulses applied to its reset gate reduced. This introduces spatial integration in the direction of line scan that improves the signal-to-noise ratio of the video samples supplied as imager output.

Abstract: CCD imagers of the field transfer type have field storage registers, with parallel charge transfer channels connected in cascade after respective ones of parallel charge transfer channels in their image registers. Further charge transfer channels are included in the field storage registers for use in generating reference-black-level samples.

Abstract: Matrix-addressing circuitry for a liquid crystal display using a square-wave potential of first and second opposed phasings and its second harmonic as address voltages, avoiding the need for multi-level address voltages.An appendix of this specification contains a program listing to which a claim of copyright is made. The copyright owner, assignee hereof, hereby licenses the duplication of the patent drawing, but reserves all other copyright rights whatsoever.

Abstract: The network connections of the channels of complementary symmetry MOS FET's in a logic gate or array are altered electrically to program different logic responses to logic inputs. To this end, certain of the FET's are gate-injection or substrate-injection MOS FET's.

Abstract: Current regulator circuits using electrical feedback to stabilize the bias currents of semiconductor laser diodes are disclosed. In these electrical feedback circuits laser diode current is sensed with negative-temperature-coefficient resistance to develop voltages which are compared to zero-temperature-coefficient voltages for generating error signals, and these error signals regulate the emission from the laser diode against changes with temperature.

Abstract: The positional resolution of a display of graphic information generated from a digital-encoded description taken from memory is improved without increasing the fine-line resolution of the display, this being done to reduce the memory required to store the digitally encoded description of the display. The departure of the pixels in the display from their normal position in a raster defined by a relatively coarse scanning line structure and limited video bandwidth is digitally encoded; and the bits of the code are stored in respective memory planes, each having an array of storage locations mapping the normal positions of pixels in the display raster.

Abstract: A CCD imager is made to have an internal drift field tending to force further into the bulk any charge carriers outside the potential wells induced adjacent to integrating electrodes, so those charge carriers recombine in the bulk. This reduces background striations, reduces crosstalk, can be used for improving blooming control, and can be exploited to control the wavelengths of light to which the imager is responsive.

Abstract: Saturation is avoided in the core of the transformer used for direct conversion in a single-ended dc-to-dc converter of the type using auxiliary flyback conversion through a plural-winding inductor. This is done by resetting the core with a winding threading the core, through which winding the secondary current of the plural-winding inductor passes.

Abstract: Field-rate flicker is suppressed in a CCD imager having a three-phase operated image register provided interlacing by integrating odd-numbered fields with only the first clock phase high and even-numbered fields with only the second and third clock phases high. The flicker is suppressed by making the gate electrodes in the A register receiving the second and third clock phases of equal lengths, half that of the gate electrodes receiving the first clock phase.

Abstract: An analog-to-digital converter (ADC) uses pipe-lined data flow through parallelled charge transfer channels in a CCD for implementing a successive-approximation conversion algorithm. Successive charge splitting divides a standard level charge packet into binary-weighted charge packets, selectively added to develop the successive approximations against which charge packets dependent on analog input signal are differentially compared. These comparisons are made using floating gate sensors and auto-zeroed sense amplifiers. A battery of progressively shorter shift registers can convert the pipelined ADC output to parallel-bit form.

Abstract: Descriptions of phantom raster scan are generated with high spatial resolution in angular coordinates and in coordinates, such as radial coordinates, orthogonal to the angular coordinates. The more significant bits of these coordinates are used to generate read addresses for a relatively low spatial resolution image memory supplying, in parallel, four data at a time descriptive of spatially adjacent points in image space. The less significant bits of one of these coordinates are used in calculating first and second linear interpolations between pairs of these data, and the less significant bits of the other of these coordinates are used in calculating a third linear interpolation between the results of the earlier linear interpolations to obtain successive samples of a video signal descriptive of the image stored in image memory. This avoids the need for large-capacity ROM in making the interpolations among image memory data to avoid rastering effects in the display.