Patents Represented by Attorney Andrew D. Fortney
  • Patent number: 8350588
    Abstract: Integrated circuits and methods of permanently disabling integrated circuits are disclosed. An integrated circuit having an erasable non-volatile memory adapted to store an activation code and logic to disable the integrated circuit when the code in the erasable non-volatile memory has been altered or erased after it has been separated from a substrate, is placed into an electromagnetic field of sufficient power to erase or reprogram the erasable non-volatile memory. The entire integrated circuit is permanently disabled by erasing, altering, or reprogramming the erasable non-volatile memory. In preferred embodiments, the integrated circuit comprises a non-erasable non-volatile memory storing the activation code, and circuitry adapted to permanently disable the integrated circuit when the code in the erasable non-volatile memory does not match the activation code in the non-erasable non-volatile memory.
    Type: Grant
    Filed: April 4, 2011
    Date of Patent: January 8, 2013
    Assignee: Kovio, Inc.
    Inventor: Roger G. Stewart
  • Patent number: 8308953
    Abstract: The present invention generally relates to a filtration system having one or more apparatuses for filtering gases, liquids, or fluids (e.g., water) to remove particulate matter, and methods of making and using the apparatus. More particularly, embodiments relate to apparatuses and methods for applying centrifugal force(s) to push a fluid or gas to be filtered through a porous membrane or filter within the apparatus to separate particulate matter therefrom. The present invention takes advantage of the Coriolis effect within a cylindrical filter radiating out from a rotating central body. The filtration apparatus provides an energy efficient system for microfiltration (or other filtration process) to remove contaminants from gases and fluids, such as waste water.
    Type: Grant
    Filed: September 20, 2011
    Date of Patent: November 13, 2012
    Inventor: Brent Lee
  • Patent number: 8304780
    Abstract: A method for making an electronic device, such as a MOS transistor, including the steps of forming a plurality of semiconductor islands on an electrically functional substrate, printing a first dielectric layer on or over a first subset of the semiconductor islands and optionally a second dielectric layer on or over a second subset of the semiconductor islands, and annealing. The first dielectric layer contains a first dopant, and the (optional) second dielectric layer contains a second dopant different from the first dopant. The dielectric layer(s), semiconductor islands and substrate are annealed sufficiently to diffuse the first dopant into the first subset of semiconductor islands and, when present, the second dopant into the second subset of semiconductor islands.
    Type: Grant
    Filed: June 9, 2010
    Date of Patent: November 6, 2012
    Assignee: Kovio, Inc.
    Inventors: Arvind Kamath, James Montague Cleeves, Joerg Rockenberger, Patrick Smith, Fabio Zürcher
  • Patent number: 8296943
    Abstract: The present invention relates to surveillance and/or identification devices having capacitors connected in parallel or in series, and methods of making and using such devices. Devices with capacitors connected in parallel, where one capacitor is fabricated with a relatively thick capacitor dielectric and another is fabricated with a relatively thin capacitor dielectric achieve both a high-precision capacitance and a low breakdown voltage for relatively easy surveillance tag deactivation. Devices with capacitors connected in series result in increased lateral dimensions of a small capacitor. This makes the capacitor easier to fabricate using techniques that may have relatively limited resolution capabilities.
    Type: Grant
    Filed: May 15, 2009
    Date of Patent: October 30, 2012
    Assignee: Kovio, Inc.
    Inventors: Patrick Smith, Criswell Choi, James Montague Cleeves, Vivek Subramanian, Arvind Kamath, Steven Molesa
  • Patent number: 8298852
    Abstract: A thin film type solar cell and a method for manufacturing the same is disclosed, which is capable of providing a wide light-transmission area without lowering cell efficiency and increasing processing time, so that the solar cell can be used as a substitute for a glass window in a building. The thin film type solar cell generally comprises a substrate; a plurality of front electrodes at fixed intervals on the substrate; a plurality of semiconductor layers at fixed intervals with a contact portion or separating channel interposed in-between, the plurality of semiconductor layers on the plurality of front electrodes; and a plurality of rear electrodes at fixed intervals by the each separating channel interposed in-between, the each rear electrode being electrically connected with the each front electrode; wherein the each rear electrode is patterned in such a way that a light-transmitting portion is included in a predetermined portion of the rear electrode.
    Type: Grant
    Filed: July 10, 2009
    Date of Patent: October 30, 2012
    Assignee: Jusung Engineering Co., Ltd.
    Inventors: Yong Woo Shin, Won Hyun Kim, Dae Yup Na, Hyun Jun Cho, Dong Woo Kang, Doo Young Kim, Hyun Kyo Shin, Cheol Hoon Yang
  • Patent number: 8293612
    Abstract: A method for manufacturing a lateral double diffused metal oxide semiconductor (LDMOS) device includes forming an oxide layer on a semiconductor substrate, forming first and second trenches by partially etching the oxide layer and the semiconductor substrate, forming a small trench overlapping with the second trench so that the second trench has a stepped structure, and depositing one or more dielectric layers so that the first trench forms a device isolation layer defining a semiconductor device region and the second trench having a stepped structure forms a drain extension device isolation layer. The breakdown voltage of the LDMOS device may be improved while reducing the on-resistance, thereby improving the operational reliability of the device.
    Type: Grant
    Filed: June 29, 2009
    Date of Patent: October 23, 2012
    Assignee: Dongbu HiTek Co., Ltd.
    Inventor: Yong Jun Lee
  • Patent number: 8278127
    Abstract: A method and apparatus of fabricating a thin film transistor is disclosed, which patterns an ohmic contact layer by a laser patterning process so that it is capable of preventing a semiconductor layer from being damaged, and reducing fabrication time, wherein the method comprises forming a gate electrode pattern on a substrate; forming a gate insulating layer on the gate electrode pattern; sequentially forming a semiconductor layer pattern and an ohmic contact layer pattern on the gate insulating layer; forming source and drain electrode patterns on the ohmic contact layer pattern, wherein the source and drain electrode patterns are provided at a fixed interval therebetween; and removing the ohmic contact layer pattern exposed between the source and drain electrode patterns through the use of laser.
    Type: Grant
    Filed: August 3, 2009
    Date of Patent: October 2, 2012
    Assignee: JS Lighting Co., Ltd.
    Inventor: Hyung Sup Lee
  • Patent number: 8269909
    Abstract: Disclosed is a method for fabrication of a liquid crystal display with improved optical transmission, which includes sequentially forming a first oxide film, a silicon film, and a second oxide film on a semiconductor substrate, selectively etching the silicon film and the second oxide film to expose the first oxide film, forming a oxynitride film on at least the silicon film, forming a polysilicon layer over the oxynitride film, selectively etching the polysilicon layer to form a top electrode, forming an insulating film on and/or over the substrate, including the top electrode, and forming metal wirings on outer regions of the top electrode.
    Type: Grant
    Filed: December 21, 2009
    Date of Patent: September 18, 2012
    Assignee: Dongbu HiTek Co., Ltd.
    Inventor: Nam Chil Moon
  • Patent number: 8269477
    Abstract: A reference voltage generation circuit is disclosed. The reference voltage generation circuit includes an operational amplifier configured to output a constant voltage in accordance with reference voltages input to first and second terminals of the operational amplifier, and a start-up circuit configured to initiate operation of the operational amplifier when the start-up circuit switches from an idle mode to an active mode, including a first transistor having a gate connected to an output of the operational amplifier, a source connected to a supply voltage, and a drain connected to a resistor, configured to supply a reference current to the resistor in accordance with the operational amplifier output, thereby generating the reference voltage.
    Type: Grant
    Filed: December 11, 2009
    Date of Patent: September 18, 2012
    Assignee: Dongbu HiTek Co., Ltd.
    Inventor: Eun Sang Jo
  • Patent number: 8263461
    Abstract: Disclosed are lateral double diffused metal oxide semiconductor (LDMOS) transistors having a uniform threshold voltage and methods for manufacturing the same. The methods include forming a polysilicon layer over the semiconductor substrate including a shallow trench isolation region, etching a portion of the polysilicon layer over an active region, implanting first conductive-type impurity ions using the polysilicon layer as a mask to form a first conductive-type body region, implanting second conductive-type impurity ions using the polysilicon layer as a mask to form a second conductive-type channel region in the first conductive-type body region, removing the polysilicon layer, forming gate electrodes in the polysilicon-free region, and forming a source region and a drain region in the first conductive-type body region using the gate electrode and the shallow trench isolation as ion-implantation masks.
    Type: Grant
    Filed: December 21, 2009
    Date of Patent: September 11, 2012
    Assignee: Dongbu HiTek Co., Ltd.
    Inventor: Mi Young Kim
  • Patent number: 8264359
    Abstract: The present invention relates to methods of making capacitors for use in surveillance/identification tags or devices, and methods of using such surveillance/identification devices. The capacitors manufactured according to the methods of the present invention and used in the surveillance/identification devices described herein comprise printed conductive and dielectric layers. The methods and devices of the present invention improve the manufacturing tolerances associated with conventional metal-plastic-metal capacitor, as well as the deactivation reliability of the capacitor used in a surveillance/identification tag or device.
    Type: Grant
    Filed: October 10, 2008
    Date of Patent: September 11, 2012
    Assignee: Kovio, Inc.
    Inventors: Vivek Subramanian, Patrick Smith, Vikram Pavate, Arvind Kamath, Criswell Choi, Aditi Chandra, James Montague Cleeves
  • Patent number: 8264027
    Abstract: A nonvolatile memory cell is disclosed, having first and second semiconductor islands at the same horizontal level and spaced a predetermined distance apart, the first semiconductor island providing a control gate and the second semiconductor island providing source and drain terminals; a gate dielectric layer on at least part of the first semiconductor island; a tunneling dielectric layer on at least part of the second semiconductor island; a floating gate on at least part of the gate dielectric layer and the tunneling dielectric layer; and a metal layer in electrical contact with the control gate and the source and drain terminals. In one advantageous embodiment, the nonvolatile memory cell may be manufactured using an “all-printed” process technology.
    Type: Grant
    Filed: March 12, 2010
    Date of Patent: September 11, 2012
    Assignee: Kovio, Inc.
    Inventors: Arvind Kamath, Patrick Smith, James Montague Cleeves
  • Patent number: 8258180
    Abstract: Organic zinc salts and mixtures thereof, organic zinc salt coated particles, methods of preparing organic zinc salts and organic zinc salt coated particles, and various applications of such coated particles, including applications in rubber, other polymeric materials, and pesticides and/or fungicides are disclosed.
    Type: Grant
    Filed: December 30, 2008
    Date of Patent: September 4, 2012
    Inventor: Raymond L. Nip
  • Patent number: 8242227
    Abstract: Doped polysilanes, inks containing the same, and methods for their preparation and use are disclosed. The doped polysilane generally has the formula H-[AaHb(DRx)m]q-[(AcHdR1e)n]p—H, where each instance of A is independently Si or Ge, and D is B, P, As or Sb. In preferred embodiments, R is H, -AfHf+1R2f, alkyl, aryl or substituted aryl, and R1 is independently H, halogen, aryl or substituted aryl. In one aspect, the method of making a doped poly(aryl)silane generally includes the steps of combining a doped silane of the formula AaHb+2(DRx)m (optionally further including a silane of the formula AcHd+2R1e) with a catalyst of the formula R4wR5yMXz (or an immobilized derivative thereof) to form a doped poly(aryl)silane, then removing the metal M. In another aspect, the method of making a doped polysilane includes the steps of halogenating a doped polyarylsilane, and reducing the doped halopolysilane with a metal hydride to form the doped polysilane.
    Type: Grant
    Filed: April 25, 2011
    Date of Patent: August 14, 2012
    Assignee: Kovio, Inc.
    Inventors: Wenzhuo Guo, Vladimir K. Dioumaev, Joerg Rockenberger
  • Patent number: 8238436
    Abstract: Methods and systems for receiving, processing and/or decoding digital video transmissions are disclosed. In one embodiment, a method of a method of processing a digital video signal includes the steps of applying an initial set of video transmission parameter values to one or more digital video signal processes, decoding video transmission parameter information from the digital video signal, and updating the initial set of video transmission parameter values with the decoded video transmission parameter information. Embodiments of the present invention can advantageously demodulate and decode a digital video signal before transmission parameters embedded in the signal are completely decoded. Thus, the time to acquire and/or scan a digital video channel is improved.
    Type: Grant
    Filed: March 30, 2007
    Date of Patent: August 7, 2012
    Assignee: MediaTek Inc.
    Inventor: Shun-An Yang
  • Patent number: 8236916
    Abstract: Polysilanes, inks containing the same, and methods for their preparation are disclosed. The polysilane generally has the formula H-[(AHR)n(c-AmHpm-2)q]—H, where each instance of A is independently Si or Ge; R is H, -AaHa+1Ra, halogen, aryl or substituted aryl; (n+a)?10 if q=0, q?3 if n=0, and (n+q)?6 if both n and q?0; p is 1 or 2; and m is from 3 to 12. In one aspect, the method generally includes the steps of combining a silane compound of the formula AHaR14-a, the formula AkHgR1?h and/or the formula c-AmHpmR1rm with a catalyst of the formula R4xR5yMXz (or an immobilized derivative thereof) to form a poly(aryl)silane; then washing the poly(aryl)silane with an aqueous washing composition and contacting the poly(aryl)silane with an adsorbent to remove the metal M. In another aspect, the method includes the steps of halogenating a polyarylsilane to form a halopolysilane; and reducing the halopolysilane with a metal hydride to form the polysilane.
    Type: Grant
    Filed: December 23, 2008
    Date of Patent: August 7, 2012
    Assignee: Kovio, Inc.
    Inventors: Wenzhuo Guo, Vladimir K. Dioumaev, Joerg Rockenberger, Brent Ridley
  • Patent number: 8227320
    Abstract: The present invention relates to methods of making capacitors for use in surveillance/identification tags or devices, and methods of using such surveillance/identification devices. The capacitors manufactured according to the methods of the present invention and used in the surveillance/identification devices described herein comprise printed conductive and dielectric layers. The methods and devices of the present invention improve the manufacturing tolerances associated with conventional metal-plastic-metal capacitor, as well as the deactivation reliability of the capacitor used in a surveillance/identification tag or device.
    Type: Grant
    Filed: October 10, 2008
    Date of Patent: July 24, 2012
    Assignee: Kovio, Inc.
    Inventors: Vivek Subramanian, Patrick Smith, Vikram Pavate, Arvind Kamath, Criswell Choi, Aditi Chandra, James Montague Cleeves
  • Patent number: 8227871
    Abstract: A semiconductor device and a method for manufacturing the same are disclosed. The semiconductor device includes a substrate having a first conductor-type, a buried layer of a second conductor-type on the substrate, a drain, and a first guard-ring on one side of the drain, a second guard-ring on one side of the first guard-ring, and a third guard-ring on one side of the second guard-ring.
    Type: Grant
    Filed: December 4, 2009
    Date of Patent: July 24, 2012
    Assignee: Dongbu HiTek Co., Ltd.
    Inventor: Choul Joo Ko
  • Patent number: 8211396
    Abstract: Heterocyclosilane compounds and methods for making the same. Such compounds (and/or ink compositions containing the same) are useful for printing or spin coating a doped silane film onto a substrate that can easily be converted into a doped amorphous silicon film (that may also be hydrogenated to some extent) or doped polycrystalline semiconductor film suitable for electronic devices. Thus, the present invention advantageously provides commercial qualities and quantities of doped semiconductor films from a “doped liquid silicon” composition.
    Type: Grant
    Filed: September 24, 2004
    Date of Patent: July 3, 2012
    Assignee: Kovio, Inc.
    Inventors: Wenzhuo Guo, Fabio Zürcher, Joerg Rockenberger, Klaus Kunze, Vladimir K. Dioumaev, Brent Ridley, James Montague Cleeves
  • Patent number: 8207877
    Abstract: An apparatus for transferring serial data (e.g., a serial interface using a single wire) generally includes a detector configured to detect a first level time period and a second level time period of an input signal, and a computing unit configured to compute a duty or duty cycle of the input signal and generate an output signal based on the duty or duty cycle.
    Type: Grant
    Filed: April 22, 2010
    Date of Patent: June 26, 2012
    Assignee: Dongbu HiTek Co., Ltd.
    Inventors: Chang Woo Ha, Sung Hoon Bea, Sang Heum Yeon