Abstract: A non-uniform memory access (NUMA) computer system includes an interconnect to which multiple processing nodes (including first, second, and third processing nodes) are coupled. Each of the first, second, and third processing nodes includes at least one processor and a local system memory. The NUMA computer system further includes a transaction buffer, coupled to the interconnect, that stores communication transactions transmitted on the interconnect that are both initiated by and targeted at a processing node other than the third processing node. In response to a determination that a particular communication transaction originally targeting another processing node should be processed by the third processing node, buffer control logic coupled to the transaction buffer causes the particular communication transaction to be retrieved from the transaction buffer and processed by the third processing node.

Abstract: A method, memory, and apparatus, having at least a processor, memory, and touchscreen, for creating a virtual pointing device. The method includes the steps of displaying a non-activated virtual pointing device on the touchscreen, in response to detecting at least one finger placed on the virtual pointing device, activating the virtual pointing device, and moving the virtual pointing device in accordance with movement of the at least one finger.

Abstract: Various services within a computer system are automatically set up as users are added to the system through a directory service. A user template is selected that already contains default settings for each of the services available on a system such as e-mail and a web service. Various user templates exist and contain different default settings for each available service depending upon the user. Default settings from each service are copied onto a new user form. Next, default settings from the selected user template are copied to the new user form and override any conflicting default settings from the services. The default settings from the new user form are used to automatically set up and enable each service for the new user. The data from the new user form is copied into a central account database that contains rows of user information, with columns corresponding to a particular service. Each user is automatically enabled for use with available services including an e-mail account and a generated web page.

Abstract: A computer system includes a node interconnect to which at least a first processing node and a second processing node are coupled. The first and the second processing nodes each include a local interconnect, a processor coupled to the local interconnect, a system memory coupled to the local interconnect, and a node controller interposed between the local interconnect and the node interconnect. In order to reduce communication latency, the node controller of the first processing node speculatively transmits request transactions received from the local interconnect of the first processing node to the second processing node via the node interconnect, where each such request transaction specifies an associated datum. The node controller of the second processing node handles each speculatively transmitted request transaction received in response to a directory state of its associated datum.

Abstract: An apparatus and method, for use with a data processing system having an architecture, which provide for the possibility of smart card use without unduly impacting the data processing system's architecture. An enclosure, having at least one PC card acceptor and at least one smart card acceptor, is created. A suspension mechanism is operably connected to enclosure in a fashion such that suspension mechanism is capable of physically connecting enclosure to a motherboard such that enclosure is suspended above a component of motherboard. The method and system give rise to several advantages. One advantage is that board space is saved in that the enclosure is suspended over existing board components. A second advantage is that the method and system allow original equipment manufactures to make the provision of smart card usage optional, in that smart card usage can be provided by a simple add-on to lower-end systems.

Abstract: A highly efficient current controlled thermoelectric cooling system is disclosed. The highly efficient current controlled thermoelectric cooling system includes a first thermal sink, a second thermal sink, a thermoelectric element, and a variable current source. The first thermal sink has a temperature higher than an ambient temperature while the second thermal sink has a temperature lower than the ambient temperature. The first thermal sink is continuously coupled to the thermoelectric element while the second thermal sink is selectively coupled to the thermoelectric element via a mass. A variable current source provides a controlled current pulse to the thermoelectric element such that heat transfer can be effectively achieved between the thermoelectric element and both thermal sinks.

Abstract: A system and method for controlling client access to enterprise resources through a middle tier server. Enterprise resource authorizations are maintained in a middle tier server. Users authenticate with the server causing it to map and transform the client access authorization into enterprise resource credentials. Enterprise resources are accessed after authorizing using the transformed credentials.

Abstract: A novel SRAM construction allows for reduced power consumption by conditionally restoring only these memory cells which are evaluated (subjected to a read or write operation). The device includes a memory array containing an arbitrary number of memory cells, a plurality of word lines, and a plurality of predecoded address lines which allow selection of one of said word lines, wherein the memory cells are arranged in groups, each group having a bit line connected thereto. A precharge circuit is connected to the bit lines, and restores a given one of the memory cells after the evaluation operation. The predecoded address lines carry encoded information regarding an address associated with the evaluated memory cell, and a decoder identifies the address to determine which of the word lines should be used to access the evaluated cell. In one embodiment, the precharge circuit is responsive to control logic associated with the address (and carried on the predecoded address lines).

Abstract: A method for a short-term prediction of future ship motion in open water to furnish visual cueing information that can be remotely presented to a pilot during an aircraft landing is described. Two sets of samples of the sea surface geometry along a radial azimuth line from a ship as a function of elevation of a sensor are first acquired. These are compensated to remove the components due to the ship's motion. Two wave traces are then separately derived in Cartesian format from the two sets of acquired samples. These wave traces are subjected to a Fast Fourier Transform to detect the amplitudes and phases of the individual wavelength components. The direction of the wavelength components is determined using a measure of their phase change in the scan direction during the time interval between the two scans together with their measured wavelength.

Abstract: A pragma is defined to indicate straight path optimization for compilers (SPOC). The pragma is inserted into source code to identify the most common case for a branch point in a program flow, determined by analysis of performance data or simple prediction. The compiler employs this information to optimize the common case as a straight path through the function assembler code, removing unnecessary jumps and the nonoptimized case from the function body. The resulting executable code is more compact and executes faster.

Abstract: A register associated with the architected logic queue of a memory-coherent device within a multiprocessor system contains a flag set whenever an architected operation enters the initiating device's architected logic queue to be issued on the system bus. The flag remains set even after the architected logic queue is drained, and is reset only when a synchronization instruction is received from a local processor, providing historical information regarding architected operations which may be pending in other devices. This historical information is utilized to determine whether a synchronization operation should be presented on the system bus, allowing unnecessary synchronization operations to be filtered. When a local processor issues a synchronization instruction to the device managing the architected logic queue, the instruction is generally accepted when the architected logic queue is empty.

Abstract: A (DVD) drive unit for a variety of optical media including DVD discs or CD-ROM discs is capable of eliminating vibration while rotating and reading the optical media at either a constant linear velocity (CLV) or a constant angular velocity (CAV). In CAV mode, the drive unit uses ball bearings which are movable within a cavity in the turntable to counterbalance an unbalanced disc. In CLV mode, the drive unit utilizes a series of electromagnets to capture and symmetrically array the ball bearings within the cavity around the turntable.

Abstract: A method and apparatus in a wireless communications system for presenting a calling party name to a mobile station within the wireless communications system. A communications signal is received from a network to initiate a call to a mobile station within the wireless communications system. Next, a determination is made as to whether the mobile station is provisioned to receive calling party names in response to receiving the communications signal. A calling party name is either identified using a database located within the wireless communications system or the calling party name is received as part of the initial call setup signal. Then, the calling party name is sent to the mobile station over the air interface in response to identifying the calling party name.

Abstract: The present invention relates, in general, to a method and apparatus for creating improved inductors which can be adapted for use with electronic oscillators. The method includes at least the following: forming a first coil; forming a second coil, such that the second coil is proximate to the first coil and such that a magnetic flux from the formed outer coil will link with a magnetic flux of the formed second coil; and connecting the first coil to the second coil in electrical parallel. The apparatus includes at least the following: a substrate; and a composite inductor having at least a first coil with an associated inductance and resistance and a second coil with an associated inductance and resistance, with the first coil and the second coil connected in electrical parallel but formed in the substrate such that said composite inductor has resistance substantially less than the combined resistances associated with the first coil and the second coil.

Abstract: A method, system and program for including selections in the menu bar that are icons. The support for menus containing icons includes an algorithm in the memory of a processor that presents a menu bar with imbedded icons. The icons can be selected and directly manipulated to perform operations associated with the particular icon upon another icon or other object on a display.

Abstract: Cache and architectural specific functions are layered within a controller, simplifying design requirements. Faster performance may be achieved and individual segments of the overall design may be individually tested and formally verified. Transition between memory consistency models is also facilitated. Different segments of the overall design may be implemented in distinct integrated circuits, allowing less expensive processes to be employed where suitable.

Abstract: A snap latch device has a handle with a pair of cam members extending from a lower end. The device also has a flexible snap which protrudes from the handle. The front end of the snap has a barbed lip. The device is designed to interlock a shuttle assembly to a stationary chassis. The device is pivotally mounted to the shuttle which carries a board with connectors. The device is movable between an engaged position and a retracted position. In the engaged position, the cam members engage an end wall on the chassis and the snap inserts through and engages a hole in the shuttle. The mechanical interlock between the cam members and the end wall rigidly secures the shuttle in the chassis. The device is moved to the retracted position by pulling back on the snap to dislodge the barbed lip. This release allows the device to rotate so that the cam members disengage the end wall. After the snap and cam members are clear of the hole and end wall, respectively, the shuttle may be completely removed from the chassis.

Abstract: Cache and architectural functions within a cache controller are layered so that architectural operations may be symmetrically treated regardless of whether initiated by a local processor or by a horizontal processor. The same cache controller logic which handles architectural operations initiated by a horizontal device also handles architectural operations initiated by a local processor. Architectural operations initiated by a local processor are passed to the system bus and self-snooped by the controller. If necessary, the architectural controller changes the operation protocol to conform to the system bus architecture.

Abstract: An apparatus for generating an end-around carry to an end-around carry adder in a floating-point pipeline within a computer system is disclosed. The apparatus for generating an end-around carry includes a shift-comparison logic circuit, a sign-comparison circuit, and a logic gate. The shift-comparison logic circuit produces a shift-count signal and the sign-comparison logic circuit produces an effective operation signal. Coupled to the shift-comparison logic circuit and the sign-comparison logic circuit, the logic gate combines the shift-count signal and the effective operation signal with a carry-out signal generated by an end-around carry adder to provide an end-around carry signal for the end-around carry adder.

Abstract: A method and system for autoconfiguring redundant arrays of memory storage devices contained within receptacles having one or more slots containing hardware sufficient to accept and electrically communicate with such memory storage devices. The capacities of the memory storage device receptacles for accepting memory storage devices are determined, and used to define an initial positioning of devices in at least one memory storage device receptacle. One or more asymmetrical groupings of memory storage devices is defined to permit an equation of electrically detected relative positions of the memory storage devices with actual physical positions within the receptacle. Thereafter, additional devices are added into the receptacles such that the ability to equate electrically detected relative positions of the devices with physical positions is preserved.