Abstract: A hybrid thermal imaging system (20, 120) often includes a focal plane array (30, 130), a thermal isolation structure (50, 150) and an integrated circuit substrate (60, 160). The focal plane array (30, 130) includes thermal sensitive elements (42, 142) formed from a pyroelectric film layer (82), such as barium strontium titanate (BST). One side of the thermal sensitive elements (42, 142) may be coupled to a contact pad (62, 162) disposed on the integrated circuit substrate (60, 160) through a mesa strip conductor (56, 150) of the thermal isolation structure (50, 150). The other side of the thermal sensitive elements (42, 142) may be coupled to an electrode (36, 136). The various components of the focal plane array (30, 130) may be fabricated from multiple heterogenous layers (74, 34, 36, 82, 84) formed on a carrier substrate (70).

Abstract: A novel reticulated array comprises islands of ceramic (e.g. BST 40) which are fabricated from novel materials using unique methods of patterning. A front side optical coating (e.g. transparent metal layer 44, transparent organic layer 46 and conductive metallic layer 48) is elevated above the substrate between the ceramic islands. This allows additional material (e.g. polyimide 38) between the optical coating and the substrate above the regions where cavities are to be etched. Etching of the cavities (72) is performed from the back side of the substrate without damaging the front side optical coating. Novel fabrication methods also provide for the convenient electrical and mechanical bonding of each of the massive number of ceramic islands to a signal processor substrate (e.g. Si 80) containing a massive array of sensing circuits.

Abstract: A preferred embodiment of this invention comprises a perovskite-seed layer (e.g. calcium ruthenate 40) between a conductive oxide layer (e.g. ruthenium oxide 36) and a perovskite dielectric material (e.g. barium strontium titanate 42), wherein the perovskite-seed layer and the conductive oxide layer each comprise the same metal. The metal should be conductive in its metallic state and should remain conductive when partially or fully oxidized. Generally, the perovskite-seed layer has a perovskite or perovskite-like crystal structure and lattice parameters which are similar to the perovskite dielectric layer formed thereon. At a given deposition temperature, the crystal quality and other properties of the perovskite dielectric will generally be enhanced by depositing it on a surface having a similar crystal structure. Undesirable crystal structure formation will generally be minimized and lower processing temperatures may be used to deposit the perovskite dielectric layer.

Abstract: An array of thermal sensor elements (16) is formed from a pyroelectric substrate (46) having an infrared absorber and common electrode assembly (18) attached thereto. A first layer of metal contacts (60) is formed to define masked (61) and unmasked (68) regions of the substrate (46). A second layer of metal contacts (62) is formed on the first layer of contacts (60). A radiation etch mask layer (66) is formed to encapsulate the exposed portions of the second layer of contacts (62). A dry-etch mask layer (74) is formed to encapsulate the exposed portions of the first layer of contacts (60) and radiation etch mask layer (66). An initial portion of each unmasked region (68) is etched using a dry-etch process. The remaining portions of the unmasked regions (68) are exposed to an etchant (70) and irradiated with electromagnetic energy to substantially increase the reactivity between the remaining portions and the etchant (70).

Abstract: A preferred embodiment of this invention comprises an oxidizable layer (e.g. TiN 50), an noble-metal-insulator-alloy barrier layer (e.g. Pd-Si-N 34) overlying the oxidizable layer, an oxygen stable layer (e.g. platinum 36) overlying the noble-metal-insulator-alloy layer, and a high-dielectric-constant material layer (e.g. barium strontium titanate 38) overlying the oxygen stable layer. The noble-metal-insulator-alloy barrier layer substantially inhibits diffusion of oxygen to the oxidizable layer, thus minimizing deleterious oxidation of the oxidizable layer.

Abstract: A preferred embodiment of this invention comprises a thin unreactive film (e.g. ruthenium dioxide 36) contacting a high-dielectric-constant material (e.g. barium strontium titanate 38) to an electrode. The thin unreactive film provides a stable conductive interface between the high-dielectric-constant material layer and the electrode base (e.g palladium 34). As opposed to a standard thin-film layer, the thin unreactive film is generally less than 50 nm thick, preferably less than 35 nm thick, more preferably between 5 nm and 25 nm thick, and most preferably between 10 nm and 20 nm thick. A thin unreactive film can benefit from the advantages of the materials used while avoiding or minimizing many of their disadvantages. A thin unreactive film would generally be substantially less expensive than a standard thin-film layer since much less material can be used while not significantly affecting the surface area of the electrode in contact with the HDC material.

Abstract: In accordance with the present invention, there is provided a method by which narrow lateral dimensioned microelectronic structures can be formed using low temperature processes. An uncured resist layer (e.g. PMMA 42) is deposited on a supporting layer (e.g. silicon 40) and patterned. Then, by using an isotropic process such as a low temperature chemical vapor deposition, a conformal layer (e.g. silicon oxynitride 44) is deposited substantially evenly on the vertical walls and on the horizontal surfaces of the uncured resist layer. An anisotropic etch such as reactive ion etching is then used to substantially remove the conformal layer from the horizontal surfaces without substantially etching the conformal layer from the vertical walls of the resist. The resist can then be selectively removed, producing isolated vertical sidewall structures (e.g. silicon oxynitride 46) which could be used, for example, as a negative tone mask. Alternatively, instead of removing the resist, another resist layer (e.g.

Abstract: Processing techniques for processing high-dielectric-constant material are provided to allow for the formation of an electronic device (10) which comprises a inner electrode (24), a high-dielectric-constant layer (28), and an outer electrode (30). High-dielectric-constant layer (28) is subjected to ultraviolet radiation in an oxygen ozone ambient to eliminate various undesirable hydroxide and carbonate compounds. Layer (28) is further subjected to high pressure isotropic reactive ion etches prior to the deposition of layer (30). The interface between layer (28) and layer (30) is exposed to reactive fluorine and low pressure plasma to improve the fair electric properties and leakage currents associated with layer (28).

Abstract: An etching process is provided using electromagnetic radiation and a selected etchant (52) to selectively remove various types of materials (53) from a substrate (48). Contacts (49, 56, 64) may be formed to shield the masked regions (51) of the substrate (48) having an attached coating (20) during irradiation of the unmasked regions (53) of the substrate (48). The unmasked regions (53) are then exposed to an etchant (52) and irradiated to substantially increase their reactivity with the etchant (52) such that the etchant (52) etches the unmasked regions (53) substantially faster than the masked regions (51) and the contacts (49, 56, 64).

Abstract: One or more thin film layers of material may be formed on an integrated circuit substrate and anisotropically etched to produce a monolithic thermal detector. A first layer of material may be placed on the integrated circuit substrate and anisotropically etched to form a plurality of supporting structures for the thermal sensors of the associated focal plane array. The thermal sensors of the focal plane array may be provided by anisotropically etching one or more thin film layers of material formed on the supporting structures. In an exemplary thermal detector, one of the thin film layers preferably includes pyroelectric material such as barium strontium titanate. A layer of thermal insulating material may be disposed between the integrated circuit substrate and the pyroelectric film layer to allow annealing of the pyroelectric film layer without causing damage to the associated integrated circuit substrate.

Abstract: A preferred embodiment of this invention comprises a perovskite-seed layer (e.g. calcium ruthenate 40) between a conductive oxide layer (e.g. ruthenium oxide 36) and a perovskite dielectric material (e.g. barium strontium titanate 42), wherein the perovskite-seed layer and the conductive oxide layer each comprise the same metal. The metal should be conductive in its metallic state and should remain conductive when partially or fully oxidized. Generally, the perovskite-seed layer has a perovskite or perovskite-like crystal structure and lattice parameters which are similar to the perovskite dielectric layer formed thereon. At a given deposition temperature, the crystal quality and other properties of the perovskite dielectric will generally be enhanced by depositing it on a surface having a similar crystal structure. Undesirable crystal structure formation will generally be minimized and lower processing temperatures may be used to deposit the perovskite dielectric layer.

Abstract: A novel multiple level mask (e.g. tri-level mask 36) process for masking achieves a desired thick mask with substantially vertical walls and thus improves the ion milling process of ceramic materials (e.g. BST). An embodiment of the present invention is a microelectronic structure comprising a ceramic substrate, an ion mill mask layer (e.g. photoresist 42) overlaying the substrate, a dry-etch-selective mask layer (e.g. TiW 40) overlaying the ion mill mask layer, the dry-etch-selective mask layer comprising a different material than the ion mill mask layer, a top photosensitive layer (38) overlaying the dry-etch-selective mask layer, the top photosensitive layer comprising a different material than the dry-etch-selective mask layer, and a predetermined pattern formed in the top photosensitive layer, the dry-etch-selective mask layer and the ion mill mask layer. The predetermined pattern has substantially vertical walls in the ion mill mask layer.

Abstract: An electrostatic decontamination method and decontamination device (10) is disclosed for decontaminating the surface of a semiconductor substrate. The decontamination device (10) includes particle ionizing device (24) that charges contaminating particles (26) on the surface of semiconductor substrate (16) thereby creating ionized particles. Decontamination device (10) also includes substrate biasing device (12) for creating a charge accumulation layer (14) at the top of semiconductor substrate (16) so that the charge accumulation layer (14) has the same charge sign as the ionized particles. In addition, the invention analytically characterizes particles using contaminating particle isolator (44) which contains a particle ionizing device (24) that charges contaminating particles (26) on the surface of semiconductor substrate (16) thereby creating ionized particles.

Abstract: A preferred embodiment of this invention comprises an oxidizable layer (e.g. TiN 50), an amorphous nitride barrier layer (e.g. Ti-Si-N 34) overlying the oxidizable layer, an oxygen stable layer (e.g. platinum 36) overlying the amorphous nitride layer, and a high-dielectric-constant material layer (e.g. barium strontium titanate 38) overlying the oxygen stable layer. The amorphous nitride barrier layer substantially inhibits diffusion of oxygen to the oxidizable layer, thus minimizing deleterious oxidation of the oxidizable layer.

Abstract: A preferred embodiment of this invention comprises a thin unreactive film (e.g. platinum 36) contacting a high-dielectric-constant material (e.g. barium strontium titanate 38) to an electrode. The thin unreactive film provides a stable conductive interface between the high-dielectric-constant material layer and the electrode base (e.g palladium 34). As opposed to a standard thin-film layer, the thin unreactive film is generally less than 50 nm thick, preferably less than 35 nm thick, more preferably between 5 nm and 25 nm thick, and most preferably between 10 nm and 20 nm thick. A thin unreactive fire can benefit from the advantages of the materials used while avoiding or minimizing many of their disadvantages. A thin unreactive film would generally be substantially less expensive than a standard thin-film layer since much less material can be used while not significantly affecting the surface area of the electrode in contact with the HDC material.

Abstract: A hybrid thermal detector (10, 110) includes a focal plane array (20, 120), a thermal isolation structure (40, 140), and an integrated circuit substrate (60, 160). The focal plane array (20, 120) includes thermal sensors (30, 130). The thermal isolation structure (40, 140) includes untrimmed mesa-type formations (44, 146, 148) and mesa strip conductors (42, 142, 144) that provide thermal isolation, signal transport, and structural support of the focal plane array (20, 120) when mounted on the integrated circuit substrate (60, 160). Hybrid thermal detector (10) includes a common electrode (28) which provides a bias voltage to all thermal sensors (30). Hybrid thermal detector (110) has electrically isolated thermal sensors (130), each thermal sensor (130) is supported by mesa strip conductors (142, 144), which provide a bias voltage to and receive a signal voltage from the thermal sensor (130).

Abstract: A preferred embodiment of this invention comprises a thin unreactive film (e.g. platinum 36) contacting a high-dielectric-constant material (e.g. barium strontium titanate 38) to an electrode. The thin unreactive film provides a stable conductive interface between the high-dielectric-constant material layer and the electrode base (e.g. palladium 34). As opposed to a standard thin-film layer, the thin unreactive film is generally less than 50 nm thick, preferably less than 35 nm thick, more preferably between 5 nm and 25 nm thick, and most preferably between 10 nm and 20 nm thick. A thin unreactive film can benefit from the advantages of the materials used while avoiding or minimizing many of their disadvantages. A thin unreactive film would generally be substantially less expensive than a standard thin-film layer since much less material can be used while not significantly affecting the surface area of the electrode in contact with the HDC material.

Abstract: A hybrid thermal detector (10, 110) includes a focal plane array (20, 120), a thermal isolation structure (40, 140), and an integrated circuit substrate (60, 160). The focal plane array (20, 120) includes thermal sensors (30, 130). The thermal isolation structure (40, 140) includes untrimmed mesa-type formations (44, 146, 148) and mesa strip conductors (42, 142, 144) that provide thermal isolation, signal transport, and structural support of the focal plane array (20, 120) when mounted on the integrated circuit substrate (60, 160). Hybrid thermal detector (10) includes a common electrode (28) which provides a bias voltage to all thermal sensors (30). Hybrid thermal detector (110) has electrically isolated thermal sensors (130), each thermal sensor (130) is supported by mesa strip conductors (142, 144), which provide a bias voltage to and receive a signal voltage from the thermal sensor (130).

Abstract: A preferred embodiment of this invention comprises a thin unreactive film (e.g. platinum 36) contacting a high-dielectric-constant material (e.g. barium strontium titanate 38) to an electrode. The thin unreactive film provides a stable conductive interface between the high-dielectric-constant material layer and the electrode base (e.g palladium 34). As opposed to a standard thin-film layer, the thin unreactive film is generally less than 50 nm thick, preferably less than 35 nm thick, more preferably between 5 nm and 25 nm thick, and most preferably between 10 nm and 20 nm thick. A thin unreactive film can benefit from the advantages of the materials used while avoiding or minimizing many of their disadvantages. A thin unreactive film would generally be substantially less expensive than a standard thin-film layer since much less material can be used while not significantly affecting the surface area of the electrode in contact with the HDC material.

Abstract: Generally, according to the present invention, the sidewall of the adhesion layer (e.g. TiN 36) in a lower electrode is pre-oxidized after deposition of an unreactive noble metal layer (e.g. Pt 38) but before deposition of an HDC material (e.g. BST 42). An important aspect of the present invention is that the pre-oxidation of the sidewall generally causes a substantial amount of the potential sidewall expansion (and consequent noble metal layer deformation) to occur before deposition of the HDC material. One embodiment of the present invention is a microelectronic structure comprising a supporting layer having a principal surface, and an adhesion layer overlying the principal surface of the supporting layer, wherein the adhesion layer comprises a top surface and an expanded, oxidized sidewall (e.g. TiO.sub.2 40).