Patents Represented by Attorney Cantor Colburn
  • Patent number: 8232791
    Abstract: A driver includes a boost converter, a pulse width modulator controlling the boost converter, and a timer controlling the pulse width modulator. The timer, such as a digital counter, causes the pulse width modulator to produce narrow pulses unless or until the end of a period is reached, at which point the pulse width modulator is not controlled by the timer.
    Type: Grant
    Filed: October 5, 2009
    Date of Patent: July 31, 2012
    Assignee: World Properties, Inc.
    Inventors: Harold Gee Yee, Douglas James Andersn
  • Patent number: 8234071
    Abstract: An apparatus for estimating a property of a formation penetrated by a borehole, the apparatus having: a first electrode and a second electrode configured to couple to a characteristic impedance of a material disposed in the borehole; a third electrode configured with the first electrode to electrically couple to a characteristic impedance of the formation; a circuit element coupled to the first electrode and to the second electrode and having a characteristic impedance; a first sensing circuit coupled to the circuit element and configured to provide a first signal related to the impedance of the borehole material; and a second sensing circuit coupled to the first electrode and the third electrode and configured to provide a second signal related to the characteristic impedance of the formation; wherein the first signal and the second signal are used to estimate the property. A method is also provided.
    Type: Grant
    Filed: September 10, 2009
    Date of Patent: July 31, 2012
    Assignee: Baker Hughes Incorporated
    Inventors: Hans-Martin Maurer, Dinesh P. Shah, Rashid W. Khokhar
  • Patent number: 8231338
    Abstract: A turbine is provided and includes a turbine shell including shrouds at multiple stages thereof, and constraining elements, disposed at least at first through fourth substantially regularly spaced perimetrical locations around the turbine shell, which are configured to concentrically constrain the shrouds of the turbine shell.
    Type: Grant
    Filed: May 5, 2009
    Date of Patent: July 31, 2012
    Assignee: General Electric Company
    Inventors: Henry Grady Ballard, Jr., Fred Thomas Willett, Jr.
  • Patent number: 8233015
    Abstract: A display apparatus includes first and second frames in which a display panel is seated and optical sheets are received, and a method of manufacturing the display apparatus. The display apparatus includes a display panel displaying an image, a light source supplying light to the display panel, a first frame supporting the display panel and having the light source positioned therein, and a second frame combined with the first frame, wherein the second frame includes a cover portion that receives the light source, and a support portion, which extends from the cover portion along sidewalls of the first frame, where the support portion combines with the first frame, and includes an opening, the opening formed opposite to and facing the cover portion.
    Type: Grant
    Filed: June 10, 2009
    Date of Patent: July 31, 2012
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Seung-Yeop Lee
  • Patent number: 8231983
    Abstract: Disclosed is an organic electroluminescent device having high emission luminance, high external quantum efficiency and long lifetime. Also disclosed are a display and an illuminating device.
    Type: Grant
    Filed: March 27, 2006
    Date of Patent: July 31, 2012
    Assignee: Konica Minolta Holdings Inc.
    Inventors: Shuichi Sugita, Tatsuo Tanaka
  • Patent number: 8234554
    Abstract: An error-correction code is generated on a line-by-line basis of the physical logic register and latch contents that store encoded words within a processor just before the processor is put into sleep mode, and later-generated syndrome bits are checked for any soft errors when the processor wakes back up, e.g., as part of the power-up sequence.
    Type: Grant
    Filed: July 10, 2008
    Date of Patent: July 31, 2012
    Assignee: International Business Machines Corporation
    Inventors: Kerry Bernstein, Norman J. Rohrer
  • Patent number: 8232821
    Abstract: Multiple flip-flops each latch input data at a time point of the corresponding clock signal. The i-th (i represents an integer) first logical gate generates an internal up signal which is asserted when the output of the (2×i?1)-th flip-flop does not match the output of the (2×i)-th flip-flop. The j-th (j represents an integer) second logical gate generates an internal down signal which is asserted when the output of the (2×j)-th flip-flop does not match the output of the (2×j+1)-th flip-flop. A third logical gate generates an up signal based upon the multiple internal up signals. A fourth logical gate generates a down signal based upon the multiple internal down signals.
    Type: Grant
    Filed: December 1, 2010
    Date of Patent: July 31, 2012
    Assignee: Rohm Co., Ltd.
    Inventor: Shinichi Saitoh
  • Patent number: 8231096
    Abstract: A telescopic tube set for a bridge transport system is disclosed. The telescopic tube set includes cylindrical tubes each having an upper end, at which an upper ring is mounted, and a lower end, at which a lower ring is mounted, the cylindrical tubes having different diameters, pulleys mounted to respective inner wall surfaces of a part of the tubes, and extension/retraction lines each having an end connected to the upper ring of a corresponding one of the tubes, and an opposite end connected to the upper ring of another corresponding one of the tubes while extending around the pulley mounted to the tube interposed between the corresponding tubes. A plurality of bearings are installed at the lower ring to guide the tube, at which the lower ring is mounted, such that the tube extends or retracts straight in a longitudinal direction.
    Type: Grant
    Filed: January 31, 2011
    Date of Patent: July 31, 2012
    Assignees: Korea Atomic Energy Research Institute, Korea Hydro & Nuclear Power Co., Ltd
    Inventors: Hyo Jik Lee, Byung Suk Park, Jong Kwang Lee, Ki Ho Kim
  • Patent number: 8232106
    Abstract: Disclosed are a method for detecting proteins on a polyacrylamide gel by background staining method using an organic dye composition containing eosin Y or phloxine B, and the organic dye composition for use in the method, which enables the rapid and simple detection of the protein on the polyacrylamide gel with a high sensitivity.
    Type: Grant
    Filed: October 27, 2008
    Date of Patent: July 31, 2012
    Assignee: Industry Foundation of Chonnam National University
    Inventor: Jung-kap Choi
  • Patent number: 8232165
    Abstract: A semiconductor structure includes an n-channel field effect transistor (NFET) nanowire, the NFET nanowire comprising a film wrapping around a core of the NFET nanowire, the film wrapping configured to provide tensile stress in the NFET nanowire. A method of making a semiconductor structure includes growing a film wrapping around a core of an n-channel field effect transistor (NFET) nanowire of the semiconductor structure, the film wrapping being configured to provide tensile stress in the NFET nanowire.
    Type: Grant
    Filed: July 15, 2011
    Date of Patent: July 31, 2012
    Assignee: International Business Machines Corporation
    Inventors: Dureseti Chidambarrao, Lidija Sekaric
  • Patent number: 8232210
    Abstract: A method of forming an integrated circuit (IC) device feature includes forming an initially substantially planar hardmask layer over a semiconductor device layer to be patterned; forming a first photoresist layer over the hardmask layer; patterning a first set of semiconductor device features in the first photoresist layer; registering the first set of semiconductor device features in the hardmask layer in a manner that maintains the hardmask layer substantially planar; removing the first photoresist layer; forming a second photoresist layer over the substantially planar hardmask layer; patterning a second set of semiconductor device features in the second photoresist layer; registering the second set of semiconductor device features in the hardmask layer in a manner that maintains the hardmask layer substantially planar; removing the second photoresist layer; and creating topography within the hardmask layer by removing portions thereof corresponding to both the first and second sets of semiconductor device
    Type: Grant
    Filed: September 18, 2009
    Date of Patent: July 31, 2012
    Assignee: International Business Machines Corporation
    Inventors: Kangguo Cheng, Haining S. Yang
  • Patent number: 8234412
    Abstract: An exemplary embodiment of the present invention is a method for transmitting compacted text data. A standard form data message is translated into a compacted form data message. The translating includes first locating a long tag in the standard form data message. A short tag in a sender translation table that corresponds to the long tag is identified in a sender translation table. The compacted form data message is created by substituting the short tag for the long tag in the standard form data message. The compacted form data message is transmitted to a receiver system. Then, a flag is set in response to determining if the sender translation table needs to be transmitted to the receiver system and the flag is transmitted to the receiver system. The sender translation table is transmitted to the receiver system in response to the determination of whether the translation table needs to be transmitted. Additional embodiments include a system and storage medium for transmitting compacted text data.
    Type: Grant
    Filed: September 10, 2001
    Date of Patent: July 31, 2012
    Assignee: International Business Machines Corporation
    Inventors: Revelino M. Pascual, Margo T. Mao
  • Patent number: 8231250
    Abstract: The present invention relates to warm white light engines including combinations of blue, cyan, and red, red-orange, or amber emitters and one or more phosphors that produce a white light pleasing to the human eye through the use of improved color uniformity and improved collimation of light. Specifically, a micro-lenslet array having an optimized surface is used to disperse light from the light emitter; an innercollimation lens having an optimized cross-sectional shape and micro-ridges is used to disperse light; a TIR reflector having an optimized cross-sectional shape and micro-ridges is used to disperse and redistribute phase as well as provide collimation; and a final micro-lenslet layer includes optimized lenslet design placement and randomization factor to homogenize light to produce a uniform warm white light.
    Type: Grant
    Filed: September 10, 2008
    Date of Patent: July 31, 2012
    Assignee: Lighting Science Group Corporation
    Inventor: Edward Bailey
  • Patent number: 8234513
    Abstract: A method of managing IT resources when an IT resource managed by a coordinator is subject to a power-off request is provided. The method includes, in an event a sufficient quantity of resource statistics is present, analyzing resource statistics and operational policies to determine whether execution of the power-off request is currently, futuristically or potentially futuristically achievable with a threshold efficiency, and, in an event the power-off request is currently, futuristically or potentially futuristically achievable with the threshold efficiency, executing the power-off request, identifying a first time when the power-off request is achievable, instituting a first delay until then and, subsequently, executing the power-off request, and identifying a second time when the power-off request is potentially achievable, instituting a second delay until then and, subsequently, returning control to the analyzing operation, respectively.
    Type: Grant
    Filed: September 19, 2008
    Date of Patent: July 31, 2012
    Assignee: International Business Machines Corporation
    Inventor: Jean-Michel Rodriguez
  • Patent number: 8232162
    Abstract: A method of forming a deep trench structure for a semiconductor device includes forming a mask layer over a semiconductor substrate. An opening in the mask layer is formed by patterning the mask layer, and a deep trench is formed in the semiconductor substrate using the patterned opening in the mask layer. A sacrificial fill material is formed over the mask layer and into the deep trench. A first portion of the sacrificial fill material is recessed from the deep trench and a first dopant implant forms a first doped region in the semiconductor substrate. A second portion of the sacrificial fill material is recessed from the deep trench and a second dopant implant forms a second doped region in the semiconductor substrate, wherein the second doped region is formed underneath the first doped region such that the second doped region and the first doped region are contiguous with each other.
    Type: Grant
    Filed: September 13, 2010
    Date of Patent: July 31, 2012
    Assignee: International Business Machines Corporation
    Inventors: Roger A. Booth, Jr., Kangguo Cheng, Joseph Ervin, Chengwen Pei, Ravi M. Todi, Geng Wang, Yanli Zhang
  • Patent number: 8234100
    Abstract: A method of simulating an information technology (IT) system to produce parametric data includes translating specifications of the IT system from a first modeling language to a second modeling language; incorporating component constraints into the translated specifications; simulating operation of the IT system based on the translated specifications and the component constraints; and generating a report of parametric data based on the simulation.
    Type: Grant
    Filed: December 30, 2008
    Date of Patent: July 31, 2012
    Assignee: International Business Machines Corporation
    Inventors: Lidwina M. Duijvestijn, Pedro A. Ferreira de Silva, Peter H. Rongen
  • Patent number: 8233249
    Abstract: A magnetic tunnel junction transistor (MTJT) device includes a source-drain region comprising a source electrode and a drain electrode, a double MTJ element formed between the source electrode and the drain electrode and comprising a free magnetic layer at a center region thereof, and a gate region adjacent to the source-drain region and comprising an insulating barrier layer formed on an upper layer of the double MTJ element and a gate electrode formed on the insulating barrier layer. The MTJT device switches a magnetization orientation of the free magnetic layer by application of a gate voltage to the gate electrode, thereby changing a resistance of the source-drain region.
    Type: Grant
    Filed: January 4, 2010
    Date of Patent: July 31, 2012
    Assignee: International Business Machines Corporation
    Inventor: Daniel C. Worledge
  • Patent number: 8233317
    Abstract: A phase change memory cell that includes a bottom electrode, a top electrode separated from the bottom electrode, and growth-dominated phase change material deposited between the bottom electrode and the top electrode and contacting the bottom electrode and the top electrode and surrounded by insulation material at sidewalls thereof. The phase change memory cell in a reset state only includes an amorphous phase of the growth-dominated phase change material within an active volume of the phase change memory cell.
    Type: Grant
    Filed: November 16, 2009
    Date of Patent: July 31, 2012
    Assignee: International Business Machines Corporation
    Inventors: Matthew J. Breitwisch, Chung H. Lam, Bipin Rajendran, Simone Raoux, Alejandro G. Schrott, Daniel Krebs
  • Patent number: 8228653
    Abstract: An electronic control for a circuit breaker with automatic breaker rating is disclosed. The electronic control includes a memory to store circuit breaker ratings, a breaker rating switch to select circuit breaker ratings, and a microprocessor operatively coupled to the breaker rating switch and the memory. The microprocessor is configured to interpret a selected circuit breaker rating of the breaker rating switch, set an amplifier gain adjustment for the circuit breaker based on the selected circuit breaker rating, and transmit the selected circuit breaker rating to the memory for storage in the memory.
    Type: Grant
    Filed: December 6, 2007
    Date of Patent: July 24, 2012
    Assignee: General Electric Company
    Inventors: Nataniel Barbosa Vicente, Sreenivasulu Reddy Devarapalli, Todd Elliott Greenwood, Zubair Hameed, Brian Patrick Lenhart, Jr., Stephen James West
  • Patent number: D664706
    Type: Grant
    Filed: September 17, 2010
    Date of Patent: July 31, 2012
    Assignee: Sylvan R. Shemitz Designs Incorporated
    Inventors: Allison K. Schieffelin, James A. Melling, Wooyeon Cho, Matthew R. Bullard