Abstract: The semiconductor device includes a layer of silicon nitride (Si.sub.3 N.sub.4) beneath a phosphosilicate glass (PSG) layer. A silicon nitride impervious layer prevents the oxidation of underlying, exposed silicon regions during a "flow" step and any "reflow" step. Accordingly, the flow of the PSG layer can be conducted in an atmosphere containing steam, which means that the PSG layer can contain less than about 7% phosphorus by weight. The reduction of the phosphorus content of the PSG layer provides increased reliability for the semiconductor device. The method of manufacturing such a device is also disclosed.
Abstract: Crystalline quality of a semiconductor material near its interface with an insulator is evaluated by the photovoltage response to a light beam scanned in wavelength. The crystalline quality is determined from the photovoltage interference pattern in the region of intrinsic excitation of the material. A body of silicon-on-sapphire (SOS) is used to illustrate the method.
Abstract: An improved method of selectively depositing coatings onto bodies of semiconductor material employs as a protective mask an alkyl ester of a sulfosuccinate salt. The mask material is applied to areas which are to be kept free of the coatings. The overspray of a desired coating, onto the protective mask is deposited in a cracked, non-continuous manner, as opposed to the smooth crystalline layer being deposited over the semiconductor body. This overspray coating can be readily removed.
December 20, 1983
Date of Patent:
September 16, 1986
Frank Z. Hawrylo, Henry V. Kowger, deceased
Abstract: A multi-emitter semiconductor electroluminescent device includes a stud having a mounting block on a surface thereof and a cover extending over the mounting block and secured to the stud. The mounting block has a plurality of surfaces which are angled toward a common point. A separate electroluminescent semiconductor element is mounted on each of the surfaces of the stud and have light emitting surfaces which face toward the common point. The electroluminescent elements are electrically connected to lead wires so that they can be operated either individually or simultaneously. An optical fiber extends through the cover and has one end directly over the common point so that the light emitted from all of the electroluminescent elements will enter the end of the optical fiber and propagate along the fiber.
Abstract: A method of producing a high frequency III-V FET and the resultant structure is described wherein a doped layer is formed on a wafer of undoped, semi-insulating III-V material. The structure is then etched to form a mesa after which, a channel region is regrown from an exposed portion of the III-V substrate. The formation of the channel region defines the source and drain regions. Ohmic contacts are then made to the source and drain regions after which a Schottky contact is made to the channel region.
Abstract: A photovoltaic array comprises a continuous semiconductor body with a plurality of spaced apart first and second electrical contacts on respective opposed surfaces of the body, thereby forming a plurality of photovoltaic cells with the cells series-connected to provide a higher output voltage. The invention is a series-connected array wherein the series connection between a pair of adjacent photovoltaic cells comprises a plurality of openings extending through the semiconductor body with an electrical contact of one cell extending into the plurality of openings to provide a connection with an opposed electrical contact of the next adjacent cell.
Abstract: A laminated recorded disc of the type having a core material surrounded by a surface layer of a conductive material is made from a preform having a core surrounded by the conductive material. The preform is made in a mold in which the conductive material is first injected into the mold and then the core material is injected into the conductive material. The disc is made from the preform by placing the preform between the platens of a compression mold and closing the heated platens against the preform. The heated platens heat and apply pressure to the preform to cause the materials of the preform to flow radially outwardly until the materials fill the mold cavity formed by the completely closed platens.
Abstract: A process for defining improved tapered contact openings in glass coatings comprising the deposition of a layer of low temperature flowable passivating glass and the deposition of a masking layer to initially approximately define contact areas over portions of the active regions and over portions of a gate line. The first contact openings are then etched and the passivating layer caused to reflow followed by a second etch, in the previously etched areas, which second etch accurately defines the contact openings. The final etch rounds off any corners produced by the second etch to produce smoothly tapered contact openings. .circle.
Abstract: A workpiece loader includes a processing tray having two parallel sets of substantially V-shaped grooves adjacent a surface thereof, the grooves of one set alternating with and having a depth greater than the depth of the grooves of the other set. The workpiece loader further comprises an aligning tray having a plurality of substantially V-shaped grooves adjacent a surface thereof and parallel to each other, the grooves of the aligning tray having a depth greater than the depth of the grooves of the other set and having a periodicity equal to the periodicity of the grooves of the other set, the aligning and processing trays being positioned in tandem so that the grooves of the other set are aligned with the grooves of the aligning tray.
Abstract: A gas drying system for use in removing a liquid from a substrate comprises a carrier adapted to support the substrate wherein the parts of the carrier that make contact with the substrate have a surface wettable by the liquid and the wettable surface has a roughened surface of a material that is capable of being hydroxylated, and a dryer for exposing the substrate to a stream of ambient-temperature gas.
Abstract: A method of optically testing the lateral dimensions of a pattern of material disposed on a substrate comprises applying the material to both the main area of the substrate and a test area on the same substrate, and selectively removing the material from both areas on the substrate simultaneously to form respectively the pattern on the main area and a diffraction grating on the test area. The diffraction grating is exposed to a beam of light, and the intensity of two of the diffracted beams is measured to obtain a ratio signal (I.sub.2 /I.sub.1), which is then utilized to determine the lateral dimensional tolerance of the integrated circuit pattern.
December 7, 1979
Date of Patent:
December 1, 1981
Hans P. Kleinknecht, Wolfram A. Bosenberg
Abstract: A non-volatile memory structure of the floating gate type is described wherein current carriers are injected onto the floating gate from the control gate as distinguished from the prior art which injects current carriers into the floating gate from the substrate. This invention teaches that by tailoring the capacitance between the control gate and the floating gate and the capacitance between the floating gate and the substrate different field intensities are created in the region between the floating gate and the control gate and in the region between the substrate and the floating gate. When the field intensity across the capacitor formed between the control gate and the floating gate is greater than the field intensity across the capacitor formed between the floating gate and the substrate, current carriers will be injected onto the floating gate from the control gate.
Abstract: A vapor deposition system wherein means orbit a plurality of rotating planets. Each planet supports a plurality of wafer targets which orbit the associated planet axis. A planet wheel of limited rotatability is operative to effect rotation of the orbiting wafer targets.
Abstract: An input protection device comprising at least one pair of N and P type MOSFETs having their conduction paths series connected between a source of operating potential and the input of the circuit to be protected. Another variation includes a second pair of similarly connected N and P type MOSFETs with one pair connected between the input to be protected and the most negative source of operating potential while the second pair is connected between the most positive source of operating potential and the input to be protected.
Abstract: A process for forming a relatively defect free layer of silicon on an insulating substrate wherein as soon as growth islands are formed on the substrate, to a point just prior to the complete coverage of the substrate with silicon, the formation of the layer is temporarily terminated. The growth islands are maintained at a given temperature for a predetermined period, to allow any defects, which may have started during the initial formation of the growth island, to be self-cured or to annihilate themselves. Thereafter, the growth of silicon is continued until the desired layer thickness is achieved.
Abstract: A novel process is described for forming a gate member for an SOS device wherein the objectionable point that appears at the top of the silicon island is removed. The point results when an anisotropic etch is utilized to form the island. The process includes first forming a relatively thick layer of CVD oxide around sides at the base portion of the island while the remainder of the sides of the island, including the objectionable point, remain exposed for further processing in order to remove the point. The point is then heavily oxidized to form a bird beak which bird beak joins the gate oxide with the CVD oxide to produce a rounded edge.
Abstract: A method for fabricating a complementary MOS device, applicable to either silicon-on-sapphire or bulk silicon, is described wherein a buried contact is formed that is comprised of a region of doped silicon, a layer of MoSi.sub.2, a thin layer of Mo and a layer of doped polycrystalline silicon.
Abstract: A support mechanism for a rotatable wafer-support susceptor adapted for rotation by a shaft in a vertical orientation. The support mechanism comprises a quartz pedestal tube resting with frictional engagement on a metallic table fixed to the shaft. The pedestal supports, with frictional engagement, the base of the susceptor and is rotated by frictional engagement with the table. Means disposed within an aperture of the base and within the tube constrain the base, and thus the susceptor, and the tube to symmetrical rotation about the shaft passing through a centrally located aperture in the base.
Abstract: A layer of polycrystalline silicon is coated with a masking layer leaving at least one edge of the silicon layer exposed. A P-type dopant is diffused into the exposed edge of the silicon layer so that the dopant diffuses laterally along the silicon layer a desired distance. The masking layer is then removed and the undoped portion of the silicon layer is removed by an etchant which does not etch the doped portion of the silicon layer. This leaves the narrow strip of the doped silicon which can be used as the gate electrode of an MOS transistor and/or as an interconnection in an integrated circuit. Since the lateral diffusion of the dopant can be accurately controlled, narrow strips of the doped silicon can be achieved.
Abstract: A slitted tubular member within a reaction chamber encloses a stack of spaced substrates on the surfaces of which are deposited material by chemical vapor-deposition. The tubular member is formed of susceptor material adapted for heating by RF energy or by electrically heated wire. Oscillating means disposed in the slit direct a gas flow into the spacings between the substrates, the stack of which is spaced from the tubular member. Oscillating means disposed in the slit direct a gas flow into the spacings between the substrates, the stack of which is spaced from the tubular member.