Abstract: A method of fabricating a Si1−XGeX film on a silicon substrate includes preparing a silicon substrate; epitaxially depositing a Si1−XGeX layer on the silicon substrate forming a Si1−XGeX/Si interface there between; epitaxially growing a silicon cap on the Si1−XGeX layer; implanting hydrogen ions through the Si1−XGeX layer to a depth of between about 3 nm to 100 nm below the Si1−XGeX/Si interface; amorphizing the Si1−XGeX layer to form an amorphous, graded SiGe layer; and annealing the structure at a temperature of between about 650° C. to 1100° C. for between about ten seconds and sixty minutes to recrystallize the SiGe layer.

Abstract: A method of coordinating the delivery of two independent messages, of different mediums, for simultaneous presentation is provided. The messages are communicated in a system capable of including coordination plans with the messages. The coordination plans include the identity of the independent messages, points in the messages where the coordination begins, and the duration of the presentation. Once linkage points in the first and second messages are defined, the relationship between messages is defined, so that independent messages 10 are displayed with predefined, meaningful timing. In communication system flexible enough to support real-time, two-way communications, such as wireless telephones, at least one of the messages to be coordinated can be received and presented in real-time. A system of coordinating two independent messages with a coordination plan message is also provided.

Abstract: A Home Network telephone system and method are provided for backing up user data. The system comprises at least one endpoint to transceive telephone communications. The endpoints can be devices such as telephones or fax machines, for example. The system also comprises a gateway to service and transceive telephone communication with the endpoints. The gateway has a memory to store a copy of user data associated with each endpoint. The gateway stores user data such as telephone directories, calling line ID (CLID) lists, call-logs, and user preferences for organizing the stored data. The gateway can supply the endpoints with an initial start-up configuration of user data, or resupply an endpoint in response to the endpoint losing the copy of the user data stored in its local memory. Each endpoint receives the user data from the gateway and stores a copy of the user data in a local memory.

Abstract: Low cross talk resistive cross point memory devices are provided, along with methods of manufacture and use. The memory device comprises a bit formed using a perovskite material interposed at a cross point of an upper electrode and lower electrode. Each bit has a resistivity that can change through a range of values in response to application of one, or more, voltage pulses. Voltage pulses may be used to increase the resistivity of the bit, decrease the resistivity of the bit, or determine the resistivity of the bit. Memory circuits are provided to aid in the programming and read out of the bit region.

Abstract: A method is provided for fabricating a thin film oxide. The method include forming a first silicon layer, applying a second silicon layer overlying the first silicon layer, oxidizing the second silicon layer at a temperature of less than 400° C. using an inductively coupled plasma source, and forming a thin film oxide layer overlying the first silicon layer. In some cases, the thin film oxide layer overlies the oxidized second silicon layer and is formed by a high-density plasma enhanced chemical vapor deposition process and an inductively coupled plasma source at a temperature of less than 400° C. In some cases, the thin film oxide layer and the first silicon layer are incorporated into a thin film transistor and the thin film oxide layer has a fixed oxide charge density of 3×1011 per square centimeter.

Abstract: A method is provided to produce liquid crystal displays (LCDs) on polycrystalline films having a single predominant crystal orientation. A layer of amorphous silicon is deposited over a substrate to a thickness suitable for producing a desired crystal orientation. Lateral-seeded excimer laser annealing (LS-ELA) is used to crystallize a region of the amorphous silicon to form a polycrystalline film with a preferred crystal orientation. In an embodiment of the method, the polycrystalline film is polished. A pixel region is formed over a portion of the substrate using either amorphous silicon or polycrystalline silicon. A circuit region is formed over the polycrystalline film.

Abstract: A method of forming a low-k inter-level insulator structure is provided comprising the steps of: providing a first metal layer; depositing a sacrificial insulator layer overlying the first metal layer; producing a second metal layer; removing the sacrificial insulator layer; and depositing a low-k inter-level insulator, whereby low-k material replaces the sacrificial insulator. An intermediate insulator layer structure is also provided comprising a sacrificial insulator layer overlying a low-k insulator layer, such that the sacrificial insulator layer may be subjected to processes, including CMP, which may be incompatible with low-k insulator materials.

Abstract: A method of forming a layer of high-&kgr; dielectric material in an integrated circuit includes preparing a silicon substrate; depositing a first layer of metal oxide using ALD with a metal nitrate precursor; depositing another layer of metal oxide using ALD with a metal chloride precursor; and completing the integrated circuit.

Abstract: A conductive barrier, useful as a ferroelectric capacitor electrode, having high temperature stability has been provided. This conductive barrier permits the use of iridium (Ir) metal in IC processes involving annealing. Separating silicon substrate from Ir film with an intervening, adjacent, tantalum (Ta) film has been found to very effective in suppressing diffusion between layers. The Ir prevents the interdiffusion of oxygen into the silicon during annealing. A Ta or TaN layer prevents the diffusion of Ir into the silicon. This Ir/TaN structure protects the silicon interface so that adhesion, conductance, hillock, and peeling problems are minimized. The use of Ti overlying the Ir/TaN structure also helps prevent hillock formation during annealing. A method of forming a multilayer Ir conductive structure and Ir ferroelectric electrode are also provided.

Abstract: A method of changing the resistance of a perovskite metal oxide thin film device with a resistance-change-producing pulse includes changing the resistance of the device by varying the duration of a resistance-change-producing pulse.

Abstract: A method for fabricating silicon tiles and silicon tile targets has been provided, such as may be used in the sputter deposition of thin film transistor (TFT) silicon films. The method describes processes of cutting the tiles, beveling the tiles edges, etching the tiles to minimize residual damage caused by cutting the tiles, polishing the tiles to a specified flatness, and attaching the tiles to a backing plate. All these processes are performed with the aim of minimizing contamination and particle formations when the target is used for sputter deposition.

Abstract: A method of making a self-aligned ferroelectric memory transistor includes preparing a substrate, shallow trench isolation, n the polysilicon; and forming a gate stack, including: depositing a layer of silicon nitride; selectively etching the silicon nitride, the bottom electrode and the polysilicon; selectively etching the polysilicon to the level of the first dielectric layer; and implanting and activating ions to form a source region and a drain region; forming a sidewall barrier layer; depositing a layer of ferroelectric material; forming a top electrode structure on the ferroelectric material; and finishing the structure, including passivation, oxide depositing and metallization.

Abstract: A Cu(hfac) precursor with a substituted phenylethylene ligand has been provided. The substituted phenylethylene ligand includes bonds to molecules selected from the group consisting of C1 to C6 alkyl, C1 to C6 haloalkyl, C1 to C6 phenyl, H and C1 to C6 alkoxyl. One variation, the &agr;-methylstyrene ligand precursor has proved to be stable a low temperatures, and sufficiently volatile at higher temperatures. Copper deposited with this precursor has low resistivity and high adhesive characteristics. A synthesis method has been provided which produces a high yield of the above-described precursor.

Abstract: A method of forming a multi-layered, spin-coated perovskite thin film on a wafer includes preparing a perovskite precursor solution including mixing solid precursor material into acetic acid forming a mixed solution; heating the mixed solution in air for between about one hour to six hours; and filtering the solution when cooled; placing a wafer in a spin-coating mechanism; spinning the wafer at a speed of between about 500 rpm to 3500 rpm; injecting the precursor solution onto the wafer surface; baking the coated wafer at a temperature of between about 100° C. to 300° C.; annealing the coated wafer at a temperature of between about 400° C. to 650° C. in an oxygen atmosphere for between about two minutes to ten minutes; repeating the spinning, injecting, baking and annealing steps until a perovskite thin film of desired thickness is obtained; and annealing the perovskite thin film at a temperature of between about 500° C. to 750° C.

Abstract: A method is provided to produce thin film transistors (TFTs) on polycrystalline films having a single predominant crystal orientation. A layer of amorphous silicon is deposited over a substrate to a thickness suitable for producing a desired crystal orientation. Lateral-seeded excimer laser annealing (LS-ELA) is used to crystallize the amorphous silicon to form a film with a preferred crystal orientation. The crystallized film is then polished to a desired thickness. A gate is formed overlying the polycrystalline film. The polycrystalline film is doped to produce source and drain regions.

Abstract: A method of forming a ferroelectric thin film on a high-k layer includes preparing a silicon substrate; forming a high-k layer on the substrate; depositing a seed layer of ferroelectric material at a relatively high temperature on the high-k layer; depositing a top layer of ferroelectric material on the seed layer at a relatively low temperature; and annealing the substrate, the high-k layer and the ferroelectric layers to form a ferroelectric thin film.

Abstract: A substrate and a method for fabricating variable quality substrate materials are provided. The method comprises: selecting a first mask having a first mask pattern; projecting a laser beam through the first mask to anneal a first area of semiconductor substrate; creating a first condition in the first area of the semiconductor film; selecting a second mask having a second mask pattern; projecting the laser beam through the second mask to anneal a second area of the semiconductor film; and, creating a second condition in the second area of the semiconductor film, different than the first condition. More specifically, when the substrate material is silicon, the first and second conditions concern the creation of crystalline material with a quantitative measure of lattice mismatch between adjacent crystal domains.

Abstract: A method of forming a titanium-based barrier metal layer includes preparing a substrate, including forming IC elements on the substrate; forming a titanium-based barrier metal precursor using a solution of about 5% by volume tetrakis (methylethylamino) titanium (TMEAT) and about 95% by volume octane; and depositing a titanium-based barrier layer on the substrate by MOCVD.

Abstract: A solid-state inductor and a method for forming a solid-state inductor are provided. The method comprises: forming a bottom electrode; forming a colossal magnetoresistance (CMR) thin film overlying the bottom electrode; forming a top electrode overlying the CMR thin film; applying an electrical field treatment to the CMR thin film in the range of 0.4 to 1 megavolts per centimeter (MV/cm) with a pulse width in the range of 100 nanoseconds (ns) to 1 millisecond (ms); in response to the electrical field treatment, converting the CMR thin film into a CMR thin film inductor; applying a bias voltage between the top and bottom electrodes; and, in response to the applied bias voltage, creating an inductance between the top and bottom electrodes. When the applied bias voltage is varied, the inductance varies in response.

Abstract: A method of forming a semiconductor memory device on a silicon substrate includes implanting doping impurities of a first type in the silicon substrate to form a conductive channel of a first type for use as a gate junction region, forming a MOS capacitor on the conductive channel of the first type, depositing an FEM capacitor over less than the entire area of the MOS capacitor, thereby forming a stacked gate unit, implanting doping impurities of a second type in the silicon substrate on either side of the gate junction region to form a conductive channel of a second type for use as a source junction region and a drain junction region, and depositing an insulating structure about the FEM gate unit.