Abstract: Resistive cross-point memory devices are provided, along with methods of manufacture and use. The memory devices are comprised by an active layer of resistive memory material interposed between upper electrodes and lower electrodes. A bit region located within the resistive memory material at the cross-point of an upper electrode and a lower electrode has a resistivity that can change through a range of values in response to application of one, or more, voltage pulses. Voltage pulses may be used to increase the resistivity of the bit region, decrease the resistivity of the bit region, or determine the resistivity of the bit region. A diode is formed between at the interface between the resistive memory material and the lower electrodes, which may be formed as doped regions, isolated from each other by shallow trench isolation.

Abstract: A temperature compensated RRAM sensing circuit to improve the RRAM readability against temperature variations is disclosed. The circuit comprises a temperature dependent element to control the response of a temperature compensated circuit to generate a temperature dependent signal to compensate for the temperature variations of the resistance states of the memory resistors. The temperature dependent element can control the sensing signal supplied to the memory resistor so that the resistance states of the memory resistor are compensated against temperature variations. The temperature dependent element can control the reference signal supplied to the comparison circuit so that the output signal provided by the comparison circuit is compensated against temperature variations. The temperature dependent element is preferably made of the same material and process as the memory resistors.

Abstract: A 3D quantum dot optical path structure is provided, along with a method for selectively forming a 3D quantum dot optical path. The method comprises: forming a single crystal Si substrate with a surface; forming a Si feature in the substrate, such as a via, trench, or pillar; forming dots from a Ge or SiGe material overlying the Si feature; and, forming an optical path that includes the dots. In some aspects of the method, the Si feature has defect sites. For example, the Si feature may be formed with a miscut angle. As a result of the miscut angle, steps are formed in the Si feature plane. Then, the dots are formed in the Si feature steps. The miscut angle is in the range between 0.1 and 5 degrees, and the spacing between steps is in the range between 1 and 250 nanometers (nm).

Abstract: A wide-slit lateral growth projection mask, projection system, and corresponding crystallization process are provided. The mask includes an opaque region with at least one a transparent slit in the opaque region. The slit has a width in the range of 10X to 50X micrometers, with respect to a X:1 demagnification system, and a triangular-shaped slit end. The triangular-shaped slit end has a triangle height and an aspect ratio in the range of 0.5 to 5. The aspect ratio is defined as triangle height/slit width. In some aspects, the triangular-shaped slit end includes one or more opaque blocking features. In another aspect, the triangular-shaped slit end has stepped-shaped sides. The overall effect of the mask is to promote uniformly oriented grain boundaries, even in the film areas annealed under the slit ends.

Abstract: A system and method are provided for a network-connected printer to supply printer driver software to a network-connected computer workstation. The method comprises: receiving a request addressed to a first IP address from a network-connected computer workstation; supplying a web page from an embedded web server; in response to accessing the web server, causing printer driver software to be supplied to the computer workstation; receiving documents from the computer workstation in accordance with the supplied printer driver software; and, processing the received documents. The method further comprises: supplying updated printer driver software. Typically, the printer receives updated printer software in communications with an external server/web server. The printer automatically supplies updated printer driver software to the computer workstation, or supplies the updated software in response to prompts supplied to the computer workstation.

Abstract: A method of dry etching a PCMO stack, includes preparing a substrate; depositing a barrier layer; depositing a bottom electrode; depositing a PCMO thin film; depositing a top electrode; depositing a hard mask layer; applying photoresist and patterning; etching the hard mask layer; dry etching the top electrode; dry etching the PCMO layer in a multi-step etching process; dry etching the bottom electrode; and completing the PCMO-based device.

Abstract: A system and method are provided for a transmitter to delay message retransmission in a noise environment, where a communications network uses a shared channel. The method comprises: transmitting a message on a shared channel, such as a ac powerline medium; failing to receive a received message acknowledgement; deciding that the transmission error is due to a noise; postponing the retransmission of the message; and, following the channel noise transmission error decision, releasing the channel for use by other transmitters. Deciding that the transmission error is due to channel noise includes: monitoring received signals; and, distinguishing between transmission collisions and noise.

Abstract: A method of etching includes preparing a substrate; depositing a first etch stop layer; forming an iridium bottom electrode layer; depositing a SiN layer; depositing and patterning an aluminum hard mask; etching a non-patterned SiN layer with a SiN selective etchant, stopping at the level of the iridium bottom electrode layer; etching the first etch stop layer with a second selective etchant; depositing an oxide layer and CMP the oxide layer to the level of the remaining SiN layer; wet etching the SiN layer to form a trench; depositing a layer of ferroelectric material in the trench formed by removal of the SiN layer; depositing a layer of high-k oxide; and completing the device, including metallization.

Abstract: An asymmetric-area memory cell, and a fabrication method for forming an asymmetric-area memory cell, are provided. The method includes: forming a bottom electrode having an area; forming a CMR memory film overlying the bottom electrode, having an asymmetric area; and, forming a top electrode having an area, less than the bottom electrode area, overlying the CMR film. In one aspect, the CMR film has a first area adjacent the top electrode and a second area, greater than the first area, adjacent the bottom electrode. Typically, the CMR film first area is approximately equal to the top electrode area, although the CMR film second area may be less than the bottom electrode area.

Abstract: A high-quality isotropic polycrystalline silicon (poly-Si) and a method for fabricating high quality isotropic poly-Si film are provided. The method includes forming a film of amorphous silicon (a-Si) and using a MISPC process to form poly-Si film in a first area of the a-Si film. The method then anneals a second area, included in the first area, using a Laser-Induced Lateral Growth (LILaC) process. In some aspects, a 2N-shot laser irradiation process is used as the LILaC process. In some aspects, a directional solidification process is used as the LILaC process. In response to using the MISPC film as a precursor film, the method forms low angle grain boundaries in poly-Si in the second area.

Abstract: Resistive cross-point memory devices are provided, along with methods of manufacture and use. The memory devices are comprised by an active layer of resistive memory material interposed between upper electrodes and lower electrodes. A bit region located within the resistive memory material at the cross-point of an upper electrode and a lower electrode has a resistivity that can change through a range of values in response to application of one, or more, voltage pulses. Voltage pulses may be used to increase the resistivity of the bit region, decrease the resistivity of the bit region, or determine the resistivity of the bit region. A diode is formed between at the interface between the resistive memory material and the lower electrodes, which may be formed as doped regions, isolated from each other by shallow trench isolation.

Abstract: A method for obtaining reversible resistance switches on a PCMO thin film when integrated with a highly crystallized seed layer includes depositing, by MOCVD, a seed layer of PCMO, in highly crystalline form, thin film, having a thickness of between about 50 ? to 300 ?, depositing a second PCMO thin film layer on the seed layer, by spin coating, having a thickness of between about 500 ? to 3000 ?, to form a combined PCMO layer; increasing the resistance of the combined PCMO film in a semiconductor device by applying a negative electric pulse of between about ?4V to ?5V, having a pulse width of between about 75 nsec to 1 ?sec; and decreasing the resistance of the combined PCMO layer in a semiconductor device by applying a positive electric pulse of between about +2.5V to +4V, having a pulse width greater than 2.0 ?sec.

Abstract: A system and method are provided for managing workflow, using a plurality of scripts, in a workflow system. The method comprises: selecting an MFP device at which the document is to be processed; supplying a plurality of folders with a corresponding plurality of scripts; selecting a first number of folders; processing a document using processes such as faxing, scanning, copying, and printing; adding the processed document to the selected folders; and, in response to adding the processed document to a first number of selected folders, generating the document in a first number of scripts.

Abstract: A flexible liquid crystal display (LCD) substrate support structure and a method of supporting a flexible LCD substrate during fabrication have been provided. The method forms channels or trenches in-between a rigid support substrate and the flexible LCD substrate. A vacuum is created in the channels or trenches to pull adhesive in. The adhesive formed in this manner contains no air or water bubbles whose expansion in subsequent LCD fabrication processes can destroy the integrity of thin film transistor films formed on the flexible LCD substrate.

Abstract: An atomic layer deposition method to deposit an oxide nanolaminate thin film is provided. The method employs a nitrate ligand in a first precursor as an oxidizer for a second precursor to form the oxide nanolaminates. Using a hafnium nitrate precursor and an aluminum precursor, the method is well suited for the deposition of a high k hafnium oxide/aluminum oxide nanolaminate dielectric for gate dielectric or capacitor dielectric applications on a hydrogen-terminated silicon surface.

Abstract: Asymmetrically structured memory cells and a fabrication method are provided. The method comprises: forming a bottom electrode; forming an electrical pulse various resistance (EPVR) first layer having a polycrystalline structure over the bottom electrode; forming an EPVR second layer adjacent the first layer, with a nano-crystalline or amorphous structure; and, forming a top electrode overlying the first and second EPVR layers. EPVR materials include CMR, high temperature super conductor (HTSC), or perovskite metal oxide materials. In one aspect, the EPVR first layer is deposited with a metalorganic spin coat (MOD) process at a temperature in the range between 550 and 700 degrees C. The EPVR second layer is formed at a temperature less than, or equal to the deposition temperature of the first layer. After a step of removing solvents, the MOD deposited EPVR second layer is formed at a temperature less than, or equal to the 550 degrees C.

Abstract: An asymmetric memory cell and method for forming an asymmetric memory cell are provided. The method comprises: forming a bottom electrode having a first area; forming an electrical pulse various resistance (EPVR) material overlying the bottom electrode; forming a top electrode overlying the EPVR layer having a second area, less than the first area. In some aspects the second area is at least 20% smaller than the first area. The EPVR is a material such as colossal magnetoresistance (CMR), high temperature super conducting (HTSC), or perovskite metal oxide materials. The method further comprises: inducing an electric field between the electrodes; inducing current flow through the EPVR adjacent the top electrode; and, in response to inducing current flow through the EPVR adjacent the top electrode, modifying the resistance of the EPVR. Typically, the resistance is modified within the range of 100 ohms to 10 mega-ohms.

Abstract: A shared bit line cross-point memory array structure is provided, along with methods of manufacture. The memory structure comprises a bottom word line with a top word line overlying the bottom word line. A bit line is interposed between the bottom word line and the top word line such that a first cross-point is formed between the bottom word line and the bit line and a second cross-point is formed between the bit line and the top word line. A resistive memory material is provided at each cross-point above and below the bit line. A diode is formed at each cross-point between the resistive memory material and either the top word line or the bottom word line, respectively.

Abstract: A method of reading a selected resistive memory bit having its output connected to a bitline, which is connected to a plurality of unselected electrically parallel resistive memory bits, is provided. The method comprises selecting the resistive memory bit to be read by applying a read voltage to an input of the resistive memory bit, and unselecting the plurality of unselected resistive memory bits by applying a deselect voltage to all inputs of the unselected resistive memory bits. The current out of the bitline is then sensed by a current sensor. A memory device is also provided comprising a plurality of resistive memory bits connected to a shared bitline, a means for selecting a single bit from the plurality of resistive memory bits, a means for deselecting the remaining, unselected bits from the plurality of resistive memory bits and a means for sensing the output current from the bitline.

Abstract: Embodiments of the present invention relate to methods and systems for manipulating and combining files from different applications without the use of the files' originating applications. Application files are collected and converted to a page-format which preserves the visual aspects and page formatting of the application file. A composer application is then used to manipulate and reorganize the pages of the files as needed. Pages from files created by different applications may be compiled into a single document which can be printed or electronically transmitted without manual editing or delivery.