Abstract: An apparatus and method for converting a charge packet into digital bit weights. The apparatus comprises a plurality of serially connected charge-coupled cells for receiving the charge packet at one end, such that the charge packet consecutively fills each CCD in the path. Also, a detector is coupled to another end of the CCD's for advancing charge within the CCD's and detecting whether each CCD is filled. A counter coupled to the detector for counting the number of CCD's which are not filled with charge, wherein the number represents a first form of digital bit weights of the charge packet.

Abstract: The REAL TIME KEYBOARD SCANNER shown herein provides scanning and debouncing, but not multiple key resolution or buffering. At the end of each keyboard scan, the scanner produces a code indicating which key was depressed, or that no key was depressed, or that multiple keys were depressed. If this code is the same as the code in a valid-key register, then no change is made to the valid-key register and no debouncing is performed. If the codes differ, then debouncing is performed. The CPU served by the scanner can examine the code in the valid-key register whenever it finds such examination to be convenient, and need not tie up valuable processing time in continuously monitoring the valid-key register. If desired, an interrupt may be sent to the CPU when the code in the valid-key register is changed.

Abstract: An oscillator circuit provides a symmetrical signal without halving the frequency of a crystal oscillator 12. The input 14 of the crystal oscillator 12 is low pass filtered, and the output 18 of the filter 16 is differential voltage compared with the input 14 of the crystal oscillator 12. The output 22 of the differential voltage comparator 20 is symmetrical and of the same frequency as the crystal oscillator 12. The crystal oscillator 12 is preferably a Pierce oscillator.

Abstract: An adaptive timing recovery method and apparatus are disclosed. The present invention reduces the problems in connection with the conventional timing recovery by varying the gain of the band-edge filtering in inverse proportion to the available band-edge energy in the received signal. The non-linearized outputs from the "early-late" filter are first added together and then subtracted from a reference value. A small fraction of the result is subtracted from the filter gains of the two half-symbol-rate filters. Therefore, if the band-edge energy is small, then the sum of the non-linearized outputs is negative and the timing filter gain values are increased. If the band-edge energy is large, then the filter gains will be reduced.

Abstract: A high speed interface receiver/transmitter is particularly suitable for enhancing data throughput rates between a DTE and a DCE, such as a modem. The high speed interface includes a driver programmed with high speed processing software. The driver operates in conjunction with modem firmware programmed in a programmable memory within the DCE to implement special firmware handshake protocol which enables the DTE to transmit or receive data as fast as necessary to sustain the required data rate of a particular operating mode.

Abstract: Equivalent circuit parameters of a piezoelectric resonator are measured in order to precisely control the amplitude and/or frequency of oscillation of an oscillator including the resonator, or to compensate for variations in the amplitude and/or frequency of oscillation. Significant variations are caused by shunt capacitance, and to a lesser degree, series resistance. The equivalent circuit parameters are measured by exciting the resonator at a plurality of frequencies, measuring responses of the resonator at the frequencies, including a complex response at one of the frequencies, and determining a value of the shunt capacitance from the responses. Preferably, the resonator is simultaneously and continuously excited at three different frequencies, one of which is approximately the resonant frequency of the resonator.

Abstract: An apparatus and method using a neural network processor for target detection is described. An array of injection mode infrared detectors, whose output signals convey intensity change information of detected objects in a pulse train output form is combined with a frequency division multiplexer to apply the information to a minimum number of multiplexed channels, and transmit the detector output signals to the processor in a continuous mode. A multi-layer neural network processor is used to localize global information and concentrate on areas of interest through matrix transformation applied by the various neural layers.

Abstract: A Lofargram Enhancement System having a processor having 1 to i rows and 1 to j columns of processing elements or data cells. Each data cell has a location corresponding to an index, a computational capability and a memory means for storing a a pixel intensity value. The memory cells of all processing elements are addressed concurrently. A FIFO receives and stores a scan line comprising a sequence of pixel intensity signal values. A program provides a means for calculating row and column total values for the total of the pixel intensity signal values stored in a predetrmined relationally related location for each respective processing element for each respective processing element in the systolic processor. An auxiliary processor reads the respective row total and column totals for each processing element in the jth column of the systolic processor and loads the corresponding first column processing element with a corrected pixel value.

Abstract: The invention comprises a gallium arsenide driver with float capability for logic high and logic low signals including logic means for receiving an input signal and providing logic high and low signals therefrom. Level shift means responsive to the high and low signals downshift the voltage levels thereof. Common gate means responsive to the downshifted signal voltage levels amplify these signals, and output source-follower means responsive to the amplified signals provide output signals to a pad.

Abstract: Using classic Fast Fourier Transform (FFT) rules, a radix-12 FFT is composed of a first tier of 2 multiplierless radix-6 transformers followed by multiplierless radix-2 transformers, or by its transpose configuration. Complex data are represented in a 1, W.sub.3 coordinate system rather than in a classic 1,j coordinate system. The only multiplicative scaler in the complex twiddle factors is the reciprocal of the square root of 3 which appears six times and which by conversion to canonical signed digit code, can be accurately expressed by 5 adds. As a consequence the complex twiddle factor multipliers and ancillary address reduce to a total of 144 real adds required to perform the entire complex 12-point FFT.

Abstract: The present invention is a high efficiency bi-directional spatial power combiner for extremely high frequency signals. In one embodiment, orthogonally polarized electro-magnetic waves are used to isolate signals going into and out of a planar array of amplifiers. A dual mode horn transmits vertically polarized fields to a MMIC planar array of amplifiers. Vertically polarized array elements receive the signals, amplify them, and retransmit back to the horn using horizontally polarized array elements. An ortho-mode transducer on the horn provides isolation for the two polarized signals. The backside of the array can be used for a heat sink, and to provide access for DC biasing of the array elements. In a second embodiment, monolithic grid oscillators are used in lieu of power amplifiers with orthogonal polarization array elements. The input signal and the output signal are of the same polarization. A circulator is used in lieu of an ortho-mode transducer to isolate the input signal from the output signal.

Abstract: A multiple beam antenna system may be constructed for reducing a spillover loss n efficiency, improving beam crossover, and reducing undesired sidelobes by the addition of three dielectric lenses between a feed horn cluster connected to a beam forming network and an objective collimator. The system includes a beam forming network including a plurality of feed horns in a feed horn cluster, an objective, and an imaging lens having a lateral magnification less than unity for focusing a reduced image of the feed horn cluster at a predetermined point in space. A field lens is positioned at that predetermined point in space, and an amplitude shaping lens is positioned between the field lens and the objective. The amplitude shaping lens redirects the rays of the image transmitted by the field lens to be denser in the central region of the objective, and reduce the sidelobes of the far field pattern of the transmitted beams.

Abstract: An apparatus for housing a focal plane array includes a tubular metal stem for housing a cryostat inside of it, and a hollow conical metal housing having its narrow end brazed onto the end of the tubular metal stem. A ceramic electrical interconnection assembly is rigidly sealed onto the wide end of the housing, having embedded electrical connections for providing electrical connections between the interior and exterior of the assembly. A metal ring-shaped mounting structure is rigidly attached to the ceramic interconnection assembly. A ceramic coldplate is sealed over the other end of the rigid metal tube in the interior of the structure for holding the focal plane array. The rigidity of the structure provides a known positional relationship between the coldplate and the mounting ring, to facilitate positioning the focal plane array during dewar installation. A metal cap is sealed to the mounting ring to provide a reworkable, hermetic closure.

Abstract: A battery cell circuit provides a battery cell having a positive terminal and a negative terminal, and bypass circuitry for allowing current to flow around the battery cell should it fail open. The bypass circuitry includes a first plurality of diodes connected in series between the positive terminal and the negative terminal, with those diodes connected with their forward direction from the positive terminal to the negative terminal, to provide a path for charging current around an open circuit battery cell. Two series sets of parallel diodes are connected between the negative terminal and the positive terminal, with their forward direction from the negative terminal to the positive terminal to provide a bypass path for discharge current to flow around the battery cell in the event if fails open and the bypass circuitry is preferably packaged in a hermetically sealed hybrid module.

Abstract: A heat transfer hinge; a first rotor; a second rotor; a pivot means for pivotally coupling the first rotor to the second rotor, each rotor being free to pivot on a pivot axis passing between the first and second rotor; a means for thermally coupling a thermally conductive flat surface to the first rotor, the flat surface being positioned to be normal to the pivot axis; a means for thermally coupling a thermally conductive flat surface to the second rotor, the flat surface being positioned to be normal to the pivot axis; and, a means for holding the first rotor flat surface against the second rotor flat surface as the first rotor is pivoted on the pivot axis with respect to the second rotor.

Abstract: An improved method of forming metal contact bumps for infrared detector array includes depositing a thick layer of positive organic photoresist, and exposing the entire layer to light. A second, substantially thinner layer of photoresist is then applied, and exposed with a pattern of light corresponding to the contact bumps desired. The photoresist is developed to resolve the pattern in the top thin film, and the underlying thick resist is isotropically developed down to the substrate surface and under a portion of the remaining unexposed top layer. the metal to form the contact bumps is then deposited, preferably by evaporative deposition. The overhanging edges of the top layer of photoresist prevent continuous metal step coverage between the surface of the photoresist layer and the bumps formed on the substrate surface in the cavity. The remaining photoresist is then dissolved, and the metal deposited on the surface of the second layer is readily removed.

Abstract: A method of performing a liquid etching operation on a wafer surface includes placing the wafer into an etch container, filling the etch container with a liquid etch solution, retaining the etch solution in the etch container for a short predetermined length of time, releasing the etch solution from the etch container, and then repeating the above steps without replacing the wafer, to obtain a series of short etch cycles having collectively a predictable average etch rate.

Abstract: A method of digitizing an input analog current signal such as a demodulated servo position error signal in a disk file includes charging a capacitor with the input demodulated signal, and comparing the resulting capacitor voltage with a plurality of thresholds to produce a comparator output signal for each threshold exceeded by the capacitor voltage. The comparator output signals are sampled, and each sampling period a current corresponding to the thresholds exceeded is generated. The generated current is used to draw off charge from the capacitor until an equilibrium voltage is reached. By knowing the current generated to remove from the capacitor the voltage placed thereon by the input current signal, then the total charge applied to the capacitor can be determined. Further digital processing of the input signal value may be done without the use of a complicated digital to analog converter.

Abstract: A frequency-domain Fast Fourier Transform windowing device includes a plurality of input lines, each of which is coupled to a corresponding frequency bin output line of an FFT; and a memory. The memory includes address input ports connected to the input lines and an output line. The memory reads out onto the output line values read out from the locations in the memory corresponding to signals received at the address input ports. The memory has stored in it values corresponding to the coneolution of samples on several of the input lines and the corresponding predetermined weighting coefficients.

Abstract: An apparatus for measuring the thickness of a coating on a work piece includes a table for receiving and positioning the coated work piece and beta-ray backscatter measuring instrument for determining the thickness of the coating on the work piece. An air gauge measures accurately the position of the surface of the work piece and causes the measuring detector instrument to be positioned a predetermined distance above the surface of the work piece. The air gauge includes an orifice having a known positional relationship with respect to the beta-ray measuring instrument. The air gauge positions the orifice a known distance above a particular location on the surface of the work piece. The apparatus then positions the beta-ray measuring instrument over that particular location on the work piece, at the predetermined distance above the surface.