Abstract: A magnetic rotary thermal joint for operation in deep space, vacuum environments, the joint comprising a first rotor having a first thermal surface; a second rotor having a second thermal surface; bearing means for rotationally coupling the first rotor to the second rotor, each the rotor being free to rotate in fixed coaxial alignment with respect to the other rotor; and magnetic means for providing a thermal path from the first thermal surface to the second thermal surface. Heat is carried to the first rotary thermal joint through a heat pipe and heat is carried away from the second thermal joint with a heat pipe.

Abstract: A high-speed algorithmic successive approximation analog to digital converter includes a system input terminal, and a tri-state comparator having an input terminal connected to the signal sampler. The comparator produces a first indication of a signal on its input terminal exceeds an upper reference voltage and the comparator produces a second indication if a signal on its input terminal exceeds the lower reference voltage, and does not exceed the upper reference voltage. A subtractor is connected to the system input terminal and to the comparator for subtracting from a received signal a first value corresponding to the upper reference voltage if the comparator produces the first indication, or a second value corresponding to the lower reference voltage if the comparator produces the second indication.

Abstract: A charge based analog to digital converter includes a plurality of charge storage elements, each having a charge receive mode and a charge expel mode, and were in each of the charge storage elements is configured for storing a predetermined amount of charge. There is preferably a two to one ratio between the storage capacity of adjacent charge storage elements. A comparator includes a sensing diffusion connected to all of the charge storage elements. The comparator produces a "0" bit if the sensing diffusion is in a first condition, and a "1" bit if the sensing diffusion is in a second condition. Selection electronics connected to the charge storage elements selectively and successively set the individual charge storage elements in the charge expel mode to successively test the charge quantity stored in each charge storage element by the initial analog charge packet.

Abstract: There is disclosed an improved electromechanical resonator for use in multiresonator mechanical bandpass filters. The resonator is constructed using two resonator rods attached to a ceramic transducer which is substantially centrally located. The thus-formed electromechanical resonator resonates at the desired frequency in the third torsional mode, which is characterized by three motional nodes. Support pins are attached at the two outer nodes to provide physical support, and are also used for signal and ground connections, while the ceramic is positioned on or near the center node, which maximizes the achievable electromechanical coupling. Multiresonator mechanical bandpass filters which use such third-mode electromechanical resonators in conjunction with second-mode interior resonators have improved spurious rejection.

Abstract: This invention enables easy and fast selection of candidates for an inputted character image among the character categories by search of a tree-structured dictionary. Each ordinary node of the tree structure has three branches, that is two ordinary nodes and one reject node, and compares the multivalued feature extracted from the inputted character image for the node concerned, with a threshold, upper limit and lower limit values. If the feature value is out of the limited range, the search goes down to the reject node at the next level. If not, the search goes down to the right or left node at the next level based on the comparison of the feature value with the threshold value. Reject nodes have no branch. The tree structure has character category information as leaves connected to the bottom ordinary nodes and another character category information for all the reject nodes.

Abstract: A digital circuit includes two digital signal sources, each having an output terminal connected to corresponding bus portions. Logic connects the two bus portions for propagating a signal pulse on one of the bus portions onto the other of the bus portion, and produces a digital indication signal signifying which of the signal sources generated the signal pulse. The logic includes logic gates, each having a first input connected to its corresponding bus portion, an output terminal connected to the indicator output, and a second input terminal connected to the output terminal of the opposite logic gate. The output of each logic gate also controls the connection of the other bus portion to a voltage source to bring that bus portion to the active state in response to the other bus portion being rendered active by its associated signal source.

Abstract: An FFT building block useful in building FFT arrays includes a discrete-Fourier-transform device (DFT) having a plurality of DFT input lines, and a plurality of multipliers. Each multiplier has a multiplier-input line and a multiplier-output line. The multiplier-output line of each multiplier is connected to a corresponding DFT input line. Each multiplier implements distributed arithmetic to produce at the multiplier output a value corresponding to a combination of a value on the multiplier-input line and a predetermined multiplier coefficient.

Abstract: A three-dimensional focal plane array with accurate X, Y, and Z positioning of the connector leads and uniform thermal expansion characteristics may be constructed by forming a plurality of silicon dies, each having a silicon front face and a dielectric layer on the back face thereof. Each die has gold ribbon leads bonded to its silicon face, with the leads extending beyond the edge of the die. A ceramic spacer having a thickness substantially equal to the thickness of the die is placed adjacent an edge of the die, with the gold leads also bonded to the ceramic spacer. The ceramic spacers are formed of an electrically nonconductive material having a relatively low coefficient of thermal expansion, preferably substantially the same as the coefficient of thermal expansion for silicon. Epoxy is applied to the silicon face of the die and the dies are stacked and aligned so that the silicon face of one die is bonded with the epoxy to the dielectric face of the adjacent die.

Abstract: A method of automatically detecting and analyzing exception events occurring in a computer peripheral subsystem connected to a host computer system includes maintaining a Subsystem Environment data base comprising information relating to the current configuration of the computer peripheral subsystem, and usage and error information relating to the peripheral subsystem. A Problem Description procedure is conditionally invoked when the data in the Subsystem Environment data base reflects an exception event that indicates either a clear or a probable need for service attention to the peripheral subsystem. The Problem Description procedure includes creating from stored rules a view of the Subsystem Environment data base relevant to the exception event, and developing a Problem Profile (record) describing the exception event. The Problem Profile record is compared to the Problem Profile data base to determine if the current exception event relates to a problem already recorded in the data base.

Abstract: A CMOS differential driver includes a differential amplifier with two input terminals. Complementary transfer gates selectively connect high and low voltage input terminals to the amplifier input terminals. The complementary transfer gates are controlled by identical logic input signals to provide exactly complementary voltage inputs to the differential amplifier circuit, so true complementary output signals are provided at the amplifier output terminals.

Abstract: A nonlinear adaptive filter has an input and an output, and includes an adjustable linear filter and nonlinear filter connected serially between the input and output. The parameters for the adjustable linear filter are derived from signals on the adaptive filter output and from signals on the adaptive filter input. Preferably, the adjustable linear filter is coupled between the adaptive filter input and the nonlinear filter. A parameter computer for adjusting the parameters of the adjustable linear filter includes an input coupled to the output of the nonlinear filter, a processor for processing a signal received from the output of the nonlinear filter, and apparatus for applying the processed output signal to the parameters of the adjustable linear filter. A linear filter for shaping the spectrum of a signal received from the output of the nonlinear filter is preferably coupled between the nonlinear filter output and the parameter computer.

Abstract: The method and apparatus disclosed for more efficient use of the bandwidth of a communication channel includes steps of generating a single sideband signal, including inputting a digital signal into an N-tap Hilbert transform filter, modulating the output of the ((N-1)/2)th tap of the filter onto a first carrier signal, and modulating the output of the Nth tap of the filter onto a second carrier signal. The second carrier signal has the same frequency as, and is separated by 90 degrees in phase from, the first carrier signal. The modulated first and second carrier signals are combined to produce a single sideband signal. A second signal is similarly processed to produce a second single sideband signal. The two single sideband signals may be combined on a single output line.

Abstract: A simplified CMOS toggle flip-flop includes a flip-flop that has an input and an output, and a toggle circuit that includes an inverter having an input connected to the flip-flop output, a transfer switch connected between the inverter output and the flip-flop input, and a toggle control responsive to an input toggle signal for closing the transfer switch to connect the inverter output to the flip-flop input to transfer the inverted flip-flop output state to the flip-flop input. The transfer switch may include an NFET having its conduction path connected between the inverter output and the flip-flop input, and having a control gate. The toggle control may include a NAND gate having a first input for receiving a toggle pulse and a second input for receiving a timing pulse, and having an output. A second inverter has an input connected to the NAND gate output and an output connected to the NFET control gate of the transfer switch.

Abstract: A digital image interface system converts digital image information from a first format to a second format. The interface system includes a data input line for receiving input data, which may include a plurality of frames and fields of digital image information in a first format. An image buffer memory comprising first and second buffers is connected to the input line for storing the input digital image information. Each buffer is sufficient for storing one of the fields or frames of digital image information. A data output line is connected to the buffers for outputting the digital image information from the memory. A controller includes programmable logic arrays programmed according to the first data format, the second data format, and a predetermined memory format.

Abstract: In a centrally controlled resource arbitration system, each of the units concurrently requesting access sends its identity code and the binary complement thereof to a central arbitration processor. The identity codes are logically combined into a first word, and the binary complements are logically combined into a second word. A subset identifier of the requesting units is then formed by combining corresponding bits of the first and second words. Unresolved values in the subset identifier are iteratively removed to eliminate a subset of the requesting units. When all but one of the requesting units have been eliminated, access to the resource is given to the remaining unit.

Abstract: A circuit for charging a capacitive load such as a data or address bus in a VLSI circuit includes a voltage source input, a PFET switch connected between the voltage source input and the capacitive load or bus, and a voltage regulator connected to the capacitive load and to the gate of the PFET switch to cause the switch to conduct during a predetermined time only if the voltage on the capacitive load is less than a predetermined voltage, and to disconnect the capacitive load from the voltage source input when the voltage on the capacitive load reaches or exceeds that predetermined voltage level. The voltage regulator may include a first inverter having its input connected to the bus and a second inverter having an input connected to the output of the first inverter and having an output connected to the control input of the switch. The first inverter is constructed to output a low level when the voltage on the first inverter input is at or above the designated predetermined voltage.

Abstract: A communications system includes self synchronizing device sets such as telephones that are interconnected by wiring to allow communication between the devices and communication with an outside communication line, such as a subscriber telephone line provided by a central telephone company. Each individual device includes access circuitry for placing signals on the interconnecting wires so that the signals from the various devices are time division multiplexed on the same wire conductors. The individual communication sets are synchronized without the intervention of a central controller. Each set is assigned a unique identification code. Each set then listens for the identification codes placed on the interconnection wiring by the other sets and places its signal on the wiring at the proper time in response to the other detected identification codes.

Abstract: An apparatus for testing an array of infrared detectors includes a number of optical switches, each of which is individually addressable with light to change its electrical characteristics. Each of the optical switches has a first side and a second side. The first side of each optical switch is adapted to receive a detector of the infrared detector array to be tested. The apparatus also includes an electrode coupled to the second side of each optical switch. Further, the apparatus includes a detector circuit coupled to the electrode and to a probe adapted to be coupled to the infrared detector array for detecting changes in the electrical characteristics of the optical switches and the infrared detector elements in response to light addressing the individual test elements.

Abstract: A frequency multiplexed system for coupling a plurality of individual telephone sets to at least one subscriber telephone line. The system includes a line adapter unit for controlling use of subscriber lines and for assigning the use of frequency bands to the individual telephone sets. The system includes a two-conductor interconnection cable for coupling to each of the telephone sets and to the line adapter unit. The system has a power-down mode in which the loss of external power allows each of the individual telephone sets to use the subscriber line. The line adapter unit and each of the individual telephone sets employ transconductance amplifiers so that modulated current signals are produced on the interconnection cable, thus allowing a plurality of voice signals to be summed together by voltage addition for conferencing between the telephone sets and the subscriber lines.

Abstract: A digital signal synchronization system including a digital signal source for supplying an input digital signal, and a plurality of substantially identical integrating circuits, each connected to the digital signal source for integrating the signal for a predetermined time. A plurality of clock sources are also provided, each connected to a corresponding one of the integrating circuits, so that each integrating circuit begins integrating the digital signal at a different time. Decision circuits are connected to the output of each of the integrating circuits for electing one of the integrating circuits according to a predetermined criteria.