Abstract: In a memory that is programmable page by page and each page having multiple sectors that are once-programmable, even if successive writes are sequential, the data recorded to an update block may be fragmented and non-sequential. Instead of recording update data to an update block, the data is being recorded in at least two interleaving streams. When a full page of data is available, it is recorded to the update block. Otherwise, it is temporarily recorded to the scratch pad block until a full page of data becomes available to be transferred to the update block. Preferably, a pipeline operation allows the recording to the update block to be set up as soon as the host write command indicates a full page could be written. If the actual write data is incomplete due to interruptions, the setup will be canceled and recording is made to the scratch pad block instead.
Type:
Grant
Filed:
August 11, 2008
Date of Patent:
April 3, 2012
Assignee:
SanDisk Technologies Inc.
Inventors:
Peter John Smith, Sergey Anatolievich Gorobets, Alan David Bennett
Abstract: A bike trainer operable by a user for stationary riding when a conventional bicycle is coupled thereto. The bike trainer may be used by removing the rear wheel of the bicycle and selectively coupling the rear dropouts of the bicycle to an axle of the bike trainer. The bike trainer is operative to simulate the “feel” of riding a moving bicycle by providing resistance and inertia similar to that of a bicycle when used normally. To provide these features, the bike trainer includes a fan/flywheel as well as a freewheel mechanism. The bike trainer also includes features that permit simple coupling and decoupling to the bicycle using a “quick release skewer,” which allows users to easily use the bike trainer without required a substantial amount of time. The bike trainer also includes a base configured to support a user of the bike trainer in a fashion such that the user is sturdily supported during use.
Type:
Grant
Filed:
May 21, 2010
Date of Patent:
April 3, 2012
Assignee:
Lemond Fitness, Inc.
Inventors:
Robert J. Bingham, Ryan P. Selby, Neil P. Everson
Abstract: Particular aspects provide nucleic acid amplification and detection methods comprising: providing a reaction mixture containing a target nucleic acid with an amplifiable target sequence, forward and reverse external nick-directing primers (ND-primers), at least one internal ND-primer, a strand-displacing DNA polymerase, a nick-directing endonuclease for strand-specific cleavage of ND-primer-extension products, and deoxynucleoside 5?-triphosphates; and incubating the reaction mixture with reagents, and under conditions suitable to provide for amplification of the amplifiable target sequence, wherein the amplification comprises primer extension, by least one internal ND-primer, of an external ND-primer extension product comprising the amplifiable target sequence or a portion thereof but lacking the respective external ND-primer sequence or a portion thereof.
Abstract: A memory system and methods of its operation are presented. The memory system includes a volatile buffer memory and a non-volatile memory circuit, where the non-volatile memory circuit has a first section, where data is stored in a binary format, and a second section, where data is stored in a multi-state format. When writing data to the non-volatile memory, the data is received from a host, stored in the buffer memory, transferred from the buffer memory to into read/write registers of the non-volatile memory circuit, and then written from the read/write registers to the first section of the non-volatile memory circuit using a binary write operation.
Type:
Grant
Filed:
December 18, 2009
Date of Patent:
March 27, 2012
Assignee:
SanDisk Technologies Inc.
Inventors:
Jianmin Huang, Chris Avila, Lee M. Gavens, Neil David Hutchinson, Sergey Anatolievich Gorobets
Abstract: Improved methods and systems for inspection imaging for holographic or interferometric semiconductor test and evaluation through all phases of manufacture. Specifically, systems and methods are disclosed for extending the range of optical holographic interferometric inspection for evaluating microelectronic devices and determining the interplay of electromagnetic signals and dynamic stresses to the semiconductor material are provided in which an enhanced imaging method provides continuous and varying of the magnification of the optical holographic interferometric images over a plurality of interleaved optical pathways and imaging devices. Analysis of one or more holographic interference patterns displays internal and external stresses and the various effects of such stresses upon the operating characteristics of features within the features, interior structures, or internal surfaces of the semiconductor material or wafer under test.
Abstract: The present disclosure provides methods for producing a vaccine composition containing a pathogen that is rendered noninfectious by exposure to hydrogen peroxide. The methods disclosed herein are suitable for the preparation of vaccines for a wide variety of pathogens, including viruses, bacteria and parasites. The disclosure also provides vaccine compositions (medicaments) containing a pathogen inactivated by exposure to hydrogen peroxide. Methods for eliciting an immune response in a subject by administering vaccine compositions containing a hydrogen peroxide inactivated pathogen are also provided.
Type:
Grant
Filed:
August 7, 2006
Date of Patent:
February 28, 2012
Assignee:
Oregon Health & Science University
Inventors:
Mark K. Slifka, Shirley V. Carter, Erika Hammarlund, Paul Yoshihara
Abstract: A memory system includes an array of solid state memory devices which are in communication with and under the control of a controller module via a device bus with very few lines. This forms an integrated-circuit mass storage system which is contemplated to replace a mass storage system such as a disk drive memory in a computer system. Command, address and data information are serialized into component strings and multiplexed before being transferred between the controller module and the array of memory devices. The serialized information are is accompanied by a control signal to help sort out the multiplexed components. Each memory device in the array is mounted on a multi-bit mount and assigned an array address by it an array mount. An A memory device is selected by an appropriate address broadcast over the device bus, without requiring the usual dedicated select signal. A reserved array particular mount multi-bit configuration is used to unconditionally select the device mounted thereon.
Type:
Grant
Filed:
November 16, 2009
Date of Patent:
February 28, 2012
Assignee:
SanDisk Technologies Inc.
Inventors:
Karl M. J. Lofgren, Jeffrey Donald Stai, Anil Gupta, Robert D. Norman, Sanjay Mehrotra
Abstract: A nebulizer and a method of breathing using the nebulizer is described. The nebulizer and breathing techniques are capable of delivering medicament into the sinus cavity of a user.
Abstract: A subscriber management system for a communication system having a radio access network coupled to by a gateway node to a packet switched network. The system consolidates three prior art subscriber management system components, a DPI device, a QoS Policy Manager 40, and an Application Manager 28, into a DPI platform. The system also relocates functions to the DPI platform that were previously provided by the gateway node in prior art networks. Specifically, an Accounting Client 34, a Hotlining function 36, and a QoS SFA function 44 are located to the DPI platform. By consolidating network components and relocating functions to the DPI platform, the number of control interfaces in the network can be reduced. Further, network components produced by different vendors may be integrated more easily. A method of implementing hotlining in the system is also provided.
Type:
Grant
Filed:
August 5, 2008
Date of Patent:
February 28, 2012
Assignee:
Clearwire Corporation
Inventors:
Peter Gelbman, Jeffrey Sewell, Mark Winter
Abstract: A cable management patch panel system having one or more vertical ducting enclosures and typically located in an equipment rack. The vertical ducting enclosure is integral with the patch panel system and allows for vertical routing of cables connected to the patch panel system. The cables are vertically routed by the ducting enclosure to other patch panels or equipment located along with the patch panel system in a commonly shared equipment rack or located beyond the equipment rack.
Type:
Grant
Filed:
October 1, 2008
Date of Patent:
February 21, 2012
Assignee:
Leviton Manufacturing Co., Inc.
Inventors:
William D. Regester, Frank Chin-Hwan Kim, Ross Goldman
Abstract: Apolipoprotein A-I (ApoA-I), preferably a variant form such as Apolipoprotein A-I Milano (ApoA-IM), alone or more preferably in combination with a lipid carrier such as phospholipids or other drug, can be administered locally before or during bypass surgery on diseased coronary, peripheral, and cerebral arteries, surgery to implant grafts or transplanted organs, or angioplasty, or to stabilize unstable plaques. In an alternative embodiment, the apolipoprotein is not provided directly, but the gene encoding the apolipoprotein is provided. The gene is introduced into the blood vessel in a manner similar to that used for the protein, where the protein is then expressed. The technique can also be used for delivery of genes for treatment or prevention or restenosis or other cardiovascular diseases.
Type:
Grant
Filed:
September 27, 2002
Date of Patent:
February 21, 2012
Assignees:
Cedars-Sinai Medical Center, Esperion Therapeutics, Inc
Inventors:
Charles L. Bisgaier, Prediman Krishan Shah, Sanjay Kaul
Abstract: A transmission line slot antenna is described. Although more generally applicable, the antenna is particularly adapted to conformal applications. The antenna has a ground plate with a conductive top surface having a slot with a feed whose ground reference terminal is connected to one side of the slot and whose signal terminal is connected to the other side of the slot. A conductive cylindrical screen, which can be of an arbitrary cross section and non-uniform in the longitudinal direction, is formed of one or more sections attached along the bottom surface of the ground plate, with each of the sections having a first and second edge conductively connected to the top surface of the ground plate along opposite sides of the slot. The antenna is tuned to support the fundamental mode (H00) of a slotted cylinder transmission line formed by the screen sections and a part of the ground plate with the slot.
Abstract: The present invention presents techniques for the linking of physical blocks of a non-volatile memory into composite logical structures or “metablocks”. After determining an initial linking of good physical blocks into metablocks, a record of the linking is maintained in the non-volatile memory where it can be readily accessed when needed. In one set of embodiments, the initially linking is deterministically formed according to an algorithm and can be optimized according to the pattern of any bad blocks in the memory. As additional bad blocks arise, the linking is updated using by replacing the bad blocks in a linking with good blocks, preferably in the same sub-array of the memory as the block that they are replacing.
Type:
Grant
Filed:
April 11, 2011
Date of Patent:
February 14, 2012
Assignee:
SanDisk Technologies Inc.
Inventors:
Carlos J. Gonzalez, Alan Douglas Bryce, Sergey Anatolievich Gorobets, Alan David Bennett
Abstract: A non-volatile memory system of a type having blocks of memory cells erased together and which are programmable from an erased state in units of a large number of pages per block. If the data of only a few pages of a block are to be updated, the updated pages are written into another block provided for this purpose. The valid original and updated data are then combined at a later time, when doing so does not impact on the performance of the memory. If the data of a large number of pages of a block are to be updated, however, the updated pages are written into an unused erased block and the unchanged pages are also written to the same unused block. By handling the updating of a few pages differently, memory performance is improved when small updates are being made.