Patents Represented by Attorney Derek S. Jennings
  • Patent number: 6734937
    Abstract: An ECB-type vertically aligned liquid crystal device includes liquid crystal molecules each having a negative dielectric anisotropy and polyimide films for homogeneous alignment. In a process for manufacturing the liquid crystal device, the liquid crystal molecules are vertically oriented by exposing the liquid crystal molecules to light from either or both sides of substrates of the liquid crystal device. In addition, an aligner used for exposure is equipped with a filter so as to cut light having wavelengths of 400 nm or less and 600 nm or more, so that light having a wavelength of 400 to 600 nm can be utilized In this liquid crystal device, the response time becomes faster when a voltage is applied between electrodes.
    Type: Grant
    Filed: January 25, 2001
    Date of Patent: May 11, 2004
    Assignee: International Business Machines Corporation
    Inventors: Teruhiro Nakasogi, Tetsuya Nogami, Kohji Murayama
  • Patent number: 6724445
    Abstract: A frame is disclosed for retaining an LCD panel with a liquid crystal material interposed between two glass substrates disposed so as to face each other. The frame has a frame body for placing the panel, an arm oscillatably attached in a planar direction to the frame body, and a stopper formed at the arm so as to be protruded from the frame body and restrict the movement of the planar member in a planar direction.
    Type: Grant
    Filed: February 16, 2001
    Date of Patent: April 20, 2004
    Assignee: International Business Machines Corporation
    Inventor: Yoshifumi Natsuyama
  • Patent number: 6721858
    Abstract: A method and system for the parallel implementation of protocol engines based on memory partitioning. The method comprises the steps of partitioning a shared memory space into multiple mon-overlapping regions; and for each of the regions, using a respective one protocol engine to handle references to the region, independently of the other protocol engines. Preferably, the memory is partitioned into the non-overlapping regions either by using address interleaving or by using address range registers to identify address ranges for said regions. Also, preferably the protocol engines operate independent of each other and handle accesses to the memory regions in parallel.
    Type: Grant
    Filed: August 24, 2000
    Date of Patent: April 13, 2004
    Assignee: International Business Machines Corporation
    Inventors: Douglas J. Joseph, Maged M. Michael, Ashwini Nanda
  • Patent number: 6720982
    Abstract: The present invention invalidates the operator's input which interferes with the normal operation of an application. More particularly, a transparent window 110 is previously generated behind an application 120 for which an operator's misoperation can occur. And, upon the detection of a predetermined operation having occurred on the application 120, the operator's misoperation such as double clicking is invalidated by outputting the transparent window 110 in front of the application 120.
    Type: Grant
    Filed: January 7, 2000
    Date of Patent: April 13, 2004
    Assignee: International Business Machines Corporation
    Inventor: Akira Sakaguchi
  • Patent number: 6711606
    Abstract: The present invention relates to a method of increasing the availability of an application executed by a computer system. More particularly, the invention relates to a method of increasing the availability of an application executed by one or more application clients and a multitude of application servers executing the same application. The fundamental teaching comprises a multi-casting step wherein an application client is requesting execution of an application service by sending an identical application service request to a collection of N out of M application servers with 1<N≦M in parallel. Within an application server, preceding the application service execution step, an “only-once” determination step is suggested, for determining whether an application service request must not be executed more than once without jeopardizing application consistency. For such a case the taught method provides “only-once” execution behavior.
    Type: Grant
    Filed: June 14, 1999
    Date of Patent: March 23, 2004
    Assignee: International Business Machines Corporation
    Inventors: Frank Leymann, Dieter Roller
  • Patent number: 6710910
    Abstract: An optical amplitude demodulator for demodulating signals received from a fiber optic link. The demodulator comprises a plurality of optical sensors for detecting optical output from the fiber optic link, whereby each of the optical sensors has a different detection threshold. Generally, the plurality of optical sensors produce a plurality of digital outputs corresponding to the optical output level detected. A priority encoder encodes the digital outputs into a multi-bit digital signal. Additionally, each of the plurality of optical sensors has an associated optical filter, whereby each of the filters has a different level of opaqueness. Each filter filters received optical output prior to detection by the associated optical sensor.
    Type: Grant
    Filed: August 30, 2001
    Date of Patent: March 23, 2004
    Assignee: International Business Machines Corporation
    Inventors: Tom Crummey, Richard John Fergusson
  • Patent number: 6707023
    Abstract: A photoelectric receiver circuit for converting an optical signal to an electrical signal, includes first and second transimpedance amplifiers, a photodiode having a first end connected to an inverting input of the first transimpedance amplifier and a second end connected to an inverting input of the second transimpedance amplifier, and a differential amplifier having inputs AC coupled to outputs of the first and second transimpedance amplifiers. Such that when higher and lower voltages are respectively applied to the non-inverting inputs of the first and second transimpedance amplifiers, a substantially constant bias voltage is maintained on the photodiode.
    Type: Grant
    Filed: June 6, 2001
    Date of Patent: March 16, 2004
    Assignee: International Business Machines Corporation
    Inventors: Kai D. Fong, Lee F. Hartley
  • Patent number: 6707513
    Abstract: An active matrix substrate includes a gate electrode, a gate insulating film, a semiconductor layer, a source electrode and a drain electrode, which are sequentially deposited on an insulating substrate. A transparent conductive layer is deposited on the source and drain electrodes so that the transparent conductive layer includes a portion deposited to be substantially the same pattern as those of the source and drain electrodes. The transparent conductive layer is connected to either the source electrode or the drain electrode to form a pixel electrode. A gate line is further included on which the gate insulating film is deposited. The gate line is to be connected to the gate electrode.
    Type: Grant
    Filed: July 6, 2001
    Date of Patent: March 16, 2004
    Assignee: International Business Machines Corporation
    Inventors: Takatoshi Tsujimura, Osamu Tokuhiro, Kohichi Miwa, Mitsuo Morooka
  • Patent number: 6680742
    Abstract: An image display system includes a host side for executing an application and transmitting image data having a P dot width in a block unit with the number of m dots as the width of the block. A panel side is connected through a digital I/F line to the host side, which converts the image data having a P dot width by using magnification to produce data having an R dot width and then displays the image data. The panel side executes scaling by using a block having an integral value obtained by a R×m/P set as a dot width and a block having a dot width of an added integral value obtained by adding 1 to the integral value, and converts by magnification the image data received from the host side in block unit based on the executed scaling and displays the image data on a panel.
    Type: Grant
    Filed: October 4, 2001
    Date of Patent: January 20, 2004
    Assignee: International Business Machines Corporation
    Inventors: Johji Mamiya, Yoh Sugiuchi, Kazushi Yamauchi
  • Patent number: 6665809
    Abstract: The basic idea comprised of the present invention is to decentralize the generation of time information without suffering from the cost disadvantages expectable due to use of prior art techniques necessary for synchronizing and correcting a plurality instead of only one or two of time suppliers caused by said decentralization. This is achieved by the approach not to readjust the oscillator(s), but, instead, to accept the inaccuracy of the physical device ‘oscillator’ but to measure its inaccuracy and to correct it with the aid of a continuos correction calculation which is advantageously done in a digital way under usage of ETS input information and system oscillator output information.
    Type: Grant
    Filed: May 17, 2000
    Date of Patent: December 16, 2003
    Assignee: International Business Machines Corporation
    Inventors: Gottfried Andreas Goldrian, Thomas Anthony Gregg
  • Patent number: 6664968
    Abstract: The monitor system comprises the display device which has a screen having a display area virtually divided into a plurality of sub-screens. Provided are graphics adapters, each of which has two frame buffers, so as to correspond to the sub-screens of the display device.
    Type: Grant
    Filed: January 3, 2001
    Date of Patent: December 16, 2003
    Assignee: International Business Machines Corporation
    Inventor: Makoto Ono
  • Patent number: 6665787
    Abstract: A computing system and method employing a processor device for generating real addresses associated with memory locations of a real memory system for reading and writing of data thereto, the system comprising: a plurality of memory blocks in the real memory system for storing data, a physical memory storage for storing the pages of data comprising one or more real memory blocks, each real memory block partitioned into one or more sectors, each comprising contiguous bytes of physical memory; a translation table structure in the physical memory storage having entries for associating a real address with sectors of the physical memory, each translation table entry including one or more pointers for pointing to a corresponding sector in its associated real memory block, the table accessed for storing data in one or more allocated sectors for memory read and write operations initiated by the processor; and, a control device for directly manipulating entries in the translation table structure for performing page ope
    Type: Grant
    Filed: February 28, 2001
    Date of Patent: December 16, 2003
    Assignee: International Business Machines Corporation
    Inventors: Peter A. Franaszek, Charles O. Schulz, T. Basil Smith, III, Robert B. Tremaine, Michael Wazlowski
  • Patent number: 6661413
    Abstract: An LCD module includes liquid crystal cells forming a image display area on a substrate, a plurality of driver LSIs mounted on the substrate for applying voltages to the liquid crystal cells, and a wiring structure formed on the substrate for supplying a voltage to the plurality of driver LSIs. The wiring structure supplies the voltage to the plurality of driver LSIs, with the wiring resistance gradually changing from a voltage supply point.
    Type: Grant
    Filed: March 27, 2001
    Date of Patent: December 9, 2003
    Assignee: International Business Machines Corporation
    Inventor: Yoshitami Sakaguchi
  • Patent number: 6661481
    Abstract: A display panel complex includes a plurality of image display panels arranged on the same plane and a joint for joining adjacent image display panels to each other among the plurality of image display panels. The joint is made of opaque particles having an opaqueness and an adhesive resin for dispersing and holding the opaque particles.
    Type: Grant
    Filed: February 28, 2001
    Date of Patent: December 9, 2003
    Assignee: International Business Machines Corporation
    Inventor: Shunji Suzuki
  • Patent number: 6661367
    Abstract: A signal processor includes a unit for forming designated groups from radar reflection signals, a memory unit for storing the designated groups of radar reflection signals individually, a first calculator for calculating a standard background signal SB from each of the designated groups of radar reflection signals stored individually. The signal processor further includes a second calculator for calculating differential signals between the individual radar reflection signals and the standard background signal SB separately for each of the designated groups and a unit for identifying the signal reflected from a search object out of the differential signal.
    Type: Grant
    Filed: March 14, 2002
    Date of Patent: December 9, 2003
    Assignee: International Business Machines Corporation
    Inventors: Kentaro Sugiyama, Atsushi Abe
  • Patent number: 6653983
    Abstract: An aperture antenna is provided so that it is capable of matching with a standardized coaxial cable without employing any matching circuit. The aperture antenna includes a first flat electric conductor 2a with an aperture in which a second aperture length in a second direction perpendicular to a first direction is greater than a first aperture length in the first direction. A second electric conductor, spaced from the first electric conductor is disposed inside the aperture in practically the same plane with the first electric conductor. Further included is a non-balance type transmission line.
    Type: Grant
    Filed: October 3, 2001
    Date of Patent: November 25, 2003
    Assignee: International Business Machines Corporation
    Inventors: Kazuo Masuda, Akihisa Sakurai
  • Patent number: 6636279
    Abstract: A Thin Film Transistor (TFT) array substrate has a dummy signal line as a short circuit wiring for preventing a short circuit due to electrostatic breakdown between a signal line as an upper layer wiring and a gate line as a lower wiring. The dummy signal line is formed on an outer peripheral area of the TFT array substrate. This dummy signal line has a three-layer structure of a silicon lower layer, an Indium Tin Oxide (ITO) intermediate layer and an aluminum (Al) upper layer, enumerated from the lower layer. Although the silicon layer is formed as one consecutive wiring during formation thereof, the silicon layer is etched simultaneously with the Al layer when the Al layer is subjected to pattern forming, and is electrically disconnected between the gate lines. Since the dummy wiring is disconnected after its formation, a short circuit does not occur between the gate lines even in the case where the dummy wiring and two or more of the gate lines are short-circuited with each other.
    Type: Grant
    Filed: July 20, 2001
    Date of Patent: October 21, 2003
    Assignee: International Business Machines Corporation
    Inventors: Shinji Takasugi, Hideo Iiyori
  • Patent number: 6633991
    Abstract: A system and method for observing the two clocking phase signals, finding a point in time when said signals have a phase coincidence which is good enough for fulfilling a phase difference requirement (e.g. 20 ps), and switching from one clock source to the other. The essential idea is not to compare the phases directly but to generate an auxiliary signal out of the two clock signals which is easier to handle in order to find that desired point in time and which reflects all desired properties of the time dependent phase shift between said clock signals. At a predetermined location in the cycle of both clock signals (e.g. its positive transition) a pulse is generated out of each of the clock signals with matched identical delay elements located very close to each other on the same chip for both signals. As they match they produce exactly the same pulse widths. The absolute length of the pulse width is of minor relevance as long as the length of the pulses is the same within close limits.
    Type: Grant
    Filed: May 17, 2000
    Date of Patent: October 14, 2003
    Assignee: International Business Machines Corporation
    Inventor: Gottfried Andreas Goldrian
  • Patent number: 6628615
    Abstract: A system and method for communicating messages between nodes of a packet switched communications network, with each message having a defined message type and including message content.
    Type: Grant
    Filed: January 18, 2000
    Date of Patent: September 30, 2003
    Assignee: International Business Machines Corporation
    Inventors: Douglas J. Joseph, Maged M. Michael, Ashwini Nanda
  • Patent number: 6628452
    Abstract: An optical device comprises a substrate having a plane surface. An optical path is disposed on the substrate and extends in a plane parallel to the surface of the substrate. A recess intercepts the optical path. An optical element is provided for modifying light incident thereon. The optical element is moveable within the recess between a first position in which the optical element is located in the path and a second position in which optical element is remote from the path. A cantilever suspends the optical element for movement within the recess between the second and first positions in a direction normal to the surface of the substrate.
    Type: Grant
    Filed: September 5, 2001
    Date of Patent: September 30, 2003
    Assignee: International Business Machines Corporation
    Inventors: Walter Haeberle, Gian-Luca Bona, Gerd K. Binnig, Peter Vettiger