Patents Represented by Attorney Derek S. Jennings
  • Patent number: 6628198
    Abstract: Security system for preventing a personal computer (PC) including at least a location in the PC adapted to receive a PCMCIA card from being used by unauthorized people including an extractable card having a connection adapted to insert the extractable card into the location for receiving a PCMCIA card. Further included are a processor and a wireless transceiver for remotely transmitting alarm information relative to the PC. Still further included is a program stored in the memory of the PC for communicating with the processor in order to activate selected security functions.
    Type: Grant
    Filed: February 13, 2002
    Date of Patent: September 30, 2003
    Assignee: International Business Machines Corporation
    Inventors: Jacques Fieschi, Jean-Francois Le Pennec
  • Patent number: 6620186
    Abstract: An apparatus for testing the impedance of a medical lead connecting an implantable stimulation device to a nerve or a muscle. The implantable device is of the type comprising a capacitor for stimulating the nerve or the muscle. The system of the invention comprises a current generator for generating a testing current “I” during a calibrated testing pulse and a power circuit coupled to the capacitor and to the current generator for determining if the capacitor is charged by the testing current during the calibrated testing pulse.
    Type: Grant
    Filed: May 10, 2001
    Date of Patent: September 16, 2003
    Assignee: International Business Machines Corporation
    Inventors: Remy Saphon, Gerard Taroni, Christophe Degardin
  • Patent number: 6611307
    Abstract: A liquid crystal display includes an alignment film having first alignment subdomains with a first alignment property and second alignment subdomains with a second alignment property different from the first one. In the alignment film, the first alignment subdomains and the second alignment subdomains are arranged in a matrix so that both of them are included in every line extending across the matrix.
    Type: Grant
    Filed: April 12, 2001
    Date of Patent: August 26, 2003
    Assignee: International Business Machines Corporation
    Inventor: Hiroki Nakano
  • Patent number: 6606141
    Abstract: Disclosed is a manufacturing method of a liquid crystal display device that prevents luminance change in a sub-pixel where exposed portions overlap each other. A substrate is dividedly exposed in patterning a TFT array substrate of a liquid crystal display device. In an exposure process of using a resist, the substrate is divided into a plurality of divided regions. The portion subjected to a double exposure is set in a nonlinear manner within the sub-pixel. By providing such an arrangement, the portion subjected to double exposure is set so as not to overlap a storage capacitor or a signal line.
    Type: Grant
    Filed: September 20, 2001
    Date of Patent: August 12, 2003
    Assignee: International Business Machines Corporation
    Inventors: Shinji Takasugi, Mitsuru Ikezaki
  • Patent number: 6603708
    Abstract: An input object selector of a finger touch type that can, without any problem, be installed in a small space, such as an information terminal watch, and that provides a satisfactorily efficient process for selecting input objects.
    Type: Grant
    Filed: December 21, 2001
    Date of Patent: August 5, 2003
    Assignee: International Business Machines Corporation
    Inventors: Ken Tamagawa, Hiroshi Ishikawa
  • Patent number: 6600196
    Abstract: The present invention relates to minimizing a leakage current in a floating island portion formed in a thin film transistor. More specifically, the present invention is directed to a thin film transistor including: a source electrode 14 and a drain electrode 15 disposed above an insulating substrate 11 at a predetermined interval; an s-Si film 16 disposed in relation to the source electrode 14 and drain electrode 15; a gate insulating film 17 overlapping the a-Si film 16; and a gate electrode 18 overlapping the gate insulating film 17, in which the a-Si film 16 is disposed between the source electrode 14 and the drain electrode 15 and has a floating island portion 20 above which or beneath which the gate electrode 18 is not formed, and boron ions are implanted into this portion to form a boron-ion-implanted region 19.
    Type: Grant
    Filed: January 16, 2001
    Date of Patent: July 29, 2003
    Assignee: International Business Machines Corporation
    Inventors: Takatoshi Tsujimura, Osamu Tokuhiro, Mitsuo Morooka, Takashi Miyamoto
  • Patent number: 6597074
    Abstract: A backup power-source module that controls a backup power source for supplying power from a battery charged by an AC input to an electronic device when the AC input is cut off. The backup power-source module includes a selection which generates a selection signal for selecting power supplied by a battery when the electronic device is kept in an electrified state until the electronic device is shifted to a power cutoff state and there is no AC input. I.E., the selection signal causes the power supplied by the battery to be selected only when the electronic device is kept in a power cutoff state and there is no AC input.
    Type: Grant
    Filed: April 18, 2001
    Date of Patent: July 22, 2003
    Assignee: International Business Machines Corporation
    Inventors: Seiji Tsujikado, Takuya Kubo, Hisato Matsuo
  • Patent number: 6591214
    Abstract: A wrap test for a communication interface unit used for a computer, etc. When a wrap tool 40 is connected to a SCSI device 10, a signal (TEMPWR) is output from an output device 38 to SCSI connectors 22 and 24 through a Y-type cable 14, then wrapped in the wrap tool 40 and returned to a SCSI controller 12 through resistors 28 and 30 as a signal (PSCSIWRAP) to recognize the wrap tool 40. Because the non-grounded end of a resistor 26 is connected to an input terminal of the SCSI controller 12, the resistors 28 and 30 are connected in parallel. The potential of the signal (PSCSIWRAP) is stabilized by the resistors 26, 28 and 30. If a single wrap tool is connected to the SCSI device 10, the potential of the signal (PSCSIWRAP) is stabilized by the resistors 26 and 28 or 30.
    Type: Grant
    Filed: January 29, 2001
    Date of Patent: July 8, 2003
    Assignee: International Business Machines Corporation
    Inventors: Tsuyoshi Miyamura, Tomoaki Kimura
  • Patent number: 6587923
    Abstract: In a computer system having a processor, a memory system including multiple levels of caches L1, L2, . . . , Ln−1 and including main memory Ln, and in which the cache Li−1 includes lines of size s and the cache Li includes lines of size t with t>s, a dual line size cache directory mechanism, in which the contents of a cache Li−1 may be accessed at line size granularity s (in which case it is determined whether a line corresponding to a given memory address is stored in Li−1, and if so its location and status), and in which the contents of Li−1 may also be accessed at line size granularity t (in which case it is determined whether any of the t/s lines of size s residing in the larger line of size t corresponding to a given memory address are stored in Li−1, and if so their locations and status) without multiple sequential accesses to a cache Li−1 directory structure.
    Type: Grant
    Filed: May 22, 2000
    Date of Patent: July 1, 2003
    Assignee: International Business Machines Corporation
    Inventors: Caroline D. Benveniste, Peter A. Franaszek, John T. Robinson
  • Patent number: 6576925
    Abstract: The present invention relates to minimizing a leakage current in a floating island region formed in a thin film transistor, and to maintaining a large ON-current required for an operation of the TFT. More specifically, the present invention is directed to a thin film transistor includes: a gate electrode 18 disposed above an insulating substrate and formed in a predetermined pattern; an a-Si film 16 formed in accordance with the pattern of the gate electrode 18; a source electrode 14 formed via the a-Si film 16; and a drain electrode 15 disposed at a predetermined interval from the source electrode 14.
    Type: Grant
    Filed: February 2, 2001
    Date of Patent: June 10, 2003
    Assignee: International Business Machines Corporation
    Inventors: Takatoshi Tsujimura, Kohichi Miwa
  • Patent number: 6566653
    Abstract: An investigation device includes a time of flight mass spectrometer with an entrance opening, and an electrically conductive tip on a cantilever which is movable from a first position near a sample on a sample holder to a second position near the entrance opening. A sample particle is obtained with the tip being in the first position from the sample. The tip, with the particle, is moved into the second position where the particle can be accelerated towards the entrance opening. The particle is analyzable by the time of flight mass spectrometer.
    Type: Grant
    Filed: January 23, 2002
    Date of Patent: May 20, 2003
    Assignee: International Business Machines Corporation
    Inventors: Christoph Gerber, Michel Despont, Peter Vettiger, Ernst Meyer, Roland Bennewitz
  • Patent number: 6539460
    Abstract: A computing system includes a storage server having a memory organization that includes a compressed memory device for storing sectors, each sector having a sector data portion and associated header and trailers, either attached by the hosts or by components of the computing system. The compressed memory device comprises a memory directory and a plurality of fixed-size blocks. The system implements a methodology for detaching headers and trailers from sectors before storing the sectors in the memory, and storing the headers and trailers in the memory disk cache, separate from the sector data portion; and, reattaching headers and trailers to sector data portions when the sectors are sent from the memory to a host or to a mass storage device. The header and trailer data are managed through the same memory directory used to manage the compressed main memory.
    Type: Grant
    Filed: January 19, 2001
    Date of Patent: March 25, 2003
    Assignee: International Business Machines Corporation
    Inventors: Vittorio Castelli, Peter A. Franaszek, Philip Heidelberger, John T. Robinson
  • Patent number: 6522543
    Abstract: A first heat-conductive rubber is disposed on a surface of a printed wiring film, which is an opposite side to a driver IC, a second heat-conductive rubber is disposed on a surface of the driver IC, which is an opposite side to the surface of the printed wiring film, and the first heat-conductive rubber is made harder than the second heat-conductive rubber. In addition, heat-conductive grease is coated on a surface of the first heat-conductive rubber, which contacts the printed wiring film, and on a surface of the second heat-conductive rubber, which contacts the driver IC.
    Type: Grant
    Filed: October 1, 2001
    Date of Patent: February 18, 2003
    Assignee: International Business Machines Corporation
    Inventors: Mikio Kurihara, Yoshihisa Yamada, Fumihisa Hanzawa
  • Patent number: 6519733
    Abstract: In a processing system having a main memory, wherein information is stored in a compressed format for the purpose of gaining additional storage through compression efficiencies, a method and apparatus for providing compressed data integrity verification to insure detection of nearly any data corruption resulting from an anomaly anywhere in the logical processing or storage of compressed information. A cyclic redundancy code (CRC) is computed over a compressed data block as the data enters the compressor hardware, and the CRC is appended to the compressor output block before it is stored into the main memory. Subsequent read access results in comparing the CRC against a recomputation of the CRC as the block is uncompressed from the main memory. Any CRC miscompare implies an uncorrectable data error condition that may be used to interrupt the system operation.
    Type: Grant
    Filed: February 23, 2000
    Date of Patent: February 11, 2003
    Assignee: International Business Machines Corporation
    Inventors: David Har, Kwok-Ken Mak, Charles O. Schulz, T. Basil Smith, III, R. Brett Tremaine
  • Patent number: 6498631
    Abstract: A panel light source device includes a light source, a light guide plate for guiding and diffusing light from the light source, and a frame for housing the light guide plate. The frame has a convexity inside thereof and the light guide plate has a concavity on a side or lower surface thereof. The convexity and the concavity are engaged with each other, and the light guide plate is provided in the frame so as to cover at least a part of an upper surface of the light guide plate.
    Type: Grant
    Filed: June 29, 2001
    Date of Patent: December 24, 2002
    Assignee: International Business Machines Corporation
    Inventor: Yoshifumi Natsuyama
  • Patent number: 6469722
    Abstract: The present invention is directed to explaining functions with a rich graphical expression even when the number of kinds of functions required for a software increases. More particularly, a plurality of function areas 201-223 are defined in a composite icon area of the present invention. An appearance image is associated to each function area and, when a mouse pointer comes across a function area, appearance images associated to that function area are displayed as appearance images of a composite icon. A function is also associated to each function area and, when a mouse is clicked on a function area, a function which is associated to that function area is executed. The set of the function area may be changed by changing the size of a composite icon, an operation to switch the group of functions, or selection of an object to be operated upon.
    Type: Grant
    Filed: January 29, 1999
    Date of Patent: October 22, 2002
    Assignee: International Business Machines Corporation
    Inventors: Yohsuke Kinoe, Kohsuke Okamoto, Naofumi Muranaka, Tsukasa Takemura, Minako Matsuda, Norimasa Uchiyama
  • Patent number: 6467001
    Abstract: The present invention provides a method and a system for connecting together, in a VLSI chip, a plurality of macros which require data flow connections between each other. A simple standard interface is realised between all macros. Any number of macros can be connected together, also allowing concurrent transactions between 4 or more macros using a cross-bar switch. Each macro may be a master (capable of requesting connections), a slave (capable of receiving connections from a master) or both. The centralised inter-connect logic includes three major components: the cross-bar switch, which makes the connections between the macros, the address decoder, which determines which slave each master wishes to connect to and an arbiter, which arbitrates between the macros when two or more masters request a connection simultaneously.
    Type: Grant
    Filed: August 13, 1999
    Date of Patent: October 15, 2002
    Assignee: International Business Machines Corporation
    Inventors: Mandy Alexander Gray, Michael J. Palmer, Ian David Judd
  • Patent number: 6457104
    Abstract: In a processing system having a main memory wherein information is stored in a compressed format for the purpose of gaining additional storage through compression efficiencies and, wherein information stored within the main memory is indirectly accessible by a processor through an uncompressed information cache, an improved memory architecture, apparatus and method for detecting and recovering the main memory space used to store “stale” information associated with cache lines in the “modified” state, and returning the storage to an unused pool for use in storing other information. This improves the overall compression rate of the system, thus lessening the likelihood of encountering a “memory pressure” situation where the system runs low on unused memory.
    Type: Grant
    Filed: March 20, 2000
    Date of Patent: September 24, 2002
    Assignee: International Business Machines Corporation
    Inventors: R. Brett Tremaine, Michael Wazlowski
  • Patent number: 6446145
    Abstract: In a processing system having a main memory wherein information is stored in a compressed format for the purpose of gaining additional storage through compression efficiencies, a method and apparatus for enabling termination of a pending compression operation for the purpose of writing the data directly to the main memory, bypassing the compressor hardware during stall conditions. Memory space (compressibility) is sacrificed for higher system performance during these temporary write back stall events. A background memory scrub later detects and recovers the “lost” compressibility by recycling the uncompressed data back through the compressor during idle periods.
    Type: Grant
    Filed: January 6, 2000
    Date of Patent: September 3, 2002
    Assignee: International Business Machines Corporation
    Inventors: David Har, Charles O. Schulz, Robert B. Tremaine
  • Patent number: 6425693
    Abstract: An optical connector includes a plug unit and a counter plug unit, each comprise of two components. Each component comprises a receiving portion for receiving and fixing at least two optical fibers and an adjusting portion having adjusters to adjust the optical fibers in a defined position. The adjusting portion provides for the insertion of a connector by having elongate V-shaped grooves, with one of the optical fibers being aligned in each of the grooves by the adjusting portion.
    Type: Grant
    Filed: May 11, 2001
    Date of Patent: July 30, 2002
    Assignee: International Business Machines Corporation
    Inventor: Martin Schmatz