Patents Represented by Attorney Dillon & Yudell LLP
  • Patent number: 8024647
    Abstract: A method of discovering a fault in a circuit is disclosed. The method comprises generating a first result of a selected function by performing the selected function on an operand, wherein the selected function employs a mask. Once the function is performed, an antimask of the mask is created, and the modulo of the antimask is calculated. A modulo function of the first result of the selected function is calculated to obtain a third result. A modulo of the operand is then calculated to obtain a fourth result, and a second function is then performed on the second result and the third result to obtain a fifth result. In response to comparing the fifth result to the fourth result, a signal is propagated to indicate a fault in the circuit.
    Type: Grant
    Filed: March 13, 2008
    Date of Patent: September 20, 2011
    Assignee: International Business Machines Corporation
    Inventors: Fadi Y. Busaba, Lawrence Joseph Powell, Martin Stanley Schmookler, Michael Thomas Vaden, David Allan Webber
  • Patent number: 8020151
    Abstract: A technique for determining a browser state during a web page test includes providing, from a test automation tool, a first input to a web page provided via a browser. The technique also includes detecting, with a network monitoring tool, outgoing traffic from the browser associated with the first input and detecting, with the network monitoring tool, incoming traffic to the browser associated with a response to the first input. An indication is provided from the network monitoring tool to the test automation tool when the incoming traffic is detected by the network monitoring tool. Finally, the test automation tool provides a second input to the web page following the indication.
    Type: Grant
    Filed: July 31, 2007
    Date of Patent: September 13, 2011
    Assignee: International Business Machines Corporation
    Inventors: Joel B. Allen, Joshua D. Ghiloni, Wes D. Hayutin, Howard S. Krovetz
  • Patent number: 8020107
    Abstract: An Internet web application interfaces to a machine to give users information about the status of the machine. The information on the status of the machine is constantly changing. This design only dynamically builds a web page when the page is requested for viewing. Once built, the page is retained so that the next time it is requested, if the information it contains has not changed, the page can be served without having to be rebuilt. If the information has changed, the design will not update the page until the page has been requested. In addition, the page is only built in the human language requested.
    Type: Grant
    Filed: December 14, 2007
    Date of Patent: September 13, 2011
    Assignee: International Business Machines Corporation
    Inventors: Vickie Lynn Brewer, Sue Ann Erstad, James Arthur Fisher, Raymond Anthony James, William Henry Travis
  • Patent number: 8018095
    Abstract: A power conversion, control, and distribution system includes multiple bulk power regulator (BPR) subassemblies, a bulk power distribution (BPD) subassembly, and a bulk power controller and hub (BPCH) subassembly. The BPR subassemblies are each configured to provide regulated DC power from both AC input power and DC input power. The BPD subassembly is configured to distribute the regulated DC power. The BPCH subassembly is coupled to the multiple BPR subassemblies and the BPD subassembly. The BPCH subassembly is configured to monitor and control the BPR assemblies and the BPD assembly.
    Type: Grant
    Filed: April 16, 2009
    Date of Patent: September 13, 2011
    Assignee: International Business Machines Corporation
    Inventors: Ravi Kumar Arimilli, Edward Joseph Seminaro, Kevin Robert Covi, Gerald J. Fahr, Daniel James Barus
  • Patent number: 8015528
    Abstract: A method, system and computer program product are disclosed. The method includes initializing a first variable to limit a rewrite time for rewrite operations with respect to an initial design by a rewriting module, a second variable to limit a time for satisfiability solver operations with respect to said initial design by a satisfiability solver module and a third variable to limit a maximum number of rewrite iterations with respect to said initial design. A timer is called to track said rewrite time and a local logic rewriting operation is run on said initial design with said rewrite module. In response to determining that all of all targets for said initial design netlist are not solved, whether a rewrite time is expired is determined. In response to determining that said rewrite time is not expired, AND refactoring is run. In response to determining that said rewrite time is not expired, XOR refactoring is run.
    Type: Grant
    Filed: December 10, 2008
    Date of Patent: September 6, 2011
    Assignee: International Business Machines Corporation
    Inventors: Jason R. Baumgartner, Robert L. Kanzelman, Hari Mony, Viresh Paruthi
  • Patent number: 8015380
    Abstract: A data processing system has an asynchronous memory mover, which includes multiple sets of registers for storing addressing and control parameters utilized to generate one or more asynchronous memory move (AMM) operations. The memory mover detects a receipt of a first set of parameters in a first set of registers from the processor. The processor forwards the parameters after the processor initiates a data move in virtual address space, utilizing a source effective address and a destination effective address. The memory mover responds to receiving the first set of parameters by generating and launching a first asynchronous memory move (AMM) operation. When the memory mover receives a second set of parameters in a second set of registers before the first AMM operation completes, the memory mover generates and launches a second AMM operation concurrently with the first AMM operation if no address conflicts exist.
    Type: Grant
    Filed: February 1, 2008
    Date of Patent: September 6, 2011
    Assignee: International Business Machines Corporation
    Inventors: Ravi K. Arimilli, Robert S. Blackmore, Chulho Kim, Balaram Sinharoy, Hanhong Xue
  • Patent number: 8010932
    Abstract: A design structure for tuning an integrated circuit design holds a reference clock signal constant across the integrated circuit design and, while the reference clock signal is held constant, optimizes transistors forming a register within the integrated circuit design and thereafter optimizes transistors forming one or more clock buffers coupled to the reference clock signal.
    Type: Grant
    Filed: May 30, 2008
    Date of Patent: August 30, 2011
    Assignee: International Business Machines Corporation
    Inventors: Christopher M. Durham, Peter J. Klim, Robert N. L. Krentler
  • Patent number: 8009058
    Abstract: A method, system, and computer program product for sensing the presence and/or misplacement of mechanical sub assemblies (MSAs) within storage slots of automated storage libraries. Each MSA is tracked based on signed empty cell barcode labels. Signed empty cell barcode labels are utilized to uniquely identify the frame, column, and row coordinates of one or more MSAs. The storage library automatically scans all signed empty cell barcode labels utilizing a scanner mounted on a robotic device. The system provides a counter for each MSA, allowing the storage library to track the usage of the MSA. As usage of the MSA reaches a predefined lifecycle, the library automatically generates an alert to replace the MSA. When a MSA is rearranged within the storage library, the library automatically maps the new frame, column, and row coordinates of the MSA.
    Type: Grant
    Filed: September 24, 2008
    Date of Patent: August 30, 2011
    Assignee: International Business Machines Corporation
    Inventors: Stefan Lehmann, Shawn M. Nave, Raymond Yardy
  • Patent number: 8010673
    Abstract: A method, system and computer program product for transitioning network traffic between logical partitions in one or more data processing systems are disclosed. The method includes defining a plurality of logical partitions with respect to one or more processing units of one or more data processing systems and dynamically reallocating resources from a second partition to a first partition among the plurality of logical partitions. Packets awaiting processing are transferred from the second partition to the first partition and processed on the first partition.
    Type: Grant
    Filed: March 28, 2008
    Date of Patent: August 30, 2011
    Assignee: International Business Machines Corporation
    Inventors: Frank Dea, Rakesh Sharma, Satya Prakash Sharma, Vinit Jain
  • Patent number: 8006153
    Abstract: A method, an apparatus, and a computer program are provided to utilize built-in self test (BIST) latches for multiple purposes. Conventionally, BIST latches are single purpose. Hence, separate latches are utilized for array built-in self test (ABIST) and logic built-in self test (LBIST) operations. By having the separate latches, though, a substantial amount area is lost. Therefore, to better utilize the latches and the area, ABIST latches are reconfigured to utilize some previously unused ports to allow for multiple uses for the latches, such as for LBIST.
    Type: Grant
    Filed: August 25, 2008
    Date of Patent: August 23, 2011
    Assignee: International Business Machines Corporation
    Inventors: Steven Ross Ferguson, Garrett Stephen Koch, Osamu Takahashi, Michael Brian White
  • Patent number: 8006097
    Abstract: Presently disclosed herein are a method, system, and computer-readable medium for managing a user-defined genre-based password. In one embodiment, the method includes steps for creating a genre-based tree that can be used to prompt a user in remembering a user-created password.
    Type: Grant
    Filed: January 31, 2007
    Date of Patent: August 23, 2011
    Assignee: International Business Machines Corporation
    Inventors: David B. Kumhyr, Pamela A. Nesbitt
  • Patent number: 8006174
    Abstract: A method for exporting-importing the content of input cells from a source scalable template instance in a source multi-dimensional spreadsheet to a destination scalable template instance in a destination multi-dimensional spreadsheet comprises the steps of: detecting a command for exporting-importing input cells from a source scalable template instance in a source spreadsheet to a destination scalable template instance in a destination spreadsheet; identifying the source scalable template associated with the source scalable template instance; identifying cells, if there are any, defined as input cells in the element profile of the source scalable template; identifying the destination scalable template associated with the destination scalable template instance; identifying cells, if there are any, defined as input cells in the element profile of the destination scalable template; copying cell per cell, the content of each input cell of the source scalable template instance in each input cell of the destination
    Type: Grant
    Filed: July 9, 2008
    Date of Patent: August 23, 2011
    Assignee: International Business Machines Corporation
    Inventors: Jean-Jacques Aureglia, Frederic Bauchot
  • Patent number: 8004414
    Abstract: Material passing through a piping is laced with Radio Frequency Identification (RFID) tags. As the RFID tags pass an RFID sensor, which is either adjacent to or within the piping, a flow-rate of the material is determined by counting the rate at which the RFID tags pass the RFID sensor.
    Type: Grant
    Filed: March 14, 2008
    Date of Patent: August 23, 2011
    Assignee: International Business Machines Corporation
    Inventors: Robert L. Angell, James R. Kraemer
  • Patent number: 8006133
    Abstract: A primary I/O adapter and a redundant I/O adapter of a data processing system are assigned to support access to a system resource. While the primary I/O adapter is in service and the redundant I/O adapter is not in service in providing access to the system resource, a fail over command is issued to remove the primary I/O adapter from service and place the redundant I/O adapter in service in supporting access to the system resource. While the redundant I/O adapter is in service and the primary I/O adapter is not in service in providing access to the system resource, diagnostic testing on the primary I/O adapter is performed. In response to the diagnostic testing revealing no fault in the primary I/O adapter, a fail back command is issued to restore the primary I/O adapter to service and to remove the redundant I/O adapter from service.
    Type: Grant
    Filed: February 14, 2008
    Date of Patent: August 23, 2011
    Assignee: International Business Machines Corporation
    Inventors: Rafael G. Cabezas, David D. Galvin, Binh K. Hua, Sivarama K. Kodukula
  • Patent number: 8006081
    Abstract: A method of processing data is proposed. In response to determining that a reconfiguration of a data processing system has occurred, one or more system items are surveyed to identify a change to the data processing system. One or more requests for status instructions for the one or more system items are generated, and the status instructions are compiled into a data structure. In response to determining that a status instruction is present in the data structure for which no status data has been collected, a method of collection for the instruction is determined, the collection is performed according to the method to obtain the status data, and the status data is compiled in a dump data structure.
    Type: Grant
    Filed: April 25, 2008
    Date of Patent: August 23, 2011
    Assignee: International Business Machines Corporation
    Inventors: Jens Alpers, Terry S. Biberdorf, Astrid C. Kreissig, Meghna Paruthi
  • Patent number: 8006237
    Abstract: A method of dynamic real time translation of first program code written for a first programmable machine into second program code (target code) for running on a second programmable machine employing run time generation of an intermediate representation of the first program code. Upon first encountering a given portion of program code, only the target code necessary to execute that portion of program code under a prevailing set of entry conditions is initially generated and stored. When the same portion of program code is again encountered, a determination is made as to whether intermediate representation corresponding to a second subsequent set of conditions has been generated. If not, the target code necessary to execute the same portion of program code under that second set of conditions is generated.
    Type: Grant
    Filed: March 27, 2007
    Date of Patent: August 23, 2011
    Assignee: International Business Machines Corporation
    Inventors: Jason Souloglou, Alasdair Rawsthorne
  • Patent number: 8001482
    Abstract: A method of displaying tab titles in a computer user interface receives a request to display a new tab in a tab area having a length. The new tab has a width and the new tab has a title having a length. The method determines a number of tabs to be displayed in the area and determines if the number of tabs to be displayed multiplied by the tab width is greater than the length of the tab area. If so, the method sets the tab width equal to the length of the tab area divided by the number of tabs. The method determines if the length of the title is greater than the tab width. If so, the method determines if the title has any words in common with any other titles of tabs. If so, the method deletes the common words from the titles, and displays the titles with the deleted common words in the tabs. The method may set a maximum number of tabs to be displayed in the tab area. The maximum number of tabs may be determined by the length of the tab area and a minimum tab width.
    Type: Grant
    Filed: December 21, 2007
    Date of Patent: August 16, 2011
    Assignee: International Business Machines Corporation
    Inventors: Sukadev Bhattiprolu, Haren Myneni, Malahal R. Naineni, Chandra S. Seetharaman, Narasimha N. Sharoff
  • Patent number: 8001060
    Abstract: A method and system for classifying small collections of hi-value entities with missing data. The invention includes: collecting measurement variables for a set of entity cases for which classifications are known; calibrating standard weights for each measurement variable based on historical data; computing compensating weights for each entity case that has missing data, computing case scores for each of one or more dimensions as a sum-product of compensating weights and variables associated with each dimension; executing an iterative process that finds a specific combination of compensation weights that best classify the entity cases in terms of distinct scores; and applying a resulting model, which is determined by the specific combination of compensation weights, to classify other entity cases for which the classifications are unknown.
    Type: Grant
    Filed: May 9, 2007
    Date of Patent: August 16, 2011
    Assignee: International Business Machines Corporation
    Inventor: John A. Ricketts
  • Patent number: 8001461
    Abstract: A method for exporting-importing the content of input cells from a source scalable template instance in a source multi-dimensional spreadsheet to a destination scalable template instance in a destination multi-dimensional spreadsheet comprises the steps of: detecting a command for exporting-importing input cells from a source scalable template instance in a source spreadsheet to a destination scalable template instance in a destination spreadsheet; identifying the source scalable template associated with the source scalable template instance; identifying cells, if there are any, defined as input cells in the element profile of the source scalable template; identifying the destination scalable template associated with the destination scalable template instance; identifying cells, if there are any, defined as input cells in the element profile of the destination scalable template; copying cell per cell, the content of each input cell of the source scalable template instance in each input cell of the destination
    Type: Grant
    Filed: July 9, 2008
    Date of Patent: August 16, 2011
    Assignee: International Business Machines Corporation
    Inventors: Jean-Jacques Aureglia, Frederic Bauchot
  • Patent number: 7996803
    Abstract: A method, system and computer program product for automated use of uninterpreted functions in sequential equivalence checking. A first netlist and a second netlist may be received and be included in an original model, and from the original model, logic to be abstracted may be determined. A condition for functional consistency may be determined, and an abstract model may be created by replacing the logic with abstracted logic using one or more uninterpreted functions. One or more functions may be performed on the abstract model. For example, the one or more functions may include one or more of a bounded model checking (BMC) algorithm, an interpolation algorithm, a Boolean satisfiability-based analysis algorithm, and a binary decision diagram (BDD) based reachability analysis algorithm, among others.
    Type: Grant
    Filed: January 30, 2009
    Date of Patent: August 9, 2011
    Assignee: International Business Machines Corporation
    Inventors: Jason R. Baumgartner, Robert L. Kanzelman, Hari Mony, Viresh Paruthi