Abstract: A gate electrode and a gate insulating film are formed for each of PMOSFET, NMOSFET and ferroelectric FET. Source/drain regions are defined for the NMOSFET and ferroelectric FET and for the PMOSFET by performing ion implantation processes twice separately. An intermediate electrode connected to the gate electrode of the ferroelectric FET, a ferroelectric film and a control gate electrode are formed over a first interlevel dielectric film. An interconnect layer, which includes first and second interconnects and is connected to the gate electrodes of the CMOS device, is formed on a second interlevel dielectric film. The first and second interconnects are connected to the control gate and intermediate electrodes of the ferroelectric FET, respectively.

Abstract: Water is used as a refrigerant, and a humidification cooler (41) which evaporates the water to generate cold heat and a dehumidifier (42) are provided. A compressor (50) which compresses water vapor separated by the dehumidifier (42) is provided. A moisture discharging device (60) which discharges water vapor compressed in the compressor (50) is provided. The compressor (50) is driven by a steam turbine (80) capable of generating rotational power from thermal energy.

Abstract: A high-voltage MOS transistor wherein a dopant concentration of a source offset region is set lower than a dopant concentration of a drain offset region whereby a resistance value of the resource region is set independently of a resistance value of the drain region in such a manner as to maintain a high sustaining breakdown voltage of the high-voltage MOS transistor, which is based on a voltage of the source offset region and a voltage of a substrate region directly under a gate insulating film during operation of the high-voltage MOS transistor.

Abstract: A method for encoding and transmitting a video signal which includes creating a low bit rate video transport stream from the video signal. Excluded bits derived from the video signal which were not included in the base transport stream are included in one or more separate enhancement transport streams. The base transport stream and each enhancement transport stream is then separately transmitted over at least one communications network.

Abstract: A pile based braced caisson structural support device includes a number of legs. These legs are configured in a teepee type configuration such that the footprint of the base is larger than the footprint of the opposing end. This structural support can be used as a base for an offshore drilling platform in that the support reduces the lateral forces on the support caused by wave action.

Abstract: A projecting portion 52 which becomes convex in radial direction is formed in a rubber elastic body 5 for connecting together an inner cylindrical body 3 mounted to a shaft portion 21a of a lower shift lever member 21 by external interfit and an outer cylindrical body 4 mounted to a cylindrical portion 22a of an upper shift lever member 22 by internal interfit. Formed in an inner peripheral surface of the outer cylindrical body 4 is a recessed portion 42 which becomes concave with clearances C1 and C2 of respective given amounts left between the recessed portion 42 and the projecting portion 52. This makes it possible to manufacture a shift lever bush 1 having a two-stage spring characteristic at low cost.

Abstract: After successively depositing a first metal film and a first silicon oxide film on an insulating film formed on a semiconductor substrate, etching is carried out by using a first resist pattern as a mask, so as to form a first interlayer insulating film having openings from the first silicon oxide film and first metal interconnects from the first metal film. A third interlayer insulating film of an organic film is filled in the openings of the first interlayer insulating film, and the first interlayer insulating film is etched by using a hard mask. A second metal film is then filled in a space in the second interlayer insulating film, so as to form second metal interconnects.

Abstract: After an organic insulating film has been deposited over a semiconductor substrate, a silylated layer is formed selectively on the organic insulating film. Then, the organic insulating film is etched using the silylated layer as a mask, thereby forming an opening, which will be a via hole or interconnection groove, in the organic insulating film.

Abstract: In an oil conditioner comprising: a coolant oil circulation circuit (8) through which a coolant oil of a machine tool (1) is circulated by an oil pump (12); a refrigeration circuit (20) formed by interconnecting, in the order given, a compressor (15), a condenser (16), a pressure reducing mechanism (17), and an evaporator (18) for cooling the coolant oil in the coolant oil circulation circuit (8) by heat exchange with refrigerant; and an inverter (28) for controlling the operating frequency of a motor (14) of the compressor (15), the output from the inverter (28) is switched to a motor (11) of the oil pump (12) during the time the compressor (15) is out of operation so that the amount of coolant oil that the oil pump (12) circulates is made variable, and the amount of coolant oil that the oil pump (12) circulates is reduced when the amount of heat produced in the operation of the machine tool (1) decreases because, for example, the machine tool (1) is stopped, for reducing wasteful consumption of energy by th

Abstract: A transformation curve for compressing the color image signal within the color reproduction range of the color image output system is generated according to the number of picture elements whose colors are inside the color reproduction range of the color image output system out of the picture elements included in the predetermined region. The color of each picture element is transformed on the basis of the transformation curve thus generated, and a color image signal made up of signal components representing the colors of the picture elements thus transformed is output to the color image output system as the processed image signal.

Abstract: A method of testing semiconductor integrated circuits comprises the step of simultaneously testing a plurality of semiconductor integrated circuit elements for electric characteristics by applying a voltage to the respective testing electrodes of the semiconductor integrated circuit elements. The simultaneous testing step includes the step of applying the voltage to the respective testing electrodes of the semiconductor integrated circuit elements via PTC elements provided for the semiconductor integrated circuit elements in a one-to-one relationship.

Abstract: An original color image data is converted to halftone image data having information on density of pixels by a predetermined gray conversion. The predetermined gray conversion includes an RGB ratio adjustment, an RGB ratio adjustment is carried out on reference image data employing different ratios of R, G and B, the results of the predetermined gray conversions including the RGB ratio adjustments employing the different ratios of R, G and B carried out on the reference image data are graphically shown on a screen, an optimal value of the ratio of R, G and B is determined on the basis of comparison of the results of the predetermined gray conversions graphically shown on the screen, and the predetermined gray conversion including an RGB ratio adjustment employing the optimal value of the ratio of R, G and B is carried out on the original color image data.

Abstract: A semiconductor device includes: a wiring board; a first semiconductor chip, which has a circuitry side and a non-circuitry side that face each other vertically and which is electrically connected to the wiring board via a raised electrode, the circuitry side of the first chip facing the principal surface of the wiring board; and a second semiconductor chip, which has a circuitry side and a non-circuitry side that face each other vertically and which includes an external electrode on the circuitry side thereof. The non-circuitry sides of the first and second semiconductor chips are secured to each other. The external electrode of the second semiconductor chip is connected to the wiring board via a metal fine wire. The external and raised electrodes are so disposed as not to overlap each other as viewed vertically downward from over the principal surface of the wiring board.

Abstract: The present invention is for a drill string stabiliser tool (18) used in borehole drilling. The tool includes a symmetrical body (20) with a plurality of external recesses (22). The recesses (22) have internal opposite surfaces (23) which converge inwardly from the outer surface of the body. A pad assembly (24) is disposed in each recess (22) and includes a wedge block (28) with converging radially inwardly opposite side surface (29) complementarily abutting said recess surfaces. Each wedge block (28) has a bolt (30) securing said wedge block (28) to said body (20) and is slightly larger dimensioned than the recess (22). The angles of the wedge blocks and the recesses are so chosen to effect an interference fit so that when the wedge block (28) is forced into the recess (22) by use of the bolt (30) it is held there by an interference fit.

Abstract: Painting a vehicle body comprising an exterior body portion, engine and cargo compartments and an interior door portion all of which are applied with an undercoat is completed by applying a gray intermediate coat to the exterior body portion, an intermediate coat to the engine and/or cargo compartments, a base coat comprising a single color base coat or a color base coat and a bright base coat to the interior door portion, a base coat comprising either a single color base coat or a color base coat and a bright base coat to the exterior body portion, a clear coat to the interior door portion and a clear coat to the exterior body portion in this order, each of the applications of coat being performed while coat layers formed preceding the each application of coat remain wet, and then baking and drying the coat layers all together.

Abstract: A semiconductor device includes a circuit board, a semiconductor element that is mounted on an upper surface of the circuit board and has an electrode terminal, and a sealing resin for sealing a periphery of the semiconductor element that is mounted on the upper surface of the circuit board. The circuit board includes a plurality of conductive members and an insulating substance for binding and fixing the plurality of conductive members. Each of the plurality of conductive members includes a conductive material formed integrally from the upper surface through the lower surface of the circuit board, and an insulating material covering an outer circumference of the conductive material. The conductive material of at least one conductive member of the plurality of conductive members is exposed to the upper surface of the circuit board.

Abstract: The semiconductor device of the present invention includes: a gallium nitride (GaN) compound semiconductor layer; and a Schottky electrode formed on the GaN compound semiconductor layer, wherein the Schottky electrode contains silicon.

Abstract: The invention provides a method for fabricating a semiconductor device including a concaved capacitor device having a lower electrode, a capacitor dielectric film of a perovskite type high dielectric constant or ferroelectric material formed on the lower electrode and an upper electrode formed on the capacitor dielectric film. In this method, a step of forming a conducting film to be formed into the lower electrode includes sub-steps of forming a lower conducting film by sputtering on walls and a bottom of a recess formed in an insulating film on a substrate; and forming an upper conducting film on the lower conducting film by CVD.

Abstract: An inventive semiconductor memory device includes a memory circuit and a logic circuit that are formed on a single semiconductor substrate. The memory circuit includes a storage element having a memory gate structure. The memory gate structure includes: a tunnel insulating film formed on the substrate; and a control gate electrode formed out of a gate prototype film. The logic circuit includes a logical element having a logic gate structure. The logic gate structure includes: a lower gate electrode formed out of the gate prototype film; and an upper gate electrode formed out of a conductor film on the lower gate electrode. The conductor film contains a metal. The memory gate structure includes no metal films.

Abstract: A semiconductor device includes a gate insulating film formed on a semiconductor substrate, and a gate electrode formed on the gate insulating film. Nitrogen is introduced into the gate insulating film, and the nitrogen concentration distribution thereof has a peak near the surface of the gate insulating film or near the center of the gate insulating film in the thickness direction. The peak value of nitrogen concentration in the gate insulating film is equal to or greater than 10 atm % and less than or equal to 40 atm %.