Abstract: One embodiment of the present invention provides a system that facilitates substitution of a full bitmap version of a graphical image with a line drawing version of the graphical image in a graphical presentation. The system operates by displaying a page in the graphical presentation, which includes the line drawing version of the graphical image. Next, the system allows a user to input a command to display the full bitmap version of the graphical image. If the user inputs the command, the system retrieves the full bitmap version of the graphical image, and displays the full bitmap version of the graphical image. Note that displaying the line drawing version of the graphical image requires less data to be retrieved than displaying the full bitmap version of graphical image. Consequently, loading the line drawing version of the graphical image takes less time than loading the full bitmap version.

Abstract: An electrostatic discharge (ESD) protection circuit that includes a parallel connection of parasitic vertical and lateral bipolar junction transistors (BJTs) each with a floating base and a metal oxide semiconductor (MOS) field transistor with a floating body is disclosed. The three transistors may be connected in parallel between a bond (input or output) pad and a substantially fixed voltage level (e.g., a ground (or zero potential) or Vcc, depending on the transistor configuration) in a semiconductor electronic device so as to protect transistor gates or other circuit portions from damage from electrostatic voltages. The parasitic BJTs and the field transistor may be configured to remain cut off so long as an input voltage at the pad is between a negative V1 voltage (?V1) (V1>0) and a +V2 voltage (V2>Vcc), thereby allowing a greater input voltage swing without signal clamping.

Abstract: Examples of the present invention include profiling systems that store, manage, and utilize profile information to take predictive or deterministic action. Embodiments of the invention allow the profiling system to be used as a trusted intermediary where the profile owning entity controls access to their profile information across their network of devices and services.

Abstract: A lock for an injection device including a threaded rod, wherein the lock includes one of an anti-rotation or claw-type securing element engageable in cooperative anti-rotation elements or claws of the injection device to prevent rotation of the threaded rod relative to the injection device.

Abstract: Embodiments of a multi-port memory device may include a plurality of ports and a plurality of memory banks some of which are native to each port and some of which are non-native to each port. The memory device may include a configuration register that stores configuration data indicative of the mapping of the memory banks to the ports. In response to the configuration data, for example, a steering logic may couple each of the ports either to one or all of the native memory banks or to one or all of the non-native memory banks.

Abstract: A seal member for creating an adequate sealing engagement between two bodies. The seal member may have a closed loop shape, a plurality of engagement surfaces and a plurality of lobes formed on the engagement surfaces. The lobes may contact a sealing surface on a body to aid in creating an adequate seal between two bodies.

Abstract: One or more embodiments of the invention enable a memory device to load its memory array with desired background data, such as to reduce total test time and costs associated with testing. A background data loading circuit according to one embodiment of the invention includes a buffer, a data loading circuit, and a pattern generating logic. The buffer is coupled to the array of memory cells. The data loading circuit is coupled to load data into the buffer to be transferred to a respective row of the memory cells. The pattern generating logic is coupled to the data loading circuit. The pattern generating logic applies a pattern generating algorithm corresponding to a test mode when the memory devices is in the test mode and generates patterns of data each for a respective row of the memory cells according to the pattern generating algorithm.

Abstract: According to one embodiment, a combination is comprised of a plurality of sense amps, each having an input for receiving a clock signal. A data bus is for receiving data from the plurality of sense amps in response to a clock signal being input to the plurality of sense amps. A tracking circuit is responsive to the clock signal for producing a control signal. A plurality of latches is responsive to the control signal for latching data from the bus. The control signal has a delay that is equal to the time needed for a last data bit to arrive at the plurality of latches. That delay may be equal to a delay associated with inputting the clock signal to a last one of the plurality of sense amps, plus a delay of the last sense amp, plus a delay of the data bus. That amount of delay may be achieved in a number of ways which combines electrical delay with delay inherently associated with the tracking circuit's location.

Abstract: Memories, buffered write command circuits, and methods for executing memory commands in a memory. In some embodiments, read commands that are received after write commands are executed internally prior to executing the earlier received write commands. Write commands are buffered so that the commands can be executed upon completion of the later received read command. One example of a buffered write command circuit includes a write command buffer to buffer write commands and propagate buffered write commands therethrough in response to a clock signal and further includes write command buffer logic. The write command buffer logic generates an active clock signal to propagate the buffered write commands through the write command buffer for execution, suspends the active clock signal in response to receiving a read command after the write command is received, and restarts the active clock upon completion of the later received read command.

Abstract: A remote cinching device 14 comprising a resiliency mechanism 15 and 16, a force-transferring device 17, and a cinching device 28, 30, 32 enhances luggage, totes, briefs, and other transport and/or storage devices. The resiliency mechanism biases the luggage in an open condition, while the cinching device, located remotely from the areas undergoing the highest levels of expansion force (the top and bottom ends of an upright luggage case, for example), allows effective, easy, and visually pleasing compression of the case once it has been closed. The cinch is carried by force-transferring structures 17, by which the act of cinching is made even more efficient.

Abstract: Embodiments of the present disclosure provide a unique and novel archiving system that includes two or more network storage systems, each network storage system including removable hard disk drives embedded in removable disk cartridges, referred to simply as removable disk drives. The removable disk drives allow for expandability and replacement such that the archiving system need not be duplicated to add new or more storage capacity. In embodiments, the archiving system accesses, writes, reads, or performs functions on data from one network storage system to another remote network storage system.

Abstract: Circuits, devices and methods are provided, such as an amplifier (e.g., a voltage regulator) that includes a feedback circuit that supplies negative feedback through a feedback path. One such feedback path includes a capacitance coupled in series with a “one-way” isolation circuit through which a feedback signal is coupled. The “one-way” isolation circuit may allow the feedback signal to be coupled from a “downstream” node, such as an output node, to an “upstream” node, such as a node at which an error signal is generated to provide negative feedback. However, the “one-way” isolation circuit may substantially prevent variations in the voltage at the upstream node from being coupled to the capacitance in the isolation circuit. As a result, the voltage at the upstream node may quickly change since charging and discharging of the capacitance responsive to voltage variations at the upstream node may be avoided.

Abstract: A folding system for folding leading and/or trailing flaps of container blanks is provided. The system may include a conveyor having a conveying surface configured for conveying the blank along a predetermined path to a first folding position and a second folding position, a folding apparatus, and a control system. The folding apparatus may include a drive assembly and a folding tool. The control system may be operatively coupled to the folding apparatus and operable to control movement of the folding tool between a first rotational position and a second rotational position. Rotation of the folding tool to the first rotational position may cause the leading flap of the container blank positioned in the first folding position to fold about a leading flap fold line. Rotation of the folding tool from the first rotational position to the second rotational position may cause the trailing flap of the container blank positioned in the second folding position to fold about a trailing flap fold line.

Abstract: A transfer and dispensing apparatus is disclosed for the conveying and separation of packaging material, cushions or pillows when needed by the operator. When a packer working over a conveyor receives a box that requires void fill, an operating switch such as a foot pedal is depressed to dispense pillows from the apparatus and into the box in a connected strip. When the operating switch is released, the apparatus stops dispensing pillows, separates the continuous strip of pillows along a transverse perforation in the strip, and ejects the end of the separated segment. The packer can then complete packing the box by placing the severed end of the pillows into the box, advance to the next box, and repeat the process. The transfer and dispensing apparatus may be positioned in any convenient location including adjacent to, above or attached to the inflation device.

Abstract: The invention relates to a method for detecting and eliminating SCR breach operations by a second party within the memory space allocated to a first party, in a multi-tasking system, which comprises: (a) pre-recording by the first party within a knowledge base the structure and/or behavior of an SCR stack; (b) implanting within the SCR stack a dedicated SCR for reporting on the structure and/or behavior of said SCR stack when the SCR stack is activated; (c) when the SCR stack is activated, comparing the data reported by the dedicated SCR with the pre-recorded stack structure and/or behavior; (d) whenever non-matching in the structure and/or behavior is found, ceasing the activity of the activated stack, and alerting.