Abstract: A loop controller for a data communication network system formed by interconnecting a group of heterogeneous computers, batch terminals and conversational terminals in a ring or loop configuration. Each computer or terminal is connected to the communication network via a communications processor and an interface unit termed a node. The communications processor is responsible for network protocol and activities as well as for interfacing devices to the network. The node provides the only connection to the ring or loop and derives the clock for the communications processor as well as the node itself from the transmitted data. The logocontroller combines timing signals and information signals and forms a sequential stream of alternating control and data characters, each character being n-bits in length. This stream is then placed on the loop for serial transmission to the individual nodes connected to the loop. Signals received by the loop controller are synchronized for retransmission back to the loop.

Abstract: In a high speed arithmetic apparatus, the tally coded output of a modular mask generator addressed by a binary first operand and the tally coded input of a priority encoder are joined together by an interconnecting apparatus. The interconnecting apparatus is responsive in form to a second operand and to a selected arithmetic operation to provide at the output of the priority encoder the binary resultant of the selected operation executed upon the first and second operands. The interconnecting apparatus is disclosed in its simplest embodiment as fixed hardwired connections and in its most sophisticated embodiment as a dynamically microprogrammable full crossbar network.

Abstract: A magnetic transducer head adapted for flying on a fluid atmospheric bearing and a gimbal mounting device comprising a spring structure including an inner spring element secured to the head for inhibiting movement thereof in directions parallel with a plane therethrough and including an outer spring element coupled to the inner element and adapted to restrain rotation movement of the head about a pivot point thereon, the inner element being oriented in a plane coextensive with the line through the center of mass of the head and the head having a load point approximating the center of mass.

Abstract: Disclosed is a technique for error checking in one channel or a pair of channels of a binary system in which communications is serial-by-character and parallel-by-bit, such as in digital computer-controlled magnetic tape peripherals. The system is shown as applied to the group coded recording (GCR) format and standard for half-inch, nine-track magnetic tape used for interchange among information processing systems (the USA Standard Code for Information Interchange). The technique employs equipment which generates and records on the tape, together with a set of information characters, a check (i.e., redundant) character and parity bits, the former resulting from the employment of a cyclic code and the latter being based on odd modulo 2 addition.

Abstract: Disclosed is a method and apparatus for stuffing ribbons in a cartridge including a cartridge base receiver plate, a cam guided threader, and a measured length stuffer. A lid applier clamps the lid on the base of the cartridge and the cartridge is ejected from the apparatus for sealing the ribbon in a continuous loop.

Abstract: A slidable carriage adapted to receive and carry an information bearing credit card along a linear path in traversing registry with respect to an informational read head. A spring and dashpot cooperate with the carriage during movement thereof for limiting the velocity of the carriage to assure proper credit card reading.

Abstract: Three modular arrays structured from a common module are connected together a first way to form a binary quotient by successive approximations, or a second way to form a binary product. Any one of the three modular arrays may be used to add or subtract two binary numbers. To divide, one array is utilized to generate a shift and add sequence that represents the reciprocal of the divisor, most significant bit first. As this add and shift sequence is being formed, it is, at the same time, being utilized to manipulate the dividend, thereby forming the quotient, most significant bit first. In effect, the dividend is being multiplied by the reciprocal of the divisor so as to form a product of the dividend and reciprocal of the divisor, most significant bit first. This product is actually the quotient of the dividend and divisor. The binary product of two numbers is formed, most significant bit first, by manipulating the multiplicand according to an add and shift sequence determined by use of the multiplier.

Abstract: The panel comprises a gas-filled envelope formed by a base plate and a face plate hermetically sealed together by a ring of fusible sealing material. The interior of the envelope includes a display area which consists of glow cathodes and one or more anodes. Adjacent to the display area and near one end of the panel is provided a source of mercury which comprises a glass capillary tube containing a droplet of mercury. The mercury capillary tube is supported by a generally C-shaped insulating layer which is formed when the ring of fusible sealing material is formed, and of the same material. This C-shaped layer, like the sealing ring, is in contact with, and lies between, the base plate and face plate. The glass capillary is embedded at one end and at about its midpoint in this seal material, with the opposite end being free and unsupported. The free end of the capillary can be shattered by a laser to release mercury vapor into the panel envelope.

Abstract: An apparatus for forming solid character charge patterns on a dielectric surface in a non-impact printing system. The apparatus comprises a corona source of ions and a rotatable stencil drum surrounding the corona source to shape the ions generated by the corona source and accelerated therefrom by electrostatic forces into solid patterns of charge. A coaxial stationary shield is provided surrounding the stencil drum to capture the solid patterns of charge. A series of grid covered openings are longitudinally disposed along the shield to form a print station. Means are provided to electrically bias the individual grids covering the openings in the shield at a potential which either blocks the passage or enhances the transmission of patterns of charge through the shield onto an adjacent dielectric surface.

Abstract: Improved means and methods for controlling the sequencing and branching of microinstructions in a microprogrammed digital data processing system. Microinstructions are stored without replication in a programmable read-only control memory and corresponding microinstruction addresses and associated test select bits are stored in a separate programmable read-only memory having an instruction address storage capacity which is a predetermined multiple of the number of microinstructions in the control memory depending upon the branching capability desired. A common address register is used for both of the control and address memories, the remaining portion of the control memory addressing being derived from testing particular system conditions selected by test select signals obtained from the address memory.

Abstract: Disclosed is a computer system utilizing an interface unit for routing the information exchanged between processor units and memory units, in a temporal multiplex manner whereby the exclusive access of any one processor to any memory proceeds concurrently with the exclusive access of another processor to another memory. The system includes at least two independently operable processors and at least two independently addressable and separately operable memories, the latter being connected to the former through the interface unit.

Abstract: Computer monitor instructions are placed in appropriate locations in a routine to be monitored. Upon their execution, a decoder appropriately activates or de-activates circuitry, which develops time-related performance parameters. These time-related parameters are produced by a first counter which counts to one second and then resets a second, sampling counter. The sampling counter is stepped by clock pulses gated to it in response to a decoder activation signal. Each second the sampling counters contents are gated to a register to control the height of a bar graph display. Alternatively, the sampling counter contents may be summed over a number of intervals and divided by that number of intervals to produce an average count for controlling the bar graph display. Lastly, the number of decoder activations may be counted over the one second interval to provide a rate indication.

Abstract: A system for shifting the pins of a nine pin printing matrix printer so that the wear on the most used pin combination is distributed over the various pins in the rows and columns of pins. In the present matrix printer, the print head utilizes seven of the nine available pins for printing the character font and distributes the pin wear by causing the seven pins to be energized in a four shift pin combination; utilizing pins one through seven, then pins two through eight then, pins three through nine and then, pins two through eight. The shifting can be set to occur at the end of a sheet, page or job run. The system can be "locked up" so as to repeat one or all of the pins or to delete the use of some of the pins in the case of one or more pin failures.

Abstract: Method and apparatus for providing coarse and fine radial positioning of a transducer relative to the concentric tracks of a rotatable magnetic disc having work data and servo data interspersed in alternate sectors on the disc. The servo data sectors comprise repeating groups of servo tracks which are used in providing coarse and fine radial positioning of the transducer relative to work data tracks provided in the work data sectors. In a preferred embodiment, each servo track is provided with specially encoded servo data comprising a common reference transition followed by spaced fine servo positioning data and coarse servo positioning data which are individually chosen in a manner so as to permit each to reliably perform its respective fine or coarse positioning function without significantly increasing the storage area required for recording the servo data.

Abstract: A data communication network system for interconnecting a group of heterogeneous computers, batch terminals and conversational terminals employing serial transmission techniques in a ring or loop configuration. Each computer or terminal is connected to the communication network via communications processor and a interface unit termed a node. The communications processor is responsible for network protocol and activities as well as for interfacing devices to the network. The node provides the only connection to the ring or loop and derives the clock for the communications processor as well as the node itself from the transmitted data. All information in the communication network is transmitted in a modified Mauchly format and will appear as n-bit data or control characters. A control character, which always precedes a data character, will either be the address of a node or a null. To read information from the network, the node must detect a control character which represents its address.

Abstract: Improved methods and apparatus for testing and diagnosing defects in data processing networks and circuits. The presence of a time-dependent error in a network is determined by testing the network at normal and reduced clock frequencies. If a time-dependent error is found to be present, the clock period during which the error occurs is then determined by repeating the testing of the network at normal clock frequency a predetermined number of times with a different selected clock period being extended for each such repeated test operation. The amount of the clock period extension is chosen to be sufficiently long to prevent occurrence of a time-dependent error if it should occur during that clock period. The error clock period is then determined based on a determination of the particular repeated test operation for which the time-dependent error did not occur.

Abstract: Apparatus for removing and replacing dual in-line solid state circuit chip devices and/or receptacles or sockets from printed wiring or circuit (PC) boards comprising means for positioning a printed wiring board adjacent to a source of radiant energy capable of soldering and desoldering said devices, means for automatically, cyclically extracting a device from said board and replacing said device with another similar device, means forceably removing the excess solder residue retained by the board when the device is extracted, means for automatically timing both the device extraction and insertion and the soldering and desoldering operation, and means preventing device extraction should the desoldering operation fail to release the device from the PC board.

Abstract: In the manufacture of a transducer head, a plurality of elongated slots are formed in a non-magnetic substrate to receive magnetic cores having a transducing gap. A sealing composition bonds the cores in the slots and the cores are then laser trimmed to predetermined widths and at predetermined core-to-core spacings.

Abstract: Longitudinal parity is continuously provided for a predetermined plurality of words stored in a digital memory in a simple and expeditious manner without interfering with normal memory operation. The outputs of the memory read and write registers are applied in corresponding bit pairs to respective ones of a plurality of Exclusive ORs whose outputs are employed to update the respective flip flops of a longitudinal parity register at a time which is specially chosen so that the old word read out of the memory and the new word to be written therein are simultaneously available in the read and write registers.

Abstract: The present invention relates to semi-automatic apparatus for aligning and inserting a solid state electrical circuit chip or solid state chip receiving socket assembly into a printed circuit board or panel and automatically clinching a portion of the leads thereof so as to retain the chip and/or socket against accidental dislodgement from the circuit board prior to dip or wave soldering of the board.