Patents Represented by Attorney Edward L. Miller
  • Patent number: 6808407
    Abstract: A precision locking BNC male connector mates without requiring twisting of the cable or multiple bends to accommodate the rotation of the BNC latch. The shell portion of the male connector that carries the adapter connector or cable clamp on one end and that is the male cylindrical shield at the other end, is free to rotate whenever the precision locking BNC male connector is not locked, whether or not it is mated with a female connector. A knurled sleeve is captive at a location along the male shell, but is free to rotate. The knurled sleeve has internal threads that engage external threads on a portion of the BNC latch. A radial friction device is in contact with both an-external surface of the BNC latch and the internal surface of the knurled sleeve. When not engaged with the bayonet pins of a female connector, rotating the knurled sleeve will rotate the BNC latch also, by virtue of the friction device, but both will, as a unit, rotate freely relative to the shell.
    Type: Grant
    Filed: August 22, 2003
    Date of Patent: October 26, 2004
    Assignee: Agilent Technologies, Inc.
    Inventor: James E. Cannon
  • Patent number: 6804633
    Abstract: The time needed to perform an eye diagram measurement is minimized by initially randomly investigating the (X, Y)i that lie on a “starting” line crossing the sample space and expected to intersect any eye diagram. This finds a location on the eye diagram. Then the eye diagram is traversed as it is discovered by investigating nearest neighbors of locations found to belong to the eye diagram. Two arrays E and L of bits are established. The bits of E represent “eligible” (X, Y)i, while those of L represent “likely” (X, Y)i. At the very start of the measurement all bits in the eligible array E are set and all those in the likely array L are cleared, except that the starting line is established by setting in L and clearing in E locations for the corresponding (X, Y)i. Thereafter, locations in L that have 1s are measured in a randomly selected order.
    Type: Grant
    Filed: January 31, 2003
    Date of Patent: October 12, 2004
    Assignee: Agilent Technologies, Inc.
    Inventor: Richard A Nygaard, Jr.
  • Patent number: 6790080
    Abstract: A sub-chassis bracket attached to a horizontal motherboard has holes: (a) through which the connectors pass and that space the connectors apart by an intended nominal amount; and (b) that allow the connectors to shift horizontally as needed to form the mechanical path from a particular spacing on the motherboard to a front panel, with its own actual particular spacing, and to which panel the connectors are each fastened with a nut. The nuts are have a symmetrically tapered or curved surface on the side that contacts the outside of the panel, whose holes therethrough are somewhat oversize. The nuts individually center the connectors in their respective panel holes, and draw each connector perpendicular to the panel. To provide a particular connector feature orientation, and to prevent the connectors from rotating and disturbing that orientation during the tightening of the nuts, each connector has a central region of increased diameter that has two flats and that forms a shoulder.
    Type: Grant
    Filed: October 29, 2002
    Date of Patent: September 14, 2004
    Assignee: Agilent Technologies, Inc.
    Inventor: James Edward Cannon
  • Patent number: 6783382
    Abstract: A housing carries a male push-lock precision BNC connector. The function of the BNC latch of the male connector carried therein is performed by a spring-biased lock ring captive in a housing and that fits snugly and concentrically over a male sleeve, resulting in a double shell of two rigidly attached cylindrical portions that are coaxial, coextensive, yet separated to accept a BNC female shell. The double shell is held captive by anchoring it to the inside of the housing. The male sleeve has a slot and/or cut-away portion to accept the forward travel of the bayonet pins, which, when the connector halves are engaging, extend beyond the thickness of the sleeve and into the region occupied by the lock ring. The lock ring has grooves having various portions that engage the bayonet pins. As the housing containing these male parts is without rotation moved toward the female connector, the lock ring rotates as the grooves contact the bayonet pins.
    Type: Grant
    Filed: October 29, 2002
    Date of Patent: August 31, 2004
    Assignee: Agilent Technologies, Inc.
    Inventor: Jimmie D Felps
  • Patent number: 6785622
    Abstract: An eye diagram analyzer equips each SUT data and clock signal input channel with individually variable delays in their respective paths. For a range of signal delay of n-many SUT clock cycles, the SUT clock signal delay might be set at about n/2. For each data channel there is specified a point in time relative to an instance of the delayed clock signal (data signal delay) and a voltage threshold. The specified combination (data signal delay, threshold and which channel) is a location on an eye diagram, although the trace may or may not ever go through that location. A counter counts the number of SUT clock cycles used as instances of the reference for the eye diagram, and another counter counts the number of times the specified combination of conditions was met (“hits”).
    Type: Grant
    Filed: October 29, 2001
    Date of Patent: August 31, 2004
    Assignee: Agilent Technologies, Inc.
    Inventor: Richard A Nygaard, Jr.
  • Patent number: 6777630
    Abstract: An efficient way to fabricate the channels and cavities in a LIMMS device is to form them as matching upper and lower portions each created as a patterned layer of thick film dielectric material deposited on a respective upper or lower substrate. The two portions are adhered together by a patterned layer of adhesive, and hermetically sealed around an outer perimeter. The heater resistors are mounted atop the lower layer, thus suspending them away from that substrate and exposing more of their surface area. Vias can be used to route the conductors for the heaters and the switched signal contacts through the lower substrate to cooperate with surface mount techniques using solder balls on an array of contact pads. These vias can be made hermetic by their placement within the patterned layers of dielectric material and by covering their exposed ends with pads of hermetic metal.
    Type: Grant
    Filed: April 30, 2003
    Date of Patent: August 17, 2004
    Assignee: Agilent Technologies, Inc.
    Inventors: Lewis R Dove, Paul Thomas Carson, John F Casey, Marvin Glenn Wong
  • Patent number: 6779140
    Abstract: A Test Station for a memory tester is comprised of one or more Test Sites that are each individually algorithmically controllable, that can each deal with as many as sixty-four channels, and that can be bonded together to form a Multi-Site Test Station of two or more Test Sites. Up to nine Test Sites can be bonded together as a single Multi-Site Test Station. Bonded Test Sites still operate at the highest speeds they were capable of when not bonded. To bring this about it is necessary to implement certain programming conventions and to provide certain housekeeping functions relating to simultaneous starting of separate test programs on the bonded Test Sites, and relating to propagation and synchronization of test program qualifier results among those separate test programs.
    Type: Grant
    Filed: June 29, 2001
    Date of Patent: August 17, 2004
    Assignee: Agilent Technologies, Inc.
    Inventors: Alan S Krech, Jr., Edmundo De La Puente, Joel Buck-Gengler
  • Patent number: 6768703
    Abstract: Delay induced apparent amplitude desensitization in a data signal channel and its accompanying worm-like distortion in an Eye Diagram Analyzer is avoided by altering the measurement to avoid the need for any substantial delay in the path of the data channel threshold comparison signals. In a first technique, only enough delay will be inserted in the data channels to produce the relative adjustments needed to compensate for skew between the data channels, as determined by a calibration operation, and it is these de-skewed, but otherwise un-delayed, data threshold comparison signals that are, in rapid succession, clocked into the latches whose difference registers a hit at a given (time, voltage) pair. The clock path delay is then varied from a minimal value to a sufficiently large value capable of spanning a desired the number of eye diagram cycles.
    Type: Grant
    Filed: April 25, 2002
    Date of Patent: July 27, 2004
    Assignee: Agilent Technologies, Inc.
    Inventors: Richard A Nygaard, Jr., David D. Eskeldson
  • Patent number: 6759610
    Abstract: The number of LIMMS devices in an assembly is increased by stacking multiple layers of LIMMS devices on top of one another, and interconnecting those device layers at an array of solder pads using solder balls. Each device layer uses vias to bring the needed conductors to the array of solder pads. All signals for the entire multi-layer assembly can be routed through the bottom LIMMS device layer to pass, through another array of solder pads onto a “mother substrate” of ceramic or other material that carries the multi-layer assembly. Alternatively, signals may enter or leave the upper LIMMS device layer by way of a flexible printed circuit harness. Vias may pass, either directly or by “dog legs” on interior surfaces, completely through the bottom LIMMS device layer, and through other device layers as needed.
    Type: Grant
    Filed: June 5, 2003
    Date of Patent: July 6, 2004
    Assignee: Agilent Technologies, Inc.
    Inventors: Lewis R. Dove, Marvin Glenn Wong
  • Patent number: 6760676
    Abstract: Once an eye diagram measurement is begun and there is an eye diagram displayed, different on-screen measurement tools may be used singly, or in combination. Each measurement involves indicating with cursors and line segments regions of the eye diagram that are of interest, and a parameter or parameters associated with each measurement tool in use is reported in a (usually) separate area of the display. An Eye Limits measurement allows the specification of a point within an eye diagram, whereupon it finds and reports the eye diagram coordinates first encountered along horizontal and vertical lines extended from the selected point (i.e., “eye opening” size). The coordinates of the point itself are also reported. A Four Point Box measurement allows the construction on the eye diagram of a rectangle having sides parallel to the coordinate axes of the eye diagram.
    Type: Grant
    Filed: July 31, 2002
    Date of Patent: July 6, 2004
    Assignee: Agilent Technologies, Inc.
    Inventor: Richard A Nygaard, Jr.
  • Patent number: 6753677
    Abstract: Trigger jitter in an internally triggered real time digital oscilloscope can be reduced through correcting the horizontal position value obtained from a conventional trigger interpolation mechanism by an error or substitute amount learned from an inspection of the acquisition record that notes where in the acquisition record the signal actually crossed the trigger threshold. The display (and measurement) sub-systems that utilize the selection by panning and zooming of a portion of the acquisition record for viewing (and measurement) are supplied with the acquisition record portion of interest, and with an associated horizontal position value that originates with trigger interpolation and that may be subsequently modified by panning.
    Type: Grant
    Filed: February 28, 2003
    Date of Patent: June 22, 2004
    Assignee: Agilent Technologies, Inc.
    Inventors: Dennis J Weller, Steven D Draving, Ralph Urban
  • Patent number: 6750413
    Abstract: Channels and cavities in a LIMMS device are formed from a layer of thick film dielectric material deposited on a substrate, which layer is then covered with a thin cover plate of ceramic or perhaps glass. The layer of dielectric material may be patterned using established thick film techniques, and good dimensional control can be achieved. The dielectric layer is itself its own hermetic seal against the substrate, and readily lends itself to the formation of the additional hermetic seal needed between itself and the cover plate. Suitable thick film dielectric materials that may be deposited as a paste and subsequently cured include the KQ 150 and KQ 115 thick film dielectrics from Heraeus and the 4141A/D thick film compositions from DuPont.
    Type: Grant
    Filed: April 25, 2003
    Date of Patent: June 15, 2004
    Assignee: Agilent Technologies, Inc.
    Inventors: Lewis R Dove, Marvin Glenn Wong
  • Patent number: 6748562
    Abstract: A test program generates transmit vectors (stimuli) and receive vectors (expected responses). The transmit vectors are applied to the DUT, while the receive vectors are treated as comparison values used to decide if a response from the DUT is as expected. While programming a FLASH part the test program uses TAG RAM techniques to maintain a BAD COLUMN table in one of the memory sets. This BAD COLUMN table is addressed by the same address that is applied to the DUT. If an OMIT BAD COLUMN mode is in effect, entries in this table are, by automatic action of the memory tester hardware, obtained and used to supply a replacement programming data value of all 1's that will produce an immediate and automatic indication of successful programming from the DUT. This prevents spending extra time programming a column that has been determined to be bad, without requiring an alteration in the internal mechanism of the test program.
    Type: Grant
    Filed: October 31, 2000
    Date of Patent: June 8, 2004
    Assignee: Agilent Technologies, Inc.
    Inventors: Alan S Krech, Jr., John M Freeseman, Ken Hanh Duc Lai
  • Patent number: 6737636
    Abstract: Optical navigation upon grainy surfaces whose orientation is inclined at about 45° to the X and Y axes of the navigation mechanism is enhanced by: First, detect that a spatial filter in use is inappropriate for the orientation presently occurring, and; Second, employ a different and more appropriate spatial filter subsequent to such detection. Two spatial filters have been developed that are respectively effective about the 45° and 135° inclinations of the Standard filter. The shape of a correlation surface used in the navigation process is tested for the presence of a transverse ridge in the correlation surface. This generates control metrics whose filtered excursions are tracked by a control system that changes the spatial filter in use. The control system incorporates a time constant to prevent thrashing and excessive sensitivity to isolated random variations.
    Type: Grant
    Filed: June 3, 2003
    Date of Patent: May 18, 2004
    Assignee: Agilent Technologies, Inc.
    Inventors: Zachary Dietz, Charles E Moore, Hugh Wallace
  • Patent number: 6732128
    Abstract: A DDS (Direct Digital Synthesis) frequency synthesizer can be adapted to operate as a pseudo random noise generator by including a swept address ingredient that distributes (but does not eliminate) repetitive frequency components that would otherwise appear in the output of the basic DDS technique, (which fetches fixed but randomized values from a waveform memory). These residual distributed long period frequency components in the output of a swept DDS pseudo random noise generator are suppressed by making the sweep itself irregular. The noise generator includes an Address Increment Register (AIR) whose content: (1) alters the address used to fetch fixed randomized values from the waveform memory; and (2) is incremented to produce the swept address (different sequences of addresses). At some point the AIR value has been incremented as high as it will go (i.e., the end of the sweep has been reached), and the process must start over.
    Type: Grant
    Filed: January 30, 2001
    Date of Patent: May 4, 2004
    Assignee: Agilent Technologies, Inc.
    Inventor: Christopher P J Kelly
  • Patent number: 6693918
    Abstract: A solution to the word alignment problem in a Serializer Deserializer (SERDES)/Media Access Controller environment is to have for each SERDES lane: a recovered clock, a Write Pointer counter and a FIFO. Misaligned words are simply stored in their FIFO's according to the respective recovered clocks and straightforward increments of the various Write Pointers WP_i. One of the lanes is selected as a reference, and the contents of the other FIFO's are inspected to determine the nature of their misalignment, if any. Then the values from the Read Pointer counters RP_i are individually offset by corresponding amounts to compensate for the misalignment, so that when data is read it is indeed aligned. These offsets by corresponding amounts are simply individual per lane adjustments to the various Read Pointers, and cooperate with the adjustments to those Read Pointer for rate matching.
    Type: Grant
    Filed: April 28, 2000
    Date of Patent: February 17, 2004
    Assignee: Agilent Technologies, Inc.
    Inventors: Michael J Dallabetta, Herman Pang
  • Patent number: 6690398
    Abstract: A logic analyzer integrates the capabilities of both textual and graphical description into a common environment, so that each can be used as needed, and in conjunction with the other. In an example embodiment a trigger specification can comprise many “steps”. A step can be conceptualized as an atomic segment of flow charting that involves or investigates a quantity or condition of interest. These steps may involve testing, and a decision concerning whether or not to trigger or whether or not to advance to a next step. A given step can be either textual or graphical. A GUI (Graphical User Interface, as in computer windows, and not to be confused with ‘graphical’ meaning ‘waveform-like’) on a CRT screen in conjunction with a pointing device (e.g., mouse) provides the presentation of the integrated textual and graphical (waveform-like) trigger specification steps.
    Type: Grant
    Filed: January 27, 2000
    Date of Patent: February 10, 2004
    Assignee: Agilent Technologies, Inc.
    Inventors: Douglas James Beck, Michael Shaun Backsen, Douglas Fred Robison, John Howard Friedman
  • Patent number: 6687861
    Abstract: The data path into a post decode mechanism is altered to allow post decode to process data before or as that data is placed into a destination memory structure in interior test memory. Other data will continue to be first placed into a memory structure in interior test memory before being applied to the post decode mechanism. Extensive masking capability coupled with copies of error tables allow incremental post decode analysis for a new test, and avoids counting of errors in locations that are already known to have failed during previous tests. Both errors within words and bit errors can be accumulated. The post decode mechanism is often capable of producing multiple type of results from a single pass through the data, whether applied on the fly or from a structure in interior test memory. The post decode mechanism has counters that count down from pre-loaded values representing thresholds for deciding something about error activity. A counts of zero produces a terminal count flag.
    Type: Grant
    Filed: October 31, 2000
    Date of Patent: February 3, 2004
    Assignee: Agilent Technologies, Inc.
    Inventors: Stephen D Jordan, John M Freeseman, Samuel U Wong
  • Patent number: 6677929
    Abstract: An optical fingertip tracker, which may be a pseudo trackball, responds to the motion of the texture on one of the user's digits pressed against an image input aperture to produce motion signals processed within an appliance to be controlled. The appliance may have a minimal GUI, such as an LCD display having only a modest number of low resolution pixel locations and/or preestablished characters or icons. An appliance control parameter is set or adjusted in response to translation of the fingertip along a particular axis. E.g., to enter a parameter value (volume) a changing bar graph can be displayed. The display might even be omitted; to set the tone control of an audio appliance it can be sufficient to simply adjust the tone until the result is as desired. A numeric display of control parameter digits may be desirable, as when moving the fingertip tunes a receiver. There can be several particular axes along which fingertip movement changes an associated appliance control parameter.
    Type: Grant
    Filed: March 21, 2001
    Date of Patent: January 13, 2004
    Assignee: Agilent Technologies, Inc.
    Inventors: Gary B. Gordon, Edward L Miller
  • Patent number: 6671844
    Abstract: A memory tester supports testing of multiple DUT's of the same type at a test site. The tester can be instructed to replicate the segments of the test vectors needed to test one DUT on the channels for the other DUT's. This produces patterns of transmit and receive vectors that are n-many DUT's wide. Conditional branching within the test program in response to conditions in the receive vectors (DUT failure) is supported by recognizing several types of error indications and an ability to selectively disable the testing of one or more DUT's while continuing to test the one or more that are not disabled. Also included are ways to remove or limit stimulus to particular DUT's, and ways to make all comparisons for a particular DUT appear to be “good.
    Type: Grant
    Filed: October 2, 2000
    Date of Patent: December 30, 2003
    Assignee: Agilent Technologies, Inc.
    Inventors: Alan S Krech, Jr., John M Freeseman, Randy L Bailey, Edmundo De La Puente