Patents Represented by Attorney Edward L. Miller
-
Patent number: 6668235Abstract: An eye diagram analyzer can assign a plurality of SUT data signals to be members of a labeled group of channels. There may be a plurality of such groups. The measured data for components within a group can be merged according to various different modes into a composite eye diagram presentation. When a composite eye diagram is being displayed, the operator may position a screen pointer (cursor) over some interesting part of the eye diagram, and the analyzer will display a list those channels that contributed to the displayed pixels in that part of the eye diagram, as well as other related information. The operator may also select a channel from among the group, and then have the displayed pixels for which it is responsible be displayed in a selected color or otherwise highlighted in a way that allows them to be distinguished from all others.Type: GrantFiled: March 28, 2002Date of Patent: December 23, 2003Assignee: Agilent Technologies, Inc.Inventors: Richard A Nygaard, Jr., Jeffrey John Haeffele
-
Patent number: 6657184Abstract: A mouse for navigating upon grainy surfaces is equipped with at least two optical navigation circuits having different views of the work surface and whose axes may be non-parallel. For each navigation circuit an indication of navigation impairment owing to grain is detected. A suitable algorithm chooses from among the various navigation circuits which one's output to use. The multiple optical navigation circuits can each be separate self-contained mechanisms on separate dies or they can be separate sections of a single integrated circuit. The various metrics used within a navigation circuit for spatial filter selection can be further used by the navigation circuit selection algorithm. Each optical navigation circuit can have its own light source, or they can share a common one. They may also share any imaging optics, although each navigation sensor sees a different image.Type: GrantFiled: October 23, 2001Date of Patent: December 2, 2003Assignee: Agilent Technologies, Inc.Inventors: Mark A Anderson, Brian J. Misek, Allen C. Norskog, Zachary Dietz
-
Patent number: 6653957Abstract: Improvement in the transmission of Boundary Scan Test mode data may be achieved through the assignment of boundary scan test mode traffic to selected bit patterns that facilitate clock recovery and frame alignment in the serial channel. The encoding of boundary scan test traffic as such may be achieved through either multiplexed transmission to the serializer/deserializer (SERDES) alongside a regular channel encoder or incorporated into the channel encoder.Type: GrantFiled: October 8, 2002Date of Patent: November 25, 2003Assignee: Agilent Technologies, Inc.Inventors: Sylvia Patterson, Jeff Rearick
-
Patent number: 6646527Abstract: Resonance within an attenuator relay caused by stray coupling capacitances to, and stray reactance within the switched conductor that replaces the attenuator section, is mitigated by reducing the stray coupling capacitances to as low a value as possible, and by using a conductor that is a section of controlled impedance transmission line that matches the system into which the attenuator relay has been placed. A substrate having SPDT LIMMS switches on either side of a switched transmission line segment and its associated attenuator, all of which are fabricated on the substrate, will have significantly lower stray coupling capacitance across the open parts of the switches when the attenuator segment is in use. This will increase the frequency for the onset of the resonance driven by the RF voltage drop across the attenuator. A reduction in the amplitude of the resonance can be obtained by including on the substrate an additional pair of LIMMS damping switches at each end of the transmission line segment.Type: GrantFiled: April 30, 2002Date of Patent: November 11, 2003Assignee: Agilent Technologies, Inc.Inventors: Lewis R Dove, John R Lindsey, David J Dascher
-
Patent number: 6640882Abstract: A removably mounted fan for an active heat sink, and the mounting of that combination to a part to be cooled, is obtained by: (1) The use a fan that engages and registers itself upon and against a top peripheral surface surrounding a cavity where the fan is to be located; (2) Holding the fan in place with one or more resilient mounting clips that span the distance from the top of the fan and an opposing outside bottom surface of the active heat sink; and, (3) Providing the resilient mounting clips with outward projecting mounting tabs that are flexible and resilient and that have mounting holes through which the resilient mounting clips (and the active heat sink they grip) can be attached to an assembly carrying the part to be cooled, such that the bottom of the active heat sink is in good thermal contact with that part.Type: GrantFiled: July 31, 2001Date of Patent: November 4, 2003Assignee: Agilent Technologies, Inc.Inventors: James Glenn Dowdy, Guy Diemunsch, Guy R Wagner
-
Patent number: 6633213Abstract: A plurality of Liquid Metal Micro Switches (LIMMS) are mounted on opposite sides of a multi-layer substrate. Vias on the substrate and located within the footprints of the LIMMS serve to make connection with the LIMMS. Traces on the internal layers of the multi-layer substrate are routed around and over each other to arrive at a perimeter surrounding the LIMMS, where they emerge again as vias and are available for interconnection with further circuitry via conventional techniques, such as solder balls, wire bonding, a socket, etc. The multi-layer substrate may also incorporate a ground plane to assist in shielding and the fabrication of any interconnecting transmission lines.Type: GrantFiled: April 24, 2002Date of Patent: October 14, 2003Assignee: Agilent Technologies, Inc.Inventor: Lewis R Dove
-
Patent number: 6615369Abstract: Waveform segment(s) of interest in the displayed logic analyzer trace can create the desire in an operator to re-define the trigger specification to be those segments. Those waveform segments are identified to the logic analyzer by drawing a “rubber band” box around them even as they are displayed as part of the trace. The analyzer is instructed to automatically create therefrom, by itself, the desired new trigger specification. It does this by inspecting the captured data corresponding to the contents of the box and creating a description of the associated signal(s) in terms of transitions and steady state conditions. These individual descriptions of activity are then assembled into a trigger specification according to certain rules. More than one box may be drawn. Multiple-boxes may be “stacked” to include waveform segments separated vertically by intervening waveforms for other signals that are to be excluded.Type: GrantFiled: January 31, 2000Date of Patent: September 2, 2003Assignee: Agilent Technologies, Inc.Inventors: Douglas J. Beck, John H. Friedman, Douglas F. Robison
-
Patent number: 6609925Abstract: A solution to problems of poor RF performance in conventional BNC connectors is to first, eliminate the use of Teflon, in favor of an air dielectric in the vicinity of the mating parts, and support the male and female center pins further back within the body of the connector, using other proven dielectric materials borrowed from the precision type N connector, or from another 7 mm RF connector. Next, a captive knurled draw nut provides positive displacement and the tension needed to draw the already mated male and female connector halves together, in place of the conventional spring tension. It is the bottoming out of the male shell inside the female shell that resists the positive displacement and the tension supplied by the knurled draw nut, ensuring that the two connector halves are actually in contact, and that the edges of shell surfaces that need to “vanish” for good operation do indeed vanish.Type: GrantFiled: April 30, 2002Date of Patent: August 26, 2003Assignee: Agilent Technologies, Inc.Inventor: James Edward Cannon
-
Patent number: 6602093Abstract: A solution to problems of poor RF performance in conventional BNC connectors is to first, eliminate the use of Teflon, in favor of an air dielectric in the vicinity of the mating parts, and support the male and female center pins further back within the body of the connector, using other proven dielectric materials borrowed from the precision type N connector, or from another 7 mm RF connector. Next, a captive knurled draw nut provides positive displacement and the tension needed to draw the already mated male and female connector halves together, in place of the conventional spring tension. It is the bottoming out of the male shell inside the female shell that resists the positive displacement and the tension supplied by the knurled draw nut, ensuring that the two connector halves are actually in contact, and that the edges of shell surfaces that need to “vanish” for good operation do indeed vanish.Type: GrantFiled: August 22, 2002Date of Patent: August 5, 2003Assignee: Agilent Technologies, Inc.Inventor: James Edward Cannon
-
Patent number: 6603111Abstract: Optical navigation upon grainy surfaces whose orientation is inclined at about 45° to the X and Y axes of the navigation mechanism is enhanced by: First, detect that a spatial filter in use is inappropriate for the orientation presently occurring, and; Second, employ a different and more appropriate spatial filter subsequent to such detection. Two spatial filters have been developed that are respectively effective about the 45° and 135° inclinations of the Standard filter. The shape of a correlation surface used in the navigation process is tested for the presence of a transverse ridge in the correlation surface. This generates control metrics whose filtered excursions are tracked by a control system that changes the spatial filter in use. The control system incorporates a time constant to prevent thrashing and excessive sensitivity to isolated random variations.Type: GrantFiled: April 30, 2001Date of Patent: August 5, 2003Assignee: Agilent Technologies, Inc.Inventors: Zachary Dietz, Charles E Moore, Hugh Wallace
-
Patent number: 6574764Abstract: The problem is to branch back to an appropriate location within a memory tester test program, and also restore its state of algorithmic control, when an error associated therewith occurs later in time at the DUT. Owing to delays in pipelines connecting the program execution environment to the DUT and back again. These delays allow the program to arbitrarily advance beyond where the stimulus was given. The arbitrary advance makes it difficult to determine the exact circumstances that were associated with the error. A branch based on the error signal can restart a section of the test program, but it is likely only a template needing further test algorithm control information that varies dynamically as the test program executes. The solution is to equip the memory tester with History FIFO's whose depths are adjusted to account for the sum of the delays of the pipelines, relative to the location of that History FIFO.Type: GrantFiled: April 25, 2001Date of Patent: June 3, 2003Assignee: Agilent Technologies, Inc.Inventors: Alan S. Krech, Jr., Stephen D Jordan
-
Patent number: 6573597Abstract: Quasi-coaxial transmission lines to be “crossed” (over) are fabricated on a substrate. There are two cases: a true ground plane of metal will cover the substrate, or, each quasi-coaxial transmission line will have its own separate meandering bottom-half ground shield. In either case, when the crossed quasi-coaxial transmission lines are complete they will have top-half ground shields connected to metal against the substrate that is ground. If there is no ground plane the “crossing” quasi-coaxial transmission line that is to cross over must now have its bottom-half ground shield applied. It can overlay any top-half ground shield for any crossed quasi-coaxial transmission line that is in its path. If there is a ground plane, then that step is not necessary. Now a bottom-half layer of KQ dielectric material is applied along the path of the crossing quasi-coaxial transmission line. To this layer of KQ dielectric material is applied a layer of metal that becomes the center conductor.Type: GrantFiled: October 29, 2001Date of Patent: June 3, 2003Assignee: Agilent Technologies, Inc.Inventors: Lewis R Dove, John F Casey, Anthony R Blume
-
Patent number: 6534844Abstract: A hybrid circuit having a quasi-coaxial fully shielded conductor, and incorporating a ground plane on the component side of a substrate, can bypass and/or filter a signal using integrated thick film components and without through holes or vias. A thin pad of suitable dielectric material may be printed onto the ground plane and then have a layer of metal deposited on its top surface, forming a bypass capacitor. The bypass capacitor can be located very near where it is needed, and only a very short conductor is required to connect the metallic top of the bypass capacitor to the location to be bypassed. The short connecting conductor does not go from one side of the substrate to the other, and the thickness and low dielectric constant of the substrate do not compromise the value of the bypass capacitor. Thick film resistors can be included to form filters, and surface mount resistors and capacitors can be used also.Type: GrantFiled: October 30, 2001Date of Patent: March 18, 2003Assignee: Agilent Technologies, Inc.Inventors: Lewis R Dove, John F Casey, Anthony R Blume
-
Patent number: 6469558Abstract: A voltage ramp/threshold variable pulse delay circuit implemented on an IC varies the R instead of the C, which may be fixed. A variable R is formed by a plurality of FET's arranged in parallel. The FET's are sized according to a weighting scheme, which may be binary, and the amount of R produced is determined by which combination of FET's is switched ON, rather than by analog variations in their drive level. If the plurality of sized parallel FET's is made up of individual FET's all of the same polarity, then an undesirable reduction in voltage comparison range will obtain, which may produce an objectionable reduction in available pulse delay if VDD is reduced such that it is no longer many times larger than FET threshold voltage. That reduction in voltage comparison range can be eliminated by replacing each such individual FET with a pair of similarly sized FET's in parallel, the members of which pair are of opposite polarities.Type: GrantFiled: April 25, 2000Date of Patent: October 22, 2002Assignee: Agilent Technologies, Inc.Inventors: Shad R. Shepston, M. Jason Welch
-
Patent number: 6457979Abstract: A solution to the problem of connecting a merchant straight through coaxial RF connector to an quasi-coaxial transmission line formed on the substrate of a hybrid is to, if necessary, gradually increase the height of the center conductor of the quasi-coaxial transmission line by increasing the thickness of underlying deposited dielectric until the center conductor of the transmission line matches the position of the center conductor of the connector, which two may then be joined with solder or conductive adhesive. One style of coaxial RF connector of interest has four prongs disposed in a rectangle around the center conductor on the permanent and non-threaded side.Type: GrantFiled: October 29, 2001Date of Patent: October 1, 2002Assignee: Agilent Technologies, Inc.Inventors: Lewis R Dove, Marvin G Wong, John F Casey, Wesley C Whiteley
-
Patent number: 6455836Abstract: The number of masking operations needed to connect photo-return current to ground or a bias potential can be reduced by collecting and rearranging the conventional steps to become: (A) Depositing a P layer of hydrogenated amorphous silicon (a-Si:H) upon an underlying layer of intrinsic hydrogenated amorphous silicon, and a layer of conductive ITO on top of the P layer; (B) Patterning all three of the layers deposited in step (A); and (C) Depositing and then patterning the layer of W that serves as the optical barrier. The above steps (A)-(C) require only two masking operations, in comparison to three for the conventional method. In addition, the W layer can be used to connect the ITO to ground or the bias potential.Type: GrantFiled: April 25, 2000Date of Patent: September 24, 2002Assignee: Agilent Technologies, Inc.Inventor: David W Hula
-
Patent number: 6433780Abstract: An optical mouse images as an array of pixels the spatial features of generally any micro textured or micro detailed work surface below the mouse. The photo detector responses are digitized and stored as a frame into memory. Motion produces successive frames of translated patterns of pixel information, which are compared by autocorrelation to ascertain the direction and amount of movement. A hold feature suspends the production of movement signals to the computer, allowing the mouse to be physically relocated on the work surface without disturbing the position on the screen of the pointer. This may be needed if the operator runs out of room to physically move the mouse further, but the screen pointer still needs to go further. The hold feature may be implemented with an actual button, a separate proximity detector or by detecting the presence of a characteristic condition in the digitized data, such as loss of correlation or velocity in excess of a selected limit.Type: GrantFiled: January 2, 2001Date of Patent: August 13, 2002Assignee: Agilent Technologies, Inc.Inventors: Gary B. Gordon, Derek L. Knee, Rajeev Badyal, Jason T. Hartlove
-
Patent number: 6396479Abstract: An ergonomic mouse that alleviates mouse RSI is obtained by gripping the mouse with a pinching action between the thumb and opposing fingers while the mouse is in the U-shaped opening formed in the hand when in a neutral and unflexed condition with the little finger and the heel of the palm opposite the thumb resting upon a work surface. The mouse has two gripping surfaces; one receives the thumb and the other the opposing fingers. Indentations in the gripping surfaces help locate the finger tips. Mouse buttons are located in the indentations. The gripping surfaces are inclined toward each other, so that the pinching action to actuate the mouse buttons produces a slight downward force toward a base surface that rests upon and slides over the work surface. The little finger is allowed to drag on the work surface to assist in fine positioning. Preferably, the mouse utilizes an optical motion sensing technique instead of the conventional rubber coated steel ball.Type: GrantFiled: March 14, 2001Date of Patent: May 28, 2002Assignee: Agilent Technologies, Inc.Inventor: Gary B. Gordon
-
Patent number: 6329936Abstract: Spurious artifacts in intensity emulation caused by measurement non-linearities within a statistically created raster display are reduced or eliminated by first characterizing the non-linearities. Armed with this information the collection of code values in an aperture can be inspected to notice which code values are occurring. M-many out of every n-many instances of a fat code can be replaced by an adjacent code, with a frequency of replacement that is selected to counteract the fatness. In principle, the replacement mechanism could be sensitive to prior events and propagate or distribute corrections across a family of abnormal codes. The idea is to statistically adjust the collection of codes to be closer to what it would be if there were no non-linearities. Different non-linearities may benefit from different strategies for replacement. Certain safeguards may be desirable to prevent making the problem worse rather than better.Type: GrantFiled: October 30, 1998Date of Patent: December 11, 2001Assignee: Agilent Technologies Inc.Inventor: Daniel P. Timm
-
Patent number: 6320812Abstract: DRAM speed of operation in an Error Catch RAM can be increased by a combination of interleaving signals for different Banks of memory in a Group thereof and multiplexing between those Groups of Banks. A three-way multiplexing between three Groups of four Banks each, combined with a flexible four-fold interleaving scheme for signals to a Group produces an increase in speed approaching a factor of twelve, while requiring only three memory busses. Each of the twelve Banks represents the entire available address space, and any individual write cycle might access any one of the twelve Banks. A utility mechanism composes results for all twelve Banks during a read cycle at an address into a unified result. There is a mechanism to track of the integrity of the composed results, as further write operations can produce the need for another composing step. There are four Memory Sets, two are “internal” SRAM's and two are “external” DRAM's.Type: GrantFiled: September 20, 2000Date of Patent: November 20, 2001Assignee: Agilent Technologies, Inc.Inventors: John H. Cook, III, Preet P. Singh, Edmundo De la Puente