Patents Represented by Attorney Farjami & Farjami LLP
  • Patent number: 8352217
    Abstract: A system and method for controlling performance and/or power based on monitored performance characteristics. Various aspects of the present invention may comprise an integrated circuit comprising a first circuit module that receives electrical power. A second circuit module may monitor one or more performance characteristics of the first circuit module and/or the integrated circuit. A third circuit module may, for example, determine power control information based at least in part on the monitored performance characteristic(s). The power control information may be communicated to power supply circuitry to control various characteristics of the electrical power. Various aspects of the present invention may also comprise an integrated circuit comprising a first module that monitors at least one performance characteristic of a first electrical device.
    Type: Grant
    Filed: January 26, 2012
    Date of Patent: January 8, 2013
    Assignee: Broadcom Corporation
    Inventors: Neil Y. Kim, Pieter Vorenkamp
  • Patent number: 8350376
    Abstract: According to an exemplary embodiment, a bondwireless power module includes a common output pad coupling an emitter/anode node of a high side device to a collector/cathode node of a low side device. The bondwireless power module also includes a high side conductive clip connecting a collector of the high side device to a cathode of the high side device, and causing current to traverse through the high side conductive clip to another high side conductive clip in another power module. The bondwireless power module further includes a low side conductive clip connecting an emitter of the low side device to an anode of the low side device, and causing current to traverse through the low side conductive clip to another low side conductive clip in the another power module. The bondwireless power module can be a motor drive inverter module.
    Type: Grant
    Filed: April 18, 2011
    Date of Patent: January 8, 2013
    Assignee: International Rectifier Corporation
    Inventors: Henning M. Hauenstein, Andrea Gorgerino
  • Patent number: 8351853
    Abstract: Methods and systems for a configurable finite impulse response (FIR) filter using a transmission line as a delay line are disclosed and may include selectively coupling one or more taps of a multi-tap transmission line to configure delays for one or more finite impulse response (FIR) filters to enable transmission and/or reception of signals. The delays may be configured based on a location of the one or more selectively coupled taps on the multi-tap transmission line. The FIR filters, which may include one or more stages, may be impedance matched to the selectively coupled taps. The multi-tap transmission line may be integrated on the chip, or a package to which the chip is coupled. The multi-tap transmission line may include a microstrip structure or a coplanar waveguide structure, and may include ferromagnetic material. The distortion of signals in the chip may be compensated utilizing the FIR filters.
    Type: Grant
    Filed: March 5, 2012
    Date of Patent: January 8, 2013
    Assignee: Broadcom Corporation
    Inventors: Ahmadreza Rofougaran, Maryam Rofougaran
  • Patent number: 8350288
    Abstract: Semiconductor structures comprising a III-nitride (e.g., gallium nitride) material region and methods associated with such structures are provided. In some embodiments, the structures include an electrically conductive material (e.g., gold) separated from certain other region(s) of the structure (e.g., a silicon substrate) by a barrier material in order to limit, or prevent, undesirable reactions between the electrically conductive material and the other component(s) which can impair device performance. In certain embodiments, the electrically conductive material may be formed in a via. For example, the via can extend from a topside of the device to a backside so that the electrically conductive material connects a topside contact to a backside contact. The structures described herein may form the basis of a number of semiconductor devices including transistors (e.g., PET), Schottky diodes, light-emitting diodes and laser diodes, amongst others.
    Type: Grant
    Filed: November 22, 2011
    Date of Patent: January 8, 2013
    Assignee: International Rectifier Corporation
    Inventors: Robert J. Therrien, Jerry W. Johnson, Allen W. Hanson
  • Patent number: 8350630
    Abstract: Aspects of a method and system for LOGEN based on harmonics using microstrip techniques may include generating an output local oscillator signal from a non-sinusoidal input local oscillator signal by filtering the non-sinusoidal input local oscillator signal via a microstrip filter, wherein the output local oscillator signal may comprise a fundamental frequency that may be given by a harmonic frequency of the non-sinusoidal input local oscillator signal. The microstrip filter may be a programmable bandpass filter or a programmable stopband filter. The microstrip filter may be tuned to the harmonic frequency. The microstrip filter may be configured by adjusting a center frequency via a capacitance and/or an inductance. The bandwidth of the microstrip filter may be configured. The microstrip filter may be a programmable coplanar waveguide filter, and its center frequency may be configured via an inductance and/or a capacitance.
    Type: Grant
    Filed: September 28, 2007
    Date of Patent: January 8, 2013
    Assignee: Broadcom Corporation
    Inventors: Ahmadreza Rofougaran, Maryam Rofougaran
  • Patent number: 8350296
    Abstract: An enhancement mode III-Nitride device has a floating gate spaced from a drain electrode which is programmed by charges injected into the floating gate to form a permanent depletion region which interrupts the 2-DEG layer beneath the floating gate. A conventional gate is formed atop the floating gate and is insulated therefrom by a further dielectric layer. The device is a normally off E mode device and is turned on by applying a positive voltage to the floating gate to modify the depletion layer and reinstate the 2-DEG layer. The device is formed by conventional semiconductor fabrication techniques.
    Type: Grant
    Filed: August 21, 2008
    Date of Patent: January 8, 2013
    Assignee: International Rectifier Corporation
    Inventor: Hamid Tony Bahramian
  • Patent number: 8344417
    Abstract: The invention provides semiconductor materials including a gallium nitride material layer formed on a silicon substrate and methods to form the semiconductor materials. The semiconductor materials include a transition layer formed between the silicon substrate and the gallium nitride material layer. The transition layer is compositionally-graded to lower stresses in the gallium nitride material layer which can result from differences in thermal expansion rates between the gallium nitride material and the substrate. The lowering of stresses in the gallium nitride material layer reduces the tendency of cracks to form. Thus, the invention enables the production of semiconductor materials including gallium nitride material layers having few or no cracks. The semiconductor materials may be used in a number of microelectronic and optical applications.
    Type: Grant
    Filed: January 27, 2012
    Date of Patent: January 1, 2013
    Assignee: International Rectifier Corporation
    Inventors: T. Warren Weeks, Jr., Edwin L. Piner, Thomas Gehrke, Kevin J. Linthicum
  • Patent number: 8343824
    Abstract: Gallium nitride material devices and related processes are described. In some embodiments, an N-face of the gallium nitride material region is exposed by removing an underlying region.
    Type: Grant
    Filed: June 20, 2008
    Date of Patent: January 1, 2013
    Assignee: International Rectifier Corporation
    Inventors: Edwin Lanier Piner, Jerry Wayne Johnson, John Claassen Roberts
  • Patent number: 8343856
    Abstract: Semiconductor structures comprising a III-nitride (e.g., gallium nitride) material region and methods associated with such structures are provided. In some embodiments, the structures include an electrically conductive material (e.g., gold) separated from certain other region(s) of the structure (e.g., a silicon substrate) by a barrier material in order to limit, or prevent, undesirable reactions between the electrically conductive material and the other component(s) which can impair device performance. In certain embodiments, the electrically conductive material may be formed in a via. For example, the via can extend from a topside of the device to a backside so that the electrically conductive material connects a topside contact to a backside contact. The structures described herein may form the basis of a number of semiconductor devices including transistors (e.g., FET), Schottky diodes, light-emitting diodes and laser diodes, amongst others.
    Type: Grant
    Filed: November 22, 2011
    Date of Patent: January 1, 2013
    Assignee: International Rectifier Corporation
    Inventors: Robert J. Therrien, Jerry W. Johnson, Allen W. Hanson
  • Patent number: 8345746
    Abstract: A quantizer and method are disclosed.
    Type: Grant
    Filed: September 22, 2008
    Date of Patent: January 1, 2013
    Assignee: Smith Micro Software, Inc.
    Inventor: Brainerd Sathianathan
  • Patent number: 8344464
    Abstract: One exemplary disclosed embodiment comprises a semiconductor package including multiple transistors coupled to an exposed conductive clip. A driver integrated circuit (IC) may control the transistors to implement a buck converter. By exposing a top surface of the exposed conductive clip outside of a mold compound of the package, enhanced thermal performance is provided. Additionally, the conductive clip provides a short distance, high current carrying route between transistors of the package, providing higher electrical performance and reduced form factor compared to conventional designs with individually packaged transistors.
    Type: Grant
    Filed: May 19, 2011
    Date of Patent: January 1, 2013
    Assignee: International Rectifier Corporation
    Inventor: Eung San Cho
  • Patent number: 8344658
    Abstract: A method and circuit are provided for matching the brightness of a plurality of lamps driven by an AC drive current. The method may comprise the steps of: determining a brightness of each of said plurality of lamps, while said plurality of lamps are on, by using a current sensing device; selecting a first lamp having a lowest brightness from said plurality of lamps; and reducing a brightness of a second lamp to match said lowest brightness of the first lamp by interrupting the AC drive current in said scond lamp periodically for a predetermined number of half-cycles of said AC drive current. According to another implementation, a reference brightness maybe selected, or optionally a reference AC current level, and the method may reduce the drive current periodically so as to set the lamp brightness in relation to the reference brightness or optionally the reference AC current level.
    Type: Grant
    Filed: January 18, 2007
    Date of Patent: January 1, 2013
    Assignee: International Rectifier Corporation
    Inventors: Thomas J. Ribarich, Edgar Abdoulin
  • Patent number: 8344797
    Abstract: Direct current (DC) offset in and audio driver can cause a constant drain on power even when there is no sound. Furthermore it can cause an audible pop when the audio driver is enabled. A scaled replica output stage can be employed to perform DC offset cancellation offline during a sampling phase. Once DC offset cancellation is achieved, the audio driver uses a full scale output stage during the operation phase.
    Type: Grant
    Filed: November 20, 2009
    Date of Patent: January 1, 2013
    Assignee: Conexant Systems, Inc.
    Inventors: Lorenzo Crespi, Christian Larsen
  • Patent number: 8346181
    Abstract: Methods and systems for power combining in a multi-port distributed antenna are disclosed and may include power combining signals from power amplifiers (PAs) on a chip. The PAs may be coupled to a single distributed antenna via antenna ports. A phase of each of the signals may be matched at the antenna ports via phase-matching circuitry. A characteristic impedance may be configured at the ports based on a location of the ports. The PAs may be impedance matched to the antenna ports via impedance matching elements. A power level of the power-combined signals may be monitored via a power detector coupled to the distributed antenna. The power detector may include an envelope detector, such as a diode. The antenna may be integrated on the chip or may be located external to the chip. The signals may include RF signals and the antenna may include a microstrip antenna.
    Type: Grant
    Filed: April 5, 2012
    Date of Patent: January 1, 2013
    Assignee: Broadcom Corporation
    Inventors: Ahmadreza Rofougaran, Maryam Rofougaran
  • Patent number: 8338861
    Abstract: A III-nitride heterojunction power semiconductor device that includes a passivation body with a gate well having a top mouth that is wider than the bottom mouth thereof, and a method of fabrication for the same.
    Type: Grant
    Filed: January 9, 2008
    Date of Patent: December 25, 2012
    Assignee: International Rectifier Corporation
    Inventors: Michael A. Briere, Paul Bridger, Jianjun Cao
  • Patent number: 8340712
    Abstract: Aspects of a method and system for utilizing a diplexer/duplexer for WCDMA operation as a filter for supporting GSM-based operation are provided. A receiver portion of a wireless device may receive WCDMA signals and GSM signals via at least one duplexer or diplexer. The duplexers may enable bandpass filtering of received GSM signals. The wireless device may enable receiving the WCDMA signals and the GSM signals via a single antenna coupled to the duplexers. The receiver portion may also enable selecting a processing path for received WCDMA signals or a processing path for received GSM signals. The receiver portion may enable amplification and filtering of the WCDMA signals. Filtering of the WCDMA signals may be performed via surface acoustic wave (SAW) filters. The receiver portion may also enable filtering of the GSM signals via the duplexers and amplification of the filtered GSM signals.
    Type: Grant
    Filed: September 29, 2006
    Date of Patent: December 25, 2012
    Assignee: Broadcom Corporation
    Inventor: Ahmadreza Rofougaran
  • Patent number: 8334732
    Abstract: Aspects of a method and system for generating quadrature signals utilizing an on-chip transformer are provided. In this regard, a pair of phase-quadrature signals may be generated from a single-phase signal via a transformer, one or more variable capacitors, and one or more variable resistors integrated on-chip. The transformer may comprise a plurality of loops fabricated in a plurality of metal layers in the chip. Each of the one or more variable capacitors may comprise a configurable capacitor bank and each of the one or more variable resistors may comprise a configurable resistor bank. The one or more capacitor banks may be programmatically configured on-chip, based on a frequency of the single-phase signal. The one or more resistor banks may be programmatically configured on-chip, based on a frequency of said single-phase signal.
    Type: Grant
    Filed: November 29, 2011
    Date of Patent: December 18, 2012
    Assignee: Broadcom Corporation
    Inventors: Ahmadreza Rofougaran, Maryam Rofougaran
  • Patent number: 8335793
    Abstract: There is provided a system and method for optimized filtered data feeds to capture data and send to multiple destinations. There is provided a system comprising a memory and a processor. The memory has a database associating data feed patterns to one or more of a plurality of destinations. The processor captures data from a data feed having a data feed destination, stores the data in the memory, compares the data feed with the data feed patterns in the database to determine matched patterns, retrieves one or more destinations associated with the matched patterns, and sends the data to the data feed destination and the retrieved destinations. There is also provided a system comprising data feed sources, destinations, a network connected to the data feed sources and the destinations, and a server configured to intercept and route network traffic on the network, the server including a memory and a processor.
    Type: Grant
    Filed: August 22, 2008
    Date of Patent: December 18, 2012
    Assignee: Disney Enterprises, Inc.
    Inventors: James R. Young, Jr., Nathan Fong, Henrik Steen, Srinivasan Sudanagunta
  • Patent number: 8330521
    Abstract: A level shift circuit in accordance with the present application seeks to meet the need of high voltage level shift signaling with minimum delay and power dissipation by using parasitic emulation, blocking of signaling during times of common mode noise, and mismatch filtering to enhance operation robustness to circuit mismatch and delay. A dv/dt sensing circuit is provided to detect any slew in offset between negative supply voltages and ground in a circuit. This detection is used to control a noise canceling circuit to ensure that noise that results from that offset is not propagated to the output of the level shift circuit. A parasitic emulator is preferably used to provide dv/dt sensing. The output of the parasitic emulator is used to activate a noise canceling circuit to prevent noise from reaching the output terminal of the level shift circuit.
    Type: Grant
    Filed: May 1, 2008
    Date of Patent: December 11, 2012
    Assignee: International Rectifier Corporation
    Inventors: Mathias Duppils, Min Fang
  • Patent number: 8330769
    Abstract: There are provided systems and methods for tinting an image by monochromatic tinting using saturation maps for use by an application providing a user interface supporting customizable tinted images. By using saturation map and a monochromatic value map derived from the image and configuring the saturation map to specify areas for tinting, a tint color can be applied to the image by a series of quickly processed arithmetic calculations. This provides a lightweight and high quality method for tinting images within an application without wasting unnecessary network bandwidth or processor resources. Furthermore, the method can be adapted to apply multiple tint colors for multiple tints or use an alpha channel to restore color information lost due to the monochromatic value map. The resulting tinted image can also be used as a texture for a three-dimensional rendering engine.
    Type: Grant
    Filed: January 9, 2009
    Date of Patent: December 11, 2012
    Assignee: Disney Enterprises, Inc.
    Inventors: Matthew Moore, Jackson Dunstan