Abstract: Methods and systems for a low noise amplifier utilizing a leaky wave antenna are disclosed and may include one or more low-noise amplifiers (LNAs) coupled to one or more leaky wave antennas (LWAs) in a wireless device. RF signals may be received via one or more LNAs coupled to one or more feed points on a LWA. The one or more LNAs may be coupled to the feed points based on an impedance of the feed points and an input impedance of the one or more LNAs. The impedance of the feed points may be configured by locating them along a vertical axis in a resonant cavity of the LWA. The LWAs may be integrated on a chip, and/or on a package or printed circuit board to which the chip is affixed. The RF signals may be amplified by the LNAs and may be down-converted to baseband signals.

Abstract: A received plurality of signals may be filtered to select an in-band signal and/or an out-of-band. A signal strength of the selected signal(s) may be measured. A resolution of an analog-to-digital converter may be controlled based on the measured signal strength(s). The selected in-band signal may be converted to a digital representation via the analog-to-digital converter. The resolution may be decreased when the strength of the in-band signal is higher, and increased when the strength of the in-band signal is lower. The resolution may be increased when the strength of the out-of-band signal is higher, and decreased when the strength of the out-of-band signal is lower. A signal-to-noise ratio and/or dynamic range of the selected signal(s) may be determined based on the measured signal strength(s), and may be utilized to adjust the resolution of the analog-to-digital converter.

Abstract: A transcoder is provided that achieves lower complexity without picture quality loss. The transcoder may be either an open loop transcoder or a closed loop transcoder.

Abstract: Methods and systems for an n-phase transmitter utilizing a leaky wave antenna (LWA) are disclosed and may include transmitting an n-phase wireless signal at a first frequency via the LWA utilizing a plurality of second frequency signals from one or more signal sources, and the second frequency may be lower than the first frequency. Each of the second frequency signals may be configured with a phase difference and may be communicated to the LWA utilizing one or more power amplifiers (PAs). The PAs may be operated in switching mode, thereby generating a square wave. The LWAs may be integrated on the chip, on a package to which the chip is affixed, and/or on a printed circuit board to which the chip is affixed. Square wave signals may be generated utilizing the signal sources. The transmitted wireless signal may be amplitude modulated utilizing a bias voltage applied to the LWAs.

Abstract: Disclosed is a Class-AB/B amplifier comprising a first output stage including a first plurality of amplification devices and a second output stage including a second plurality of amplification devices. According to one embodiment, the first output stage operates when the Class-AB/B amplifier is in a quiescent state and the second output stage operates when the Class-AB/B amplifier is in an active state. The Class-AB/B amplifier also comprises a level shifting circuit that adjusts a control voltage of the second output stage, where the level shifting circuit is adapted to activate the second output stage when the Class-AB/B amplifier enters the active state. Embodiments of the Class-AB/B amplifier may include a level shifting circuit that implements either a fixed or signal-dependent level shift, and a quiescent control circuit that substantially eliminates any systematic offset arising from the active feedback circuit inside the replica bias circuit.

Abstract: A power semiconductor device which includes a gate contact on one surface thereof connected to a gate bus on another opposing surface thereof using a conductive body extending through a via between the two surfaces of the device.

Abstract: Aspects of a method and system for identifying a radio frequency identification (RFID) tag location using a switchable coil are presented. Aspects of the systems may include one or more processors that enable selection of an inductor coil from a plurality of inductor coils. The selection of the inductor coil may be based on a change in an electromagnetic field, with respect to an initial electromagnetic field, as detected by the selected inductor coil. The processors may enable transmission of a signal, having a transmitter frequency in the UHF frequency band, via the selected inductor coil.

Abstract: Aspects of a method and system for inter-PCB communication utilizing a spatial multi-link repeater are provided. In this regard, a signal may be transmitted between printed circuit boards via one or more repeaters, wherein the repeaters may frequency shift received signals to generate repeated signals. Each of the repeated signals may be generated by quadrature down-converting said received signal by mixing the received signal with a first LO signal pair, up-converting the down-converted signal by mixing it with a second LO signal pair, and adding or subtracting an in-phase portion and a quadrature-phase portion of the up-converted signal. Each repeated signal may comprise one or more signal components and a phase and/or amplitude of each of the components may be controlled to control a directivity of the repeated signals. The repeater may reside on one of the plurality of printed circuit boards.

Abstract: A wireless device comprising a plurality of chips may be operable to dynamically configure wireless communication between the plurality of chips. Each of the chips may include one or more transceivers and one or more integrated directional antennas communicatively coupled to the one or more transceivers. The communications link between chips in the wireless device may be dynamically configured via control of the transceivers and/or the integrated directional antennas. The antennas may include patch antennas and/or dipole antennas. The transceivers may be configured by controlling output power of power amplifiers or by controlling gain of low noise amplifiers. The communications link may be dynamically configured by controlling a characteristic impedance of the antennas for impedance matching to transceivers. A frequency of the communication link may be controlled by configuring the antennas. A bandwidth of the communications link may be configured based on activity of processors in the wireless device.

Abstract: There is presented a system for recording a performance by a real-time performer interacting with a virtual object. The disclosed system comprises a projection module including a polarizing filter, the projection module configured to generate a polarized visible image corresponding to the virtual object. The system includes a surface for displaying the polarized visible image, the surface viewable by the real-time performer. The system also includes a recording module including a reverse-polarizing filter, the reverse-polarizing filter configured to reverse-polarize images of the performance by the real-time performer and the surface displaying the polarized visible image to produce reverse-polarized images. The recording module is configured to record the reverse-polarized images. In one embodiment, the system further comprises a rendering module configured to render the virtual object into the recorded performance.

Abstract: A disclosed embodiment is a programmable integrated circuit such as an audio processor or a base band processor for generating a low noise and programmable microphone bias voltage or current. The programmable integrated circuit generates a programmable reference input, where the reference input is programmably generated from at least one power source, such as a on-chip audio power supply, an on-chip power supply, or an off-chip power supply, for use by a regulator. The regulator in the programmable integrated circuit receives a bias input and the programmable reference input and generates a programmable output for biasing a microphone. The bias input for the regulator can be provided by an off-chip power supply or an on-chip power supply. The reference input provided to the regulator can be appropriately filtered to reduce noise. In one embodiment, the programmable reference input and the programmable output are programmed by first and second potentiometers, respectively.

Abstract: According to one exemplary embodiment, an active termination circuit includes at least one active termination branch, where the at least one active termination branch includes at least one transistor for providing an active termination output. The at least one active termination branch further includes an amplifier driving the at least one transistor, where the amplifier has a non-inverting input coupled to the active termination output via a feedback network. The amplifier controls a current flowing through the at least one transistor so as to provide the active termination output. The active termination output can be provided at a drain of the at least one transistor, where a source of the at least one transistor is coupled to ground through a degeneration transistor and a tail current sink.

Abstract: There is provided a digital repeater module and method for relaying digital data. The digital repeater module comprises a data reception unit configured to receive digital data from several broadcast devices concurrently, a data transmission unit configured to transmit digital data using a multiple transmission protocols concurrently, and a routing application. The routing application can receive digital data through the data reception unit, identify available data paths for relaying the digital data to desired destinations, and determine transmission metrics for each of the available data paths for relaying the digital data to the desired destinations. The routing application can also select data paths for transmission based on the determined transmission metrics, and transmit the digital data using the selected data paths through the data transmission unit. There is also provided a method for resolving assignment of limited broadcast frequencies using the digital repeater module.

Abstract: Methods and systems for an integrated leaky wave antenna-based transmitter and on-chip power distribution are disclosed, and may include supplying one or more bias voltages and ground for a chip including a plurality of power amplifiers (PAs) utilizing bias voltage and ground lines. One or more leaky wave antennas (LWAs) may be communicatively coupled to the power amplifiers. Wireless signals may be transmitted utilizing the LWAs integrated in the lines in the chip. Radio frequency (RF) signals may be transmitted via the plurality of LWAs. The RF signals may include 60 GHz signals and the LWAs may include microstrip and/or coplanar waveguides. A cavity length of the LWAs may be configured by a spacing between conductive lines in the microstrip and/or coplanar waveguides. The LWAs may be configured to transmit the wireless signals at a desired angle from a surface of the chip.

Abstract: A method for forming an integrated circuit system includes providing an integrated circuit device; and forming an integrated contact over the integrated circuit device including: providing a via over the integrated circuit device; forming a selective metal in the via; forming at least one nanotube over the selective metal; and forming a cap over the nanotubes.

Abstract: Aspects of a method and system for utilizing direct digital frequency synthesis in multi-band applications are provided. A direct digital frequency synthesizer integrated in a multiband wireless receiver chip may be enabled to generate one or more reference signals that may be utilized to down-convert VHF, UHF and L-band signals to baseband signals. The direct digital frequency synthesizer may further generate one or more reference signals, which may be utilized to calibrate one or more circuits that process received VHF, UHF, and L-band signals. In this regard, the signals generated by the direct digital frequency synthesizer may be utilized to calibrate one or more LNAs in a receive processing chain of the chip and/or one or more filters that may be utilized to process baseband signals.

Abstract: A method for forming an integrated circuit system is provided including forming a semi-conducting layer over a substrate, forming a spacer stack having a gap filler adjacent to the semi-conducting layer and a inter-layer dielectric over the gap filler, forming a transition layer having a recess over the semi-conducting layer and adjacent to the spacer stack, and forming a metal layer in the recess.

Abstract: Aspects of a method and system for supporting a variable and energy efficient data rate using a duty cycling technique and multiple power states on an Ethernet link are provided. In this regard, a data rate on a network link may be duty cycled based on characteristics of data communicated over it. The network link may operate at a first data rate for a first portion of the time interval and may operate at a second data rate for a second portion of the time interval. The duration of each portion of the time interval and/or the data rate during each portion of the time interval may be adjusted to control the duty cycling. Power consumed in a device connected to the network link may be controlled based on the duty cycling of the link.

Abstract: Methods and systems for utilizing undersampling for crystal leakage cancellation are disclosed and may include undersampling a composite signal comprising a desired signal and leakage signals due to one or more clock signals. Measured DC signals generated by each of the undersampled signals may be reduced by adjusting the phase and/or amplitude of the clock signals. The undersampling may be performed at one or more of the one or more clock signals, or at integer sub-harmonics of the clock signals. The composite signal may include a signal received by a wireless system or a signal to be transmitted by the wireless system. The undersampled signals may be low-pass filtered. The desired signal may include in-phase and quadrature signals or a polar signal. The undersampling may be performed by one or more sample and hold circuits and the clock signals may be generated utilizing one or more crystal oscillators.

Abstract: A streaming appliance having an internal quantizer is disclosed so that the bit rate of a streamed video can be adjusted based on the current conditions of a link between the streaming appliance and one or more target devices.