Patents Represented by Attorney Fellers, Snider, et al.
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Patent number: 7872827Abstract: Various embodiments of the present invention are generally directed to protecting a device from damage due to an impact event at the conclusion of a free fall condition through the use of a biasing signal that maintains a retention force until the impact event is completed.Type: GrantFiled: July 27, 2007Date of Patent: January 18, 2011Assignee: Seagate Technology LLCInventors: JiaHong Shu, TzeMing Jimmy Pang, WeiSung Lee, KianKeong Ooi, KianSoon Yeo, Xiong Liu
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Patent number: 7859069Abstract: The present invention relates to a memory cell including a first reference layer having a first magnetization with a first magnetization direction and a second reference layer having a second magnetization with a second magnetization direction substantially perpendicular to the first magnetization direction. A storage layer is disposed between the first reference layer and second reference layer and has a third magnetization direction about 45° from the first magnetization direction and about 135° from the second magnetization direction when the memory cell is in a first data state, and a fourth magnetization direction opposite the third magnetization direction when the memory cell is in a second data state.Type: GrantFiled: March 16, 2007Date of Patent: December 28, 2010Assignee: Seagate Technology LLCInventors: Kaizhong Gao, Haiwen Xi, Yiming Shi, Song S. Xue, Sining Mao
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Patent number: 7855923Abstract: Apparatus and method for write current compensation in a non-volatile memory cell, such as but not limited to spin-torque transfer random access memory (STRAM) or resistive random access memory (RRAM). In accordance with some embodiments, a non-volatile memory cell has a resistive sense element (RSE) coupled to a switching device, the RSE having a hard programming direction and an easy programming direction opposite the hard programming direction. A voltage boosting circuit includes a capacitor which adds charge to a nominal non-zero voltage supplied by a voltage source to a node to generate a temporarily boosted voltage. The boosted voltage is applied to the switching device when the RSE is programmed in the hard programming direction.Type: GrantFiled: April 17, 2009Date of Patent: December 21, 2010Assignee: Seagate Technology LLCInventors: Hai Li, Yiran Chen, Harry Hongyue Liu, Henry Huang, Ran Wang
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Patent number: 7852660Abstract: An apparatus and method for enhancing read and write sense margin in a memory cell having a resistive sense element (RSE), such as but not limited to a resistive random access memory (RRAM) element or a spin-torque transfer random access memory (STRAM) element. The RSE has a hard programming direction and an easy programming direction. A write current is applied in either the hard programming direction or the easy programming direction to set the RSE to a selected programmed state. A read circuit subsequently passes a read sense current through the cell in the hard programming direction to sense the selected programmed state of the cell.Type: GrantFiled: April 17, 2009Date of Patent: December 14, 2010Assignee: Seagate Technology LLCInventors: Wenzhong Zhu, Hai Li, Yiran Chen, Xiaobin Wang, Henry Huang, Haiwen Xi
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Patent number: 7852665Abstract: Various embodiments of the present invention are generally directed to a method and apparatus for sensing a programmed state of a memory cell, such as a spin-torque transfer random access memory (STRAM) cell. A first read current is applied to the memory cell to generate a first voltage. A second read current is subsequently applied to the memory cell to generate a second voltage, with the second read current being proportional in magnitude to the first read current. A comparison is made between the first and second voltages to determine the programmed state of the memory cell.Type: GrantFiled: March 18, 2009Date of Patent: December 14, 2010Assignee: Seagate Technology LLCInventors: Yiran Chen, Hai Li, Wenzhong Zhu, Xiaobin Wang, Ran Wang, Harry Hongyue Liu
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Patent number: 7849261Abstract: Method and apparatus for reducing a likelihood of a cascade failure in a multi-device array. The array preferably comprises a controller and a plurality of storage devices to define a memory space across which data are stored in accordance with a selected RAID configuration. The controller operates to sever an operational connection between the storage devices and a host device in relation to a detected temperature of at least one storage device of the array. Preferably, when a selected device reaches a first threshold temperature level, the controller arms for a potential shutdown. When a selected device reaches a second higher threshold temperature, the controller preferably powers down all of the devices and executes a self-reboot operation. The controller preferably monitors a temperature of the array while the devices remain powered down, after which the storage devices are powered up and data reconstruction operations take place as required.Type: GrantFiled: June 29, 2006Date of Patent: December 7, 2010Assignee: Seagate Technology LLCInventors: James Edwin Pherson, Timothy E. Arnson
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Patent number: 7845725Abstract: An apparatus for use in accommodating public seating needs is disclosed. Preferably, the apparatus includes at least a pair of parallel backbone members, a support leg in sliding engagement with the pair of parallel backbone members, a combination seating surface and backrest portion in sliding engagement with the pair of parallel backbone members, and adjacent the support leg, and an end cap secured to the pair of parallel backbone members, and restricting lateral motion of the support leg and the combination seating surface and backrest portion along the pair of parallel backbone members. Preferably the apparatus further accommodates lateral motion of the support leg and the combination seating surface and backrest portion along the pair of parallel backbone members, upon removal of the end cap from the pair of parallel backbone members.Type: GrantFiled: August 16, 2005Date of Patent: December 7, 2010Assignee: RKS Design, Inc.Inventor: Ravi K. Sawhney
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Patent number: 7847567Abstract: Apparatus and method for performing a verification buy-off operation during an assembly manufacturing process, such as during printed circuit board (PCB) manufacturing. A processing device is configured to establish contact between a probe assembly and a first component of an assembly having a plurality of components loaded in predetermined positions but not yet electrically intercoupled, and to receive from the probe assembly a component value associated with the first component. Preferably, the processing device further determines whether the received component value is within a predetermined specification. The processing device preferably directs a user via a graphical user interface (GUI) to manipulate the probe assembly to a position proximate the first component. The GUI preferably provides a graphical representation of the assembly and a marker that identifies the location of the first component thereon.Type: GrantFiled: April 10, 2007Date of Patent: December 7, 2010Assignee: Seagate Technology LLCInventors: GimHong Koh, MaoLong Wang, Srinivas Garrepally, Salim Ahmad
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Patent number: 7836611Abstract: A combination that preferably includes at least a main body portion, a heel portion hinged to the main body portion, and a toe portion in sliding engagement with the main body portion, which collectively forms a ski boot attachment by steps for assembling a ski boot attachment is disclosed. The ski boot attachment preferably assembled by steps that include at least installing a spring mount within a component cavity of a main chassis, positioning a release spring within the component cavity, placing an extension control member within the component cavity in abutting contact with the release spring, compressing the release spring with the extension control member, sliding a slide member into the component cavity into sliding contact with the extension control member, attaching a main spring to the spring mount and the slide member, and securing a chassis cover to the main chassis.Type: GrantFiled: October 12, 2006Date of Patent: November 23, 2010Inventors: David R. Sellers, Ravi K. Sawhney, Kurt Botsai, Robb Englin, Simon Risley, John Vernon
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Patent number: 7839178Abstract: An apparatus and method for detecting a phase difference between an input signal and a reference signal in an all-digital phase locked loop (PLL) are provided. In a preferred embodiment, an N-stage tapped delay line and N-bit parallel latch are used to create a snapshot of the input signal by latching the output of the tapped delay line using the reference signal to clock the latch. An edge detector and encoder circuit translate the latched snapshot into a numerical phase difference value. A difference between this phase difference value and a desired phase difference is calculated and then added to an accumulator. The result in the accumulator is a numerical phase error value that can be fed to a numerically controlled oscillator (NCO). The output of the NCO can, in turn, be fed back into the phase/frequency comparator as the input signal, thus forming a fully-digital PLL.Type: GrantFiled: July 23, 2003Date of Patent: November 23, 2010Assignee: Seagate Technology LLCInventor: Sundeep Chauhan
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Patent number: 7830708Abstract: Method and apparatus for compensating for variations in memory cell programmed state distributions, such as but not limited to a non-volatile memory formed of NAND configured Flash memory cells. In accordance with various embodiments, a memory block is formed from a plurality of memory cells that are arranged into rows and columns within the memory block, each memory cell configured to have a programmed state. A selected row of the memory block is read by concurrently applying a stepped sequence of threshold voltages to each memory cell along the selected row while sequentially decoupling read current from groups of memory cells along the selected row as the programmed states of said groups of cells are successively determined.Type: GrantFiled: April 22, 2009Date of Patent: November 9, 2010Assignee: Seagate Technology LLCInventors: Chulmin Jung, Yong Lu, Harry Hongyue Liu
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Patent number: 7830700Abstract: Various embodiments of the present invention are generally directed to a method and apparatus for carrying out a partial block update operation upon a resistive sense memory (RSM) array, such as formed from STRAM or RRAM cells. The RSM array is arranged into multi-cell blocks (sectors), each block having a physical block address (PBA). A first set of user data is written to a selected block at a first PBA. A partial block update operation is performed by writing a second set of user data to a second block at a second PBA, the second set of user data updating a portion of the first set of user data in the first PBA. The first and second blocks are thereafter read to retrieve the second set of user data and a remaining portion of the first set of user data.Type: GrantFiled: November 12, 2008Date of Patent: November 9, 2010Assignee: Seagate Technology LLCInventors: Yiran Chen, Daniel S. Reed, Yong Lu, Harry Hongyue Liu, Hai Li
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Patent number: 7830726Abstract: Method and apparatus for writing data to a storage array, such as but not limited to an STRAM or RRAM memory array, using a read-mask-write operation. In accordance with various embodiments, a first bit pattern stored in a plurality of memory cells is read. A second bit pattern is stored to the plurality of memory cells by applying a mask to selectively write only those cells of said plurality corresponding to different bit values between the first and second bit patterns.Type: GrantFiled: September 30, 2008Date of Patent: November 9, 2010Assignee: Seagate Technology LLCInventors: Henry F. Huang, Hai (Helen) Li, Yong Lu
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Patent number: 7830693Abstract: Various embodiments are directed to an apparatus comprising a semiconductor memory array with non-volatile memory unit cells arranged into a NAND block. Each of the unit cells comprises a resistive sense element connected in parallel with a switching element. The resistive sense elements are connected in series to form a first serial path, and the switching elements are connected in series to form a second serial path parallel to the first serial path. Each resistive sense element is serially connected to an adjacent resistive sense element in the block by a tortuous conductive path having a portion that extends substantially vertically between said elements to provide operational isolation therefor.Type: GrantFiled: November 12, 2008Date of Patent: November 9, 2010Assignee: Seagate Technology LLCInventors: Harry Hongyue Liu, Haiwen Xi, Antoine Khoueir, Song Xue
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Patent number: 7831624Abstract: Apparatus and method for efficiently arranging and searching data in a memory space, such as a cache memory of a data storage array controller. A data structure comprises a skip list of nodes having an array of forward pointers. Each node has a node level derived from an index at which the node is stored in a table in the memory space. The total available number of nodes is preferably selected to be less than half of the largest power of 2 that can be expressed by a number of bits of the index, and the nodes are preferably stored at only even or only odd indices of the table. In such case, a free list of nodes is preferably generated from an array of pairs of counts and indices to identify the available nodes. Additional table structures can further be provided to enhance data arrangement and searching functions.Type: GrantFiled: June 24, 2005Date of Patent: November 9, 2010Assignee: Seagate Technology LLCInventors: Clark Edward Lubbers, Robert Michael Lester
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Patent number: 7814970Abstract: A downhole tool deployment apparatus is disclosed, which preferably includes at least an in-ground well casing, a depth determination device providing a hermetically sealed electronics compartment, tool attachment portions, and a first flow through core. The depth determination device is preferably configured for sliding communication with the well casing. The hermetically sealed electronics compartment secures a processor and a location sensing system, which communicates with the processor while interacting exclusively with features of the well casing to determine the location of the depth determination device within the well casing. A preferred embodiment further includes a well plug affixed to the tool attachment portion, the well plug includes a second flow through core capped with a core plug with a core plug release mechanism, which upon activation provides separation between the second flow through core and the core plug, allowing material to flow through said first and second flow through cores.Type: GrantFiled: March 8, 2010Date of Patent: October 19, 2010Assignee: Intelligent Tools IP, LLCInventor: Dennis A. Strickland
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Patent number: 7817259Abstract: An apparatus and associated method for measuring spatial characteristics of a test object with stacked features. First and second measurement assemblies for measuring opposing first and second planar features, respectively, of a test object, by directing light beams into a gap between the features to measure a position and a static attitude of each feature.Type: GrantFiled: March 29, 2007Date of Patent: October 19, 2010Assignee: Seagate Technology LLCInventors: Ronald Jacob Smith, John George Gerogeorge, Sham Sunder Nayar, Mark Curtis Fahrendorff, Shawn Stephen Silewski
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Patent number: 7813083Abstract: A load arm for a disk drive may include a base section that has an opening for receiving a spindle of a voice coil motor. The base section may have hinge arms that extend from the base section and terminate in tab portions. An arm section may be affixed to the tabs of the hinge arms of the base section such as by spot welding. A head suspension assembly may be affixed to a distal end of the arm section such as by spot welding. A sensor may be provided on a hinge arm of the base section. The sensor may comprise a piezoelectric polymer sensing element and an electrode formed over the piezoelectric polymer sensing element.Type: GrantFiled: January 17, 2007Date of Patent: October 12, 2010Assignee: Maxtor CorporationInventors: Wei Guo, Yanchu Xu, Jifang Tian
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Patent number: 7805764Abstract: Method and apparatus for providing a hidden signature to a recording medium, such as an optical disc (102). The hidden signature is generated in relation to the selected sequencing of data blocks (132, 134, 136, 138, 140, 142). A plurality of) mutually exclusive, valid possible states are identified for each of the data blocks (202), each state conforming to requirements set forth by a published standards document to which the optical disc conforms. A different logical value is assigned to each of the possible states, and the hidden signature is selected as a multi-value logical word comprising a sequence of the logical values (204). The hidden signature is thereafter written to the optical disc by writing a set of corresponding data blocks at selected locations on the optical disc having states corresponding to the multi-value logical word (206). The hidden signature thereafter facilitates copy protection or forensic tracking efforts (208).Type: GrantFiled: March 31, 2000Date of Patent: September 28, 2010Assignee: Doug Carson & Associates, Inc.Inventor: Douglas M. Carson
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Patent number: 7798528Abstract: A transport caddy preferably includes at least a wheel supporting a base portion, an alpine snow ski detachably secured between the base and cover portions, and a ski pole disposed within the cover portion and secured adjacent the alpine snow ski by an accessories support portion detachably attached to the alpine snow ski is provided. Preferably, the ski pole is secured to the transport caddy by steps that include at least: positioning a tip of the ski pole within a pole tip confinement aperture provided by the cover; rotating a ski pole confinement member of the accessories support portion into non-adjacency with a ski pole retention portion of the accessories support portion; disposing a shaft portion of said ski pole within the ski pole retention portion; and re-rotating said ski pole confinement member into pressing contact with the shaft portion.Type: GrantFiled: May 31, 2006Date of Patent: September 21, 2010Inventors: David R. Sellers, Deanna L. Griffith, Daniel W. Ashcraft, Gregory S. Thüne