Patents Represented by Attorney Francis J. Thornton
  • Patent number: 4373966
    Abstract: This describes four distinct methods of forming copper and silicon doped aluminum conductive structures on the surface of the semiconductor body which when sintered will form in conjunction with the exposed surface of the silicon body Schottky diodes which are resistant to internal field emission characteristics created by co-incidental copper-aluminum precipitates and aluminum doped solid phase epitaxial growths.
    Type: Grant
    Filed: April 30, 1981
    Date of Patent: February 15, 1983
    Assignee: International Business Machines Corporation
    Inventor: Sang U. Kim
  • Patent number: 4365163
    Abstract: This describes an automatic defect inspection system as could be applied to metallized masks or other patterns. The system causes each subfield to be individually aligned for inspection irrespective of the previous alignment of the pattern or any other sub-field. This is accomplished by scanning a preselected portion of each sub-field and adjusting the position of the scan based on the resulting signal while scanning a pre-established portion of the sub-field. In this way a portion of each sub-field is used as an alignment mark and stepping errors avoided.Once alignment is achieved a probe, comparable to the size of the minimum defect to be detected is scanned over the sub-field with an overlapping pattern to find defects such as excessive metal, metal in improper places or points where the metal is missing.
    Type: Grant
    Filed: December 19, 1980
    Date of Patent: December 21, 1982
    Assignee: International Business Machines Corporation
    Inventors: Donald E. Davis, Richard D. Moore, Philip M. Ryan, Edward V. Weber
  • Patent number: 4358831
    Abstract: An input bias circuit for a charge transfer device array in which the fat zero signal level is a function of device threshold voltage and other device parameters. The use of such a circuit eliminates the need to adjust or tune the reference or bias level from array to array. The circuit includes the addition of a diode connected field effect transistor and capacitor between the input device, the source of the first charge transfer device stage, and the input gating device such that the minimum discharge level is set, on the input node, a threshold voltage drop above the reference level. When device threshold voltages are higher the charge established on the input node is decreased to compensate for the decrease in charge transferred by the register stages. Matching of the sizes of the diode connected field effect transistor with the input device and the devices in each stage of the array insures accurate tracking with process variations.
    Type: Grant
    Filed: October 30, 1980
    Date of Patent: November 9, 1982
    Assignee: International Business Machines Corporation
    Inventor: James D. Tompkins
  • Patent number: 4356730
    Abstract: This describes a dual electrode electrostatically deflectable deformographic switch. The switch can be driven by co-incident voltages and can be made to retain and store information. The switch can be used either as a display or a memory and has a number of engineering advantages, for it is a direct drive display which does not need either vacuum envelopes or electron beam drives. Furthermore, greater efficiencies can be realized and no refresh is necessary since the switch will operate in a standby condition. Also only two voltage levels above ground, i.e., a write voltage and a standby voltage, are required. The switch will enable copiers to be directly driven by computers.The switch can also be used as an optical waveguide transmit/receive switch or an accelerometer.
    Type: Grant
    Filed: January 8, 1981
    Date of Patent: November 2, 1982
    Assignee: International Business Machines Corporation
    Inventor: Paul E. Cade
  • Patent number: 4357006
    Abstract: This is a vacuum clamp for holding workpieces which assures that the workpiece is held without distortion. This is accomplished by providing a fixed support, with a convex surface, and a flexible seal around the fixed support so that when a vacuum is drawn within the seal the workpiece being held abuts the fixed support tangentially. The convex surface of the support does not force the workpiece to conform to the surface of the support as it would if the surface of the support were flat.
    Type: Grant
    Filed: November 28, 1980
    Date of Patent: November 2, 1982
    Assignee: International Business Machines Corporation
    Inventor: Lawrence P. Hayes
  • Patent number: 4357540
    Abstract: This describes an automatic beam alignment and defect inspection system for masks. The system causes each field or sub-field to be individually aligned for inspection irrespective of the previous alignment of the mask or any other field or sub-field. This is accomplished by scanning a preselected portion of each field of sub-field, with a beam and adjusting the position of the deflection based on the reflected signal while scanning a pre-established portion of the selected field or sub-field. In this way a portion of each selected field or sub-field is used as an alignment mark and stepping errors avoided.Once alignment is achieved a beam spot, comparable to the size of the minimum defect to be detected is scanned over the selected field or sub-field with an overlapping scan to find defects such as mask material in improper places or points where the mask material is missing.
    Type: Grant
    Filed: December 19, 1980
    Date of Patent: November 2, 1982
    Assignee: International Business Machines Corporation
    Inventors: Charles E. Benjamin, David J. Crawford
  • Patent number: 4325025
    Abstract: An apparatus for measuring the surface potential and impurity concentration in a semi-conductor body by monitoring the current flowing in a semiconductor body when the body is biased with a ramp voltage above its flat band voltage and summing the monitored current with the ramp voltage biasing the body. The apparatus provides direct measurement of surface potential and impurity concentration in a semiconductor structure and is especially useful in metal insulator semiconductor (MIS) structures.
    Type: Grant
    Filed: May 22, 1980
    Date of Patent: April 13, 1982
    Assignee: International Business Machines Corporation
    Inventors: Richard A. Corcoran, William A. Keenan, Demetrios Michaelides, Bob H. Yun
  • Patent number: 4309716
    Abstract: This describes a novel bipolar dynamic cell array with increased dielectric node capacitance and a method of making it. In the described cell a PNP transistor drives an NPN transistor so that information is stored at the base node capacitance of the PNP transistor. By using the PNP transistor as a read transistor and the NPN as a write transistor, the cell, when made in integrated form, utilizes the cell isolation capacitance to enhance the stored information without increasing the parasitic capacitances in the cell. This cell isolation capacitance can be enhanced by trenching between each cell in the array, oxidizing the trench walls and backfilling the trench with semiconductor material thereby obtaining greater contrast between 0 and 1 signals. This cell is especially useful in memory arrays.
    Type: Grant
    Filed: October 22, 1979
    Date of Patent: January 5, 1982
    Assignee: International Business Machines Corporation
    Inventor: Badih El-Kareh
  • Patent number: 4308595
    Abstract: This describes a bipolar dynamic RAM cell array in which there is provided a plurality of capacitive storage data cells each being coupled to a respective capacitively loaded bit line and to one another through a common word line. A supply means is coupled to the word line for biasing each cell of the array with respect to its respective bit line to cause the bit line capacitance to set the conductive state of each cell so as to set the respective capacitive storage means of each cell to a selected charge state. The rate at which the storage means of any one cell reaches a selected state is a function of the charge state of any cell, and its respective bit line capacitance, positioned between the selected cell and the supply means.
    Type: Grant
    Filed: December 19, 1979
    Date of Patent: December 29, 1981
    Assignee: International Business Machines Corporation
    Inventor: Russell J. Houghton
  • Patent number: 4299866
    Abstract: This invention describes a method of masking a workpiece to prevent the adhesion of a deposited tightly adhering conformal coating formed from the condensation of a vaporous diradical such as paraxylylene on selected portions of the workpiece. Specifically the process of the invention requires the covering of the areas of the workpiece, to which adhesion is not desired, with a non-polymerizing hydrocarbon and placing the covered area in close contact with an open cellular material containing a predominance of interconnecting cells which provides a large surface area for condensation of the unwanted condensate of the diradical, exposing the workpiece to the vaporous diradical, removing the workpiece from the open cellular material and immersing the workpiece in a solvent for swelling and dissolving the hydrocarbon covering.
    Type: Grant
    Filed: July 31, 1979
    Date of Patent: November 10, 1981
    Assignee: International Business Machines Corporation
    Inventors: Roger J. Clark, Robert E. Kennison
  • Patent number: 4279023
    Abstract: This describes a sense latch for a bipolar dynamic array in which each cell is comprised of a capacitor and a pnp-npn transistor. Cell information is stored in the capacitor. The capacitor may be either a discreet capacitor or may be formed as part of the base node of the pnp transistor. The sense latch of the invention comprises a pair of cross coupled transistors coupled between a pair of capacitively loaded bit lines of the array with one of the bit lines being coupled to a data cell and the other being coupled to a reference cell. Means for precharging the bit lines to a fixed voltage level and means for reading the cell to charge one of the bit lines to a level greater than the precharge level and apply a differential signal to the latch are also provided so that during the reading cycle one of the transistors in the latch becomes turned on so that the voltage levels of both bit lines are determined by the characteristics of the turned on transistor only.
    Type: Grant
    Filed: December 19, 1979
    Date of Patent: July 14, 1981
    Assignee: International Business Machines Corporation
    Inventor: Russell J. Houghton
  • Patent number: 4264832
    Abstract: This is a feedback amplifier incorporating shunt feedback pairs which are emitter coupled for differential input transimpedance configuration whose characteristic includes a low differential input impedance and a high common load impedance that uses low input offset voltages to initiate the amplification and a latch coupled thereto to latch and amplify the amplifier input causing the effective amplifier input to be several orders of magnitude greater than the initial offset voltages. Thus, the amplifier of the invention uses the latch to not only sense the output of the amplifier but also the drive and reinforce the amplifier input through feedback.
    Type: Grant
    Filed: April 12, 1979
    Date of Patent: April 28, 1981
    Assignee: IBM Corporation
    Inventor: Anatol Furman
  • Patent number: 4263669
    Abstract: This discloses a pattern generator having a programmable product cycle timer in which a pulse train, i.e., the pattern generated, having a time raster measurable to one nanosecond can be repeated or switched from a first pulse frequency to a second pulse frequency without the usual transient switching periods between pulses. The invention accomplishes this by providing the generator with a cycle timer using a ten nanosecond clock operating in conjunction with a ten nanosecond down counter so that a pre-selected time interval, before the end of the pulse is achieved, a test is made to determine if a required condition needing a different pulse frequency exists. If such a condition does not exist the present pulse frequency is reinitiated so that at count 0 it is repeated without delay.
    Type: Grant
    Filed: June 22, 1979
    Date of Patent: April 21, 1981
    Assignee: International Business Machines Corporation
    Inventor: Dieter E. Staiger
  • Patent number: 4261681
    Abstract: This describes an improved apparatus for transferring articles along an arcuate path. The apparatus has a multi-armed turret driven by a stepping motor around a center point. The turret has an article holding head on the end of each arm to which vacuum and pressure must be applied at different times. The vacuum and pressure is applied to the holding head from fixed sources through a single rotary vacuum-pressure distributive valve. The valve is comprised of a fixed input plate and motor driven rotary output plate mounted thereon. The rotary output plate is coupled to the turret by flexible tubing and driven by a second stepping motor in synchronization with the turret driving stepping motor. This synchronous driving of the output plate of the valve with a motor separate from that driving the turret prevents the valve vacuum-pressure loading friction from affecting the turret drive. This reduces accumulative rotary error in the turret.
    Type: Grant
    Filed: August 18, 1978
    Date of Patent: April 14, 1981
    Assignee: International Business Machines Corporation
    Inventor: Gerald A. Gates
  • Patent number: 4261095
    Abstract: A method of forming a self aligned guard ring surrounding a schottky barrier diode device without requiring an enlargement of the final schottky barrier device. The method involves creating an overhanging opening in a insulator layer overlying a semiconductor body to expose the schottky contact area on the surface of the semiconductor body, depositing a diffusion barrier material such as molybdenum in the opening, the deposit being of the same size as the smallest part of the overhanging opening so that a guard ring can be formed from a vapor by diffusion around the deposited barrier material.
    Type: Grant
    Filed: December 11, 1978
    Date of Patent: April 14, 1981
    Assignee: International Business Machines Corporation
    Inventors: Richard F. Dreves, John F. Fresia, Sang U. Kim, John J. Lajza, Jr.
  • Patent number: 4255216
    Abstract: The invention discloses a method of separating a glass mask from a pellicle ring adhesively mounted thereon. This is accomplished by maintaining a coolant in contact with the mask for a period of time sufficient to cool the adhesive bond between the mask and pellicle ring to below its embrittlement temperature so that when a shearing force is applied to the ring with respect to the glass mask will cause shearing of the adhesive bond at the adhesive glass mask interface. When pressure is applied to the ring across the adhesive, separation at the surface of the mask occurs and the ring is released from the mask without damage to the mask or the ring and without leaving significant amounts of adhesive on the surface of the mask. Pellicles removed in this manner can be rebonded at a later time to a glass mask using the same adhesive and without using additional adhesive.
    Type: Grant
    Filed: January 14, 1980
    Date of Patent: March 10, 1981
    Assignee: International Business Machines Corporation
    Inventors: Jay W. Conant, Donald W. Fisher, David D. Fox
  • Patent number: 4203543
    Abstract: This discloses a pattern generator having a programmable product cycle timer in which a pulse train, i.e., the pattern generated can be repeated or switched from a first pulse frequency to a second pulse frequency without the usual transient switching periods between pulses. The invention accomplishes this by providing the generator with a cycle timer using a clock operating in conjunction with a down counter so that at a pre-selected time interval, before the end of the pulse is achieved, a test is made to determine if a required condition needing a different pulse frequency exists. If such a condition does not exist the present pulse frequency is reinitiated so that at count 0 it is repeated without delay. If the required condition does exist loading of the needed pulse frequency is initiated so that upon termination of the presently existing pulse at count 0, the newly selected pulse will be introduced into the product being tested without delay.
    Type: Grant
    Filed: August 4, 1978
    Date of Patent: May 20, 1980
    Assignee: International Business Machines Corporation
    Inventor: Dieter Staiger
  • Patent number: 4157560
    Abstract: A smaller, faster, more efficient photo detector cell can be created with improved photo sensitivity in the short wavelength regions, using well known integrated circuit production techniques, by forming the photo sensitive junction of the device in an isolated region of a thin epitaxial layer overlying a thin subcollector so as to use all the current generated in the cell. The cell thus comprises a semiconductor body having an epitaxial layer thereon which is divided into isolated pockets containing a photosensitive junction overlying a subcollector region formed at a depth of less than 10 microns between the substrate and the epitaxial layer. The photo sensitive junction of the device merges with the isolation region so that a single continuous P-N junction surrounds substantially all subcollectors and the isolated pocket of epitaxial material. A device constructed as taught realizes approximately 100% quantum efficiency over a wide range of incident light.
    Type: Grant
    Filed: December 30, 1977
    Date of Patent: June 5, 1979
    Assignee: International Business Machines Corporation
    Inventor: Paul E. Cade
  • Patent number: 4132818
    Abstract: This describes an apparatus and method for providing a uniform deposition of a layer from a reactive gas over a large area load by entraining the reactive gas or gases in a carrier gas and sequentially changing the concentration of the reactive gas or gases and the flow rate of the carrier gas as they flow over the load to cause the time integrated deposition rate to be substantially constant over the entire surface of the load, thus depositing a uniformly thick layer over the entire area of the load. These changes in concentration and flow rate shift the center of distribution of the reaction rate across the load such that the time integral of such shifting results in a uniformity of deposition.
    Type: Grant
    Filed: June 29, 1976
    Date of Patent: January 2, 1979
    Assignee: International Business Machines Corporation
    Inventors: Ronald E. Chappelow, Harry J. Hunkele
  • Patent number: RE30601
    Abstract: This describes an apparatus and method especially adapted for positioning a semiconductor wafer in a preferred plane with respect to a photomask so as to achieve improved photolithographic focusing. The apparatus comprises a holder, provided with a surface for receiving a semiconductor wafer thereon, mounted in a chuck which mates with an adaptor ring containing both driver mechanisms and sensors for sensing and positioning the wafer. The sensors define a reference plane and converts the spacing between the reference plane and the front surface of the semiconductor wafer into electrical signals which can be fed to the driver mechanisms to position, with both rotational or translational motion, the plane of the wafer by moving the holder until all the signals from the sensors are nulled.
    Type: Grant
    Filed: December 11, 1978
    Date of Patent: May 5, 1981
    Assignee: International Business Machines Corporation
    Inventors: Andrew F. Horr, William F. White