Abstract: A method and an apparatus for reading/writing data from/into a semiconductor memory device. In a read mode, a memory cell array block from which data is to be read is selected in response to a row address signal and a column of the selected memory cell array block is selected in response to a column address signal. Data are transferred from a memory cell of the selected column to a pair of bit lines of the selected column and then sense-amplified. A read signal is decoded and a pair of column decoding lines of the selected column become a desired logic state in accordance with the decoded result. A current path is formed between one of the column decoding lines and a ground terminal in response to the sense-amplified data on the bit lines. Data on the column decoding lines are selected and sense-amplified. The sense-amplified data are transferred externally.

Abstract: A method for forming submicroscopic patterns of a semiconductor device, which comprises: coating a photoresist film on a lower layer to be patterned; primarily exposing the photoresist film through a mask having chrome patterns to a light with an energy lower than the threshold energy for the thickness of the photoresist film; secondarily exposing the photoresist film through the mask to a light with an energy lower than the threshold energy, said mask having been shifted at a predetermined distance; subjecting the exposed photoresist film to development, to completely remove the regions in which the primarily exposed regions overlap with the secondarily exposed regions and half remove the once-exposed regions to form photoresist film patterns, each having four side walls; depositing an insulating layer entirely over the resulting structure; subjecting the insulating layer to anisotropic etch, to form insulating layer spacers at the side walls of the photoresist film patterns; and dry etching the photoresist

Abstract: A data output buffer comprising a pull-up driver connected between a first voltage source and a data output line, for amplifying a first logic value of an input data signal, a pull-down driver connected between a second voltage source and the data output line, for amplifying a second logic value of the input data signal, a pull-down driver connection circuit connected between the pull-down driver and the second voltage source, for varying an impedance of the pull-down driver, and a pull-down driver control circuit for detecting whether the input data signal has its second logic value and generating a control signal in accordance with the detected result to control the operation of the pull-down driver connection circuit. According to the present invention, the data output buffer can control an amount of current flowing through the pull-down driver in a multi-step manner to minimize an impulse noise component in low logic output data on the data output line.

Abstract: A device for beam machining of materials comprising a pin-point source (1) of optical radiation and a concentrating reflector (2) whose reflecting surface has the form of a surface of revolution. The generatrix of said surface of the concentrating reflector (2) is made up of arcs of confocal ellipses (3), lengths of rays (4) emitted from the focus concident with the radiation source (1) and connecting the ends of arcs of ellipses, and arcs of circles (5) with the center in said focus. The size of the boundary segments and their relative arrangement are established on the condition of a most complete collection of the radiation from the pin-point source (1) in the region of the focal point which is coincident with the surface of the machined material, affording a vast possibility of changing the shape of the reflector.

Abstract: A device for beam machining comprises an extended radiation source (1) and a concentrating reflector (2) whose reflecting surface has the form of a surface of revolution made up of several successively-joined segments (3). The shape of the reflector generating surface on any segment except the initial one located near the apex M of the reflector (2) and the boundaries between the joined segments are defined by a system of equiations. The initial segment of the profile of the reflector (2) extending from its apex M to the profile points R.sub.1, z.sub.1 has the shape of a segment of the curve of the 2nd order. Installed on the end of the concentrating reflector is a pressuretight protective transparent partition (4) whose cross-sectional profile is capable of ensuring additional focusing of preset radiation fractions of the linear source (1) in the focal point F.

Abstract: A process for stereoselective preparation of (E)-enolthioether derivatives comprising the steps of;(a) protecting free secondary hydroxy group of L-threonine with trialkylsilyl group; (b) the protected L-threonine derivatives (I) being degraded by ninhydrin to prepare (2R)-2-(trialkylsilyloxy)propanal (II); and (c) carting out the Honor-Wordsworth-Emons (HWE) reaction of the resultant compound (II) with stabilized phosphonate ylide, phosphonium ylide or phosphine oxide ylide which was obtained by treating the organic phosphine compound (III) with strong base to provide (E)-enolthioether derivatives (IV) is provided.The present invention has advantages in comparison with the prior art in that the costs required for the process can be lowered because L-threonine, an .alpha.-amino acid of low in price is used as a starting material and the process is simple; and the desired (E)-enolthioether derivatives can be prepared with high stereoselectivity.

Abstract: A method for the fabrication of a semiconductor device, capable of reducing the step between the cell region and the peripheral circuit region by forming a storage electrode having a similar height to that of a bit line in a region devoid of the bit line, and of establishing a cylindrical storage electrode without using an additional storage electrode mask by making an etch barrier layer over the bit line serve as a self-aligned etch barrier when a storage electrode contact hole is formed by an etch process using a storage electrode contact hole mask. It can ensure a sufficient allowance of depth of focus for subsequent lithography processes in addition to being simple and improving reliability.

Abstract: A liquid crystal display device including a compensation layer or dummy pattern provided at a region where transparent electrode films formed on upper and lower glass plates are not overlapped with each other, the compensation layer or dummy pattern having a thickness substantially corresponding to the thickness of one transparent electrode film and serving to provide a uniform cell gap, thereby capable of achieving an improvement in display quality. The compensation layer is made of an Si0.sub.2 based material and formed on a region where the transparent electrode films are not overlapped with each other by use of an offset roll coating process, before or after a formation of a top coating film disposed on the transparent electrode films, the compensation layer having the same thickness as the transparent electrode films.

Abstract: A bioadherent, orally ingestible system, which comprises: a water-in-oil system having at least two phases, one phase comprises from about 75% to about 99% by volume of an internal hydrophylic phase and the other phase comprises from about 25% to about l% by volume of an external hydrophobic phase, wherein the external hydrophobic phase comprises two components, one component being about 3% to about 97% by volume of the hydrophobic phase of a hydrophobic oil and the other being about 97% to about 3% of an emulsifier having a HLB value less than about 10.

Abstract: A DRAM capacitor and a method for fabricating the same, capable of achieving an increase in surface area and thereby an increase in capacitance while reducing the topology, by simply forming a conduction layer, as a charge storage electrode, comprised of conduction spacers around a double-layer pin-shaped conduction layer pattern or a combination of a central conduction layer pattern and an outer conduction layer pattern having an upwardly-opened dome structure surrounding the central conduction layer pattern, using an etch rate difference between insulating films.

Abstract: There is disclosed a sense amplifier for a semiconductor memory device comprising a cross coupled latch for sense-amplifying data signals on bit lines, a pull-up driver connected between the cross coupled latch and a supply voltage source for controlling an amount of current of a supply voltage being supplied to the cross coupled latch, a pull-down driver connected between the cross coupled latch and a ground voltage source for controlling an amount of current of a ground voltage being supplied no the cross coupled latch, and a voltage detector for detecting a difference between the supply voltage and the ground voltage and controlling the pull-up driver and the pull-down driver in accordance with the detected result. According to the present invention, when the voltage difference is high in level, the sense amplifier minimizes a noise component being generated. In the case where the voltage difference is low in level, the sense amplifier amplifies the data signals on the bit lines at a high speed.

Abstract: An improved bootstrap circuit comprising a booster for boosting a binary signal and outputting the boosted binary signal through its output terminal, a voltage detector for detecting a variation of a supply voltage from a supply voltage source, and an active load for adjusting an output load amount of the booster under control of the voltage detector. According to the present invention, the binary signal is boosted to a voltage level which is stable regardless of the variation of the supply voltage.

Abstract: A 2's complementer having a simple circuit arrangement and yet obtaining a high 2's-complementation rate. The 2's complementer includes an inverting circuit for inverting binary data with at least two bits to produce an 1's complement. The 2's complementer also includes an inverter for inverting inverted data resulted from an inversion of the least-significant bit of the 1's-complement data of at least two bits, and at least one exclusive OR gate for comparing bit data to be currently processed with lower-order bit data of at least one bit of the 1's-complement data, and inverting the current bit data when the at least one lower-order bit data has the value of logic-1.

Abstract: A semiconductor memory device capable of obtaining a sufficient charge storage capacity and yet having a reduced occupied memory cell area. The semiconductor memory device includes a field effect transistor formed on a semiconductor substrate, an interlayer insulating film formed over the field effect transistor, a first charge storage electrode pattern having a plane plate shape and formed over the interlayer insulating film such that it is electrically connected with the field effect transistor, a second charge storage electrode pattern having a double cylindrical structure and formed over the first charge storage electrode pattern such that it is electrically connected with the first charge storage electrode pattern, and a dielectric film and a plate electrode sequentially formed over the entire exposed surfaces of the first and second charge storage electrode patterns.

Abstract: A punch for making a multiplicity of holes in a line even through a multiplicity of sheets of paper put one upon another includes a multiplicity of vertically disposed and vertically movable cutting tools supported in a row by a horizontally disposed rail. Each tool is provided with a horizontally disposed actuator pin attached to it at right angles to it. A slider is slidable along the rail for causing the pins to move the tools vertically one after another. The slider has a pair of curved guide grooves in which the opposite ends of each pin are engageable, or a roller having a pair of annular surfaces which are engageable with the opposite ends of each pin, so that the pins and thereby the tools may be vertically movable.