Abstract: The present invention describes a method of providing a substrate, the substrate being transparent to radiation at an actinic wavelength; forming an absorber layer over the substrate, the absorber layer including an active area and a peripheral area; removing the absorber layer from a portion of the peripheral area; and forming a trench in the substrate in the portion of the peripheral area. The present invention further describes a mask including an active area; and a peripheral area located around the active area, the peripheral area including vent channels.

Abstract: According to one aspect of the invention, a method and apparatus for polarizing electromagnetic radiation is provided. The electromagnetic radiation may be divided into first and second portions, substantially all of the first portion may be linearly polarized in a first direction and substantially all of the second portion may be linearly polarized in a second direction, the first direction being substantially orthogonal to the second direction. The linear polarization of at least one of the first and second portions may be changed such that substantially all of both of the first and second portions are linearly polarized in a third direction. At least one of the first and second portions may be redirected such that substantially all of both the first and second portions are propagating in a fourth direction.

Abstract: The present invention includes a mechanical joint between a die and a substrate that is reflowed by microwave energy and a method of forming such a mechanical joint by printing a solder over a substrate, placing the solder in contact with a bump over a die, reflowing the solder with microwave energy, and forming a mechanical joint from the solder and the bump.

Abstract: The present invention describes a method including: determining field-clustering scheme; selecting initial sample plan; establishing initial model of overlay, the initial model of overlay comprising components; and establishing efficient model of overlay from the initial model of overlay including: constructing matrices; identifying redundant components and eliminating the redundant components; and identifying highly-correlated components and determining whether to eliminate the highly-correlated components.

Abstract: The present invention describes a structure having a multilayer stack of thin films, the thin films being a low-dielectric constant material, the thin films having pores, and a method of forming such a structure.

Abstract: Alloy memory structures and methods are disclosed wherein a layer or volume of alloy material changes conductivity subsequent to introduction of a electron beam current-induced change in phase of the alloy, the conductivity change being detected using current detection means such as photon-emitting P-N junctions, and being associated with a change in data bit memory state.

Abstract: The present invention describes a method including: providing a substrate, the substrate including a first region and a second region; forming a multilayer mirror over the substrate; forming a phase-shifter layer over the multilayer mirror; forming a capping layer over the phase-shifter layer; removing the capping layer and the phase-shifter layer in the second region; illuminating the first region and the second region with EUV light; and reflecting the EUV light off the first region and the second region. The present invention also describes a structure including: a substrate, the substrate including a first region and a second region; a multilayer mirror located over the first region and the second region; a phase-shifter layer located over the multilayer mirror in the region; an intensity balancer layer located over the multilayer mirror in the second region; and a capping layer located over the phase-shifter layer in the first region and over the intensity balancer layer in the second region.

Abstract: According to one aspect of the invention, a method and apparatus for polarizing electromagnetic radiation is provided. The electromagnetic radiation may be divided into first and second portions, substantially all of the first portion may be linearly polarized in a first direction and substantially all of the second portion may be linearly polarized in a second direction, the first direction being substantially orthogonal to the second direction. The linear polarization of at least one of the first and second portions may be changed such that substantially all of both of the first and second portions are linearly polarized in a third direction. At least one of the first and second portions may be redirected such that substantially all of both the first and second portions are propagating in a fourth direction.

Abstract: The present invention discloses a method including providing a substrate; forming a dielectric over the substrate, the dielectric having a k value of about 2.5 or lower, the dielectric having a Young's modulus of elasticity of about 15 GigaPascals or higher; forming an opening in the dielectric; and forming a conductor in the opening. The present invention further discloses a structure including a substrate; a dielectric located over the substrate, the dielectric having a k value of 2.5 or lower, the dielectric having a Young's modulus of elasticity of about 15 GigaPascals or higher; an opening located in the dielectric; and a conductor located in the opening.

Abstract: A wafer passivation structure and its method of fabrication is described. According to one embodiment of the present invention a metal layer having a bond pad spaced by a gap from a metal member is formed on a substrate. A first dielectric layer is then formed over the bond pad and the metal member and completely fills the gap. Next a second dielectric layer, having a dielectric constant greater than the first dielectric layer and being hermetic is formed over the first dielectric layer. In another embodiment of the present invention a first dielectric layer is formed on the top surface of a bond pad of a substrate. A second dielectric layer is then formed on the first dielectric. An opening is then formed through the first and second dielectric layers so as to expose the top surface of the bond pad. A barrier layer is then deposited on the sides of the opening and on the top surface of the bond pad. A contact is then formed on the barrier layer in the opening.

Abstract: The present invention describes an apparatus comprising an optical array generating a distribution of partial coherence of light energy and an aperture to select a subset of said distribution of partial coherence.

Abstract: A base-loaded polymer is applied to a semiconductor feature formed after exposing and developing a photoresist layer in order to reduce line edge roughness caused by a residual acid collecting on the edges of the feature during the post-exposure bake of the photoresist. Alternatively, a polymer is applied containing grains that are of suitable for smoothing the line edge roughness.

Abstract: According to an embodiment of the invention, an adjustable EUV light source may be used for photolithography. The EUV light source, such as an electrode, is mounted in an adjustable housing. The housing can be adjusted to change the distance between the light source and focusing mirrors, which in turn changes the partial coherence value of the system. The partial coherence value can be changed to print different types of semiconductor features.

Abstract: The present invention discloses a method including providing a substrate; forming a lower conductor over the substrate; forming a conducting nanostructure over the lower conductor; forming a thin dielectric over the conducting nanostructure; and forming an upper conductor over the thin dielectric. The present invention further discloses a device including a substrate; a lower conductor located over the substrate; a conducting nanostructure located over the lower conductor; a thin dielectric located over the conducting nanostructure; and an upper conductor located over the thin dielectric.

Abstract: The present invention includes a method that provides a first wafer; forms a first raised contact from a first plug on the first wafer; provides a second wafer; forms a second raised contact from a second plug on the second wafer; applies an anisotropic conductive adhesive over the first wafer; aligns the second wafer to the first wafer; attaches the second wafer to the anisotropic conductive adhesive to form a continuous and conductive path between the first raised contact and the second raised contact. The present invention also includes a structure that has an anisotropic conductive film, the anisotropic conductive film has a front surface and a rear surface; a first raised contact is located over the front surface, the first raised contact forming part of a first wafer; and a second raised contact located over the rear surface, the second raised contact forming part of a second wafer, where the second raised contact faces the first raised contact.

Abstract: A mask having a first region and a second region; the first region having a multilayer mirror over a substrate, the multilayer mirror having alternating layers of a first material and a second material, the first material having a high index of refraction, the second material having a low index of refraction; and the second region having a compound of the first material and the second material over the substrate.

Abstract: The present invention includes a method of providing a substrate; sequentially forming a seed layer over the substrate and forming a protection layer over the seed layer; and sequentially removing the protection layer and forming a conductor over the seed layer. The present invention further includes a structure having a substrate, the substrate having a device; an insulator disposed over the substrate, the insulator having an opening, the opening disposed over the device; a barrier layer disposed over the opening; a seed layer disposed over the barrier layer; and a protection layer disposed over the seed layer.

Abstract: The present invention describes a structure having a multilayer stack of thin films, the thin films being a low-dielectric constant material, the thin films having pores, and a method of forming such a structure.

Abstract: The present invention discloses a novel layout and process for a device with segmented BLM for the I/Os. In a first embodiment, each BLM is split into two segments. The segments are close to each other and connected to the same overlying bump. In a second embodiment, each BLM is split into more than two segments. In a third embodiment, each segment is electrically connected to more than one underlying via. In a fourth embodiment, each segment is electrically connected to more than one underlying bond pad.

Abstract: On-chip decoupling capacitor structures, and methods of fabricating such decoupling capacitors are disclosed. On-chip decoupling capacitors help to reduce or prevent L di/dt voltage droop on the power grid for high surge current conditions. The inclusion of one or more decoupling capacitors on a chip, in close proximity to the power grid conductors reduces parasitic inductance and thereby provides improved decoupling performance with respect to high frequency noise. In one embodiment of the present invention, a capacitor stack structure is inserted between metal interconnect layers. Such a capacitor stack may consist of a bottom electrode/barrier; a thin dielectric material having a high dielectric constant; and a top electrode/barrier. In an alternative embodiment, the bottom electrode and/or bottom metal interconnect layer have three dimensional texture to increase the surface area of the capacitor.