Abstract: The leads of an IC module are bent to secure the module to a printed circuit board by a pair of rotatable bending members driven concurrently by a camming member which rotates about an axis normal to the axes of rotation of the bending members. Cam follower projections from the bending members engage spiral cam slots in the camming member. The slots spiral away from the axis of rotation of the camming member. All of the above structures are beneath the circuit board and above the lap of an operator who places the module on the board from above the board.

Abstract: An apparatus for wave soldering component leads to a conductor on a printed circuit board surface includes a fountain for forming a standing wave of hot molten solder. A pool of hot oil having a specific gravity lower than the solder floats in a depression in the surface of the solder adjacent to the standing wave. A printed circuit board whose surface is to be soldered is passed through the crest of the molten solder standing wave and then while the solder adhering to the component leads and conductor is still molten, into contact with the pool of hot oil.

Abstract: A memory system in which two or more memory modules containing the same information have their respective data outputs connected to the same data line. Each module includes means for checking the parity of the data being read-out at its output and in the event of a parity error indication effectively disconnects its output from the data line.

Abstract: A memory system comprised of M memory modules where M-1 of the modules are for storing data bits and the Mth modules is for storing system parity bits corresponding to the data bits stored in the other M-1 modules. Each module has R.multidot.C bit locations organized into W internal words of L bits and includes a parity array for storing one parity bit for each internal word, where L is greater than 1, and RC=WL. Each module includes means for reading an internal word and for reading-out a particular subset of the L bits of that internal word. Each module includes means for checking the parity of a selected internal word and for producing a first parity signal indicating whether or not it is correct. The memory system includes means for checking the parity of the selected subsets read out from the M modules and for producing a system parity signal indicating whether the parity of the M subsets is correct.

Abstract: An array of reciprocating rods are aligned with circuit board lead apertures and are normally biased to engage the printed circuit board apertures. When leads are present the rods abut the leads. Circuit connectors attached to the rods close a circuit path when a missing lead is sensed. When one or more of the leads of a given component are missing, a circuit is closed and an indicator lights.

Abstract: A controllable impedance means is connected in series with the conduction path of transistors forming a complementary inverter for selectively "skewing" the inverter in a direction to center its toggle point with respect to the signals applied to the inverter input. The "skewed" inverter is thereby compensated for offsets or asymmetry in its input signals. Also disclosed is the use of skewed inverters to form memory cells which can be easily written to both binary conditions. Also disclosed is the use of the controllable impedances as "cross-unders" to enable the fabrication of very compact "skewable" inverters and memory cells.

Abstract: A component element bending apparatus includes a pair of bending jaws which are radially displaced by spiral and radially extending camming slots in adjacent respective rotatable drive and stationary discs when the rotatable drive disc is activated. The rotatable disc is driven by a drive lever coupled to an air-operated drive plate.

Abstract: Improved accumulation apparatus for generating phantom raster in skewed Cartesian coordinates uses two, rather than four, accumulators. Arrangements for accommodating non-square pixels are described; as well as arrangements for accommodating the display image being compressed, expanded, or changed in aspect ratio.

Abstract: The storage locations of a memory system map a field of sample points. Apparatus affording parallel access to a plurality of storage locations describing an array of the sample points in an access window, which window can be shifted to any selected region of field of sample points responsive to orthogonal address coordinates of one of the sample points in the array, is described.

Abstract: A plane conductive contact surface on a support member for a first microwave circuit chip is parallel and coextensive with a planar spring finger contact element of a support member for a second microwave circuit chip. The contact surface and contact element are connected to the ground planes of the respective chips. The contact element resiliently engages the conductive contact when the support members are positioned adjacent to one another. The circuit elements on the opposite surface from the ground plane on the two chips are connected to one another by a wire which is centered over the spring finger contact element and the impedance of the connection comprising the wire and spring contact closely matches the impedance of the two microwave circuit chips. The resistance at the connection between the spring finger contact element and the conductive contact surface is low.

Abstract: A memory system comprised of M integrated circuits (IC's) in which M-1 of the IC's store data bits and the Mth IC stores system parity bits. Each IC includes a memory array of cells organized into W internal words of several bits, a parity array for storing a parity bit for each internal word, means for reading-out a selected bit, means for reading the internal word containing the selected bit and ascertaining whether its parity is correct and for producing a first signal indicative thereof. Each IC also includes means responsive to its selected data bit and to an externally generated signal indicative of the parity of the data bit read-out from one or more of the other IC's for producing a signal indicative of the parity of the combined signal. The M IC's may be interconnected to produce a system parity signal at the output of the Mth IC indicative of whether the parity of the M data bits read-out from the M IC's is correct.

Abstract: A slat rotatably supported at its ends has its mass center offset from the axis due to sag. A spring biased mass is attached to the slat for creating a torque when the slat is rotated which counterbalances the torque created by the offset slat mass center to minimize the drive force required to rotate the slat.

Abstract: First and second low-ON-impedance switching transistors driven by complementary signals are connected between first and second outputs, respectively, and a first power terminal to which is applied a first voltage level. First and second high-ON-impedance load devices are connected between the first and second outputs, respectively, and a second power terminal to which is applied a second voltage level. The conduction paths of a first and a second normally non-conducting low-ON-impedance transistors are connected in parallel with the first and second load devices, respectively.

Abstract: The process of linearly interpolating between data taken from adjacent storage locations in a memory non-integrally addressed has the initial subtraction and final addition steps eliminated from it, and the partial products to be summed in the intervening multiplication process are modified to compensate for the elimination of these steps. This modification is done with a relatively fast select-one-of-four process, reducing the time for linear interpolation to that required for a simple multiplication--or, in the case of a single-bit multiplier, to the time for selection of the modified multiplicand to be used as linear interpolation result.

Abstract: Phantom raster scanning of an image memory, in which the image is stored in compacted form, is made possible by introducing offsets in strictly spatial coordinates, rather than in time coordinates parallelling a particular spatial coordinate system.

Abstract: A load and the main conductions paths of first and second TRIACs are connected in series between first and second power terminals across which an alternating voltage is applied. The first TRIAC is for controlling the power dissipated in the load and the second TRIAC is for unconditionally removing power to the load a predetermined time after the first and second TRIACs are turned-on. The first and second TRIACs are interconnected so that the main terminal 1 (MT1) of one is connected to the main terminal 1 (MT1) of the other at a common point. A control circuit for turning-on and turning-off each TRIAC is connected between the gate electrode of each TRIAC and the common point.

Abstract: Oscillators phase locked to transitions in the envelope of a bandwidth-limited complex waveform are used, for example, in detecting MPSK signals. The magnitude of the envelope is approximated by linearly combining the real and imaginary components of the complex waveform, or by selecting the larger of the two components, or by using both these techniques in combination.

Abstract: Graphics for television display which emphasize circles, ellipses, circular or elliptical arcs, and the radii of circles or ellipses are conveniently stored in image memories addressable in polar coordinates. Television images which are to be rotated are conveniently stored in such memories, so the angular coordinate of the image memory addresses can be incremented or decremented to rotate the image with hardware as simple as a single adder. To read image memories addressed in polar coordinates, the Cartesian coordinates descriptive of television raster display are scan-converted to polar coordinates. This scan conversion takes place in real time at video sampling rates. The generation of the angular coordinate of the polar coordinates is facilitated by dividing one Cartesian coordinate by another by differentially combining their logarithms as found from read-only-memory table look-up, then finding an arc tangent from the logarithm of their difference as found from further read-only-memory table look-up.

Abstract: Orthogonal Cartesian coordinates descriptive of the raster scanning of a television display screen are generated at a programmable skew angle to the Cartesian coordinates of an image stored in memory. Each of these generated coordinates has a number of more significant bits used to generate the column and row addresses for that memory, four spatially adjacent storage location of which are read from for developing each sample of video signal describing a rotated television image. Each of these generated coordinates has a number of less significant bits affording resolution higher than that with which the memory can be addressed, which are used for calculation of each video sample by two-dimensional interpolation between the read-outs from the four locations in memory. To avoid aliasing as the image is rotated, the digital video to be stored in memory is processed using two-dimensional spatial-frequency low-pass filters to reduce resolution in directions other than horizontal and vertical.

Abstract: A switching voltage regulator in which the input voltage to a switching dc-to-dc converter is boosted and the output voltage of the converter is indirectly regulated responsive to direct regulation of the boosted voltage.