Patents Represented by Attorney Girard & Equitz LLP
  • Patent number: 7560348
    Abstract: A PMOS device can be designed and manufactured in accordance with the invention to locate its drain junction breakdown point and maximum impact ionization point to reduce or eliminate drain breakdown voltage walk-in. In some embodiments, the drain junction breakdown point and maximum impact ionization point are located sufficiently far from the gate that the device exhibits no significant drain breakdown voltage walk-in. The device can be a high voltage power transistor having an extended drain region including a P-type lightly doped drain (P-LDD) implant, with drain junction breakdown and maximum impact ionization points appropriately located by controlling the implant dose employed to produce the P-LDD implant.
    Type: Grant
    Filed: February 14, 2007
    Date of Patent: July 14, 2009
    Assignee: National Semiconductor Corporation
    Inventors: Douglas Brisbin, Andrew Strachan
  • Patent number: 7558326
    Abstract: A communication system including a transmitter, a receiver, and a TMDS-like link, in which video data and auxiliary data (typically including timing data associated with other auxiliary data) are transmitted from the transmitter to the receiver, or in which video data are transmitted over the link from the transmitter to the receiver, and auxiliary data (typically including timing data associated with other auxiliary data) are transmitted from the receiver to the transmitter. In typical embodiments the auxiliary data include one or more streams of audio data.
    Type: Grant
    Filed: September 12, 2001
    Date of Patent: July 7, 2009
    Assignee: Silicon Image, Inc.
    Inventors: James D. Lyle, Gyudong Kim, Min-Kyu Kim, Ken-Sue Tan, Paul Daniel Wolf, William C. Altmann, Russel A. Martin
  • Patent number: 7539304
    Abstract: An integrated circuit that includes operational circuitry and message digest generation circuitry coupled to the operational circuitry, a method for testing an integrated circuit including message digest generation circuitry, and a system including an integrated circuit (which includes message digest generation circuitry) and at least one external device coupled to the integrated circuit. The message digest generation circuitry is coupled and configured to generate at least one digest of at least one message, where each message is indicative of at least one aspect of the integrated circuit's state. For example, a message can be a sequence of voltages or logic levels sampled at a specific sequence of nodes of operational circuitry of the integrated circuit.
    Type: Grant
    Filed: November 18, 2002
    Date of Patent: May 26, 2009
    Assignee: Silicon Image, Inc.
    Inventor: James D. Lyle
  • Patent number: 7515062
    Abstract: In some embodiments, a wall-mountable, configurable controller having control keys (e.g., less than eight keys or another small number of keys), a subassembly including circuitry, and a control key insert removably mountable to the subassembly and including at least one of the control keys. The circuitry can include a limit switch that is biased in a default state but moveable into a learning state in response to user-exerted force. In some embodiments, the controller includes an IR emitter and an IR receiver and is operable to clone another device by sending configuring radiation from the emitter to the other device's IR receiver. Preferably, the emitter and receiver are positioned so that a controller's IR emitter aligns with the IR receiver of an identical controller when the controllers are positioned face to face. In some embodiments, the controller provides audible and visual feedback to users when operating in a learning mode.
    Type: Grant
    Filed: June 6, 2005
    Date of Patent: April 7, 2009
    Assignee: SP Controls, Inc.
    Inventors: Paul Anson Brown, Aaron Daniel Thieme
  • Patent number: 7502411
    Abstract: In preferred embodiments, an adaptive equalization circuit including at least two equalization filters (each for equalizing a signal transmitted over a multi-channel serial link) and control circuitry for generating an equalization control signal for use by all the filters. The control circuitry generates the control signal in response to an equalized signal produced by one of the filters, and asserts the control signal to all the filters. Preferably, one filter generates an equalized fixed pattern signal in response to a fixed pattern signal (e.g., a clock signal), each other filter equalizes a data signal, and the control circuitry generates the control signal in response to the equalized fixed pattern signal.
    Type: Grant
    Filed: March 5, 2004
    Date of Patent: March 10, 2009
    Assignee: Silicon Image, Inc.
    Inventors: Ook Kim, Gyudong Kim
  • Patent number: 7500032
    Abstract: A cable including circuitry for asserting information to a user or external device and a system including such a cable. The cable can include conductors, a memory storing cable data, and circuitry configured to respond to a request received on at least one of the conductors by accessing at least some of the cable data and asserting the accessed data serially to at least one of the conductors (e.g., for transmission to an external device). Other aspects of the invention are methods for accessing cable data stored in a cable and optionally using the data (e.g., to implement equalization). The cable data can be indicative of all or some of cable type, grade, speed, length, and impedance, a date code, a frequency-dependent attenuation table, far-end crosstalk and EMI-related coefficients, common mode radiation, intra pair skew, and other information.
    Type: Grant
    Filed: August 31, 2007
    Date of Patent: March 3, 2009
    Assignee: Silicon Image, Inc
    Inventors: Ook Kim, Eric Lee, Gyudong Kim, Zeehoon Jang, Baegin Sung, Nam Hoon Kim, Gijung Ahn, Seung Ho Hwang
  • Patent number: 7461974
    Abstract: An apparatus and method for canceling variations in the beta for a bipolar junction transistor so that the diode equation can be employed to accurately measure the temperature of the transistor based at least in part on a ratio of two target collector currents and two measurements of the base-emitter voltage of the transistor. If the determined collector current of the transistor is relatively equivalent to one of the first and second target collector currents, the transistor's base-emitter voltage is measured and stored. An analog feedback circuit can be employed to change the determined collector current to be relatively equivalent to the first and second target collector currents. The analog feedback circuit can include an optional sample and hold component to further reduce power consumption and reduce noise. A digital circuit can be employed to change the determined collector current to be relatively equivalent to the first and second target collector currents.
    Type: Grant
    Filed: January 3, 2008
    Date of Patent: December 9, 2008
    Assignee: National Semiconductor Corporation
    Inventors: Mehmet Aslan, John W. Branch
  • Patent number: 7452172
    Abstract: Guide apparatus for forming and applying an over-wrap sheet to a book hardcover including a base unit having a width greater than the width of the hardcover and a length greater than the length of the hardcover, with the base unit including a hardcover receiving area and first and second orthogonal stops supported on the base unit for engaging first and second respective orthogonal edges of a cut over-wrap sheet. Third and fourth orthogonal stops are provided which are supported on the base unit for engaging first and second orthogonal edges of a hardcover placed on the hardcover receiving area.
    Type: Grant
    Filed: November 30, 2004
    Date of Patent: November 18, 2008
    Assignee: Powis Parker Inc.
    Inventors: Kevin P. Parker, Wayne Kasom, Brandon A. Lee
  • Patent number: 7444699
    Abstract: In some embodiments, an inflatable knee pillow including a body having an outer fabric surface, and an inflation valve, wherein the body defines straps (preferably two pairs of straps) and encloses a bladder (an inflatable volume), and the inflation valve is in fluid communication with the bladder. When deflated, the pillow has a thin profile and can be folded into a compact configuration. The straps are releasably fastenable around a user's leg so as to position an inflatable portion of the pillow against the inside of the user's knee (for example, to cushion and separate the user's knees from each other while the user sleeps on his or her side with the pillow inflated). Preferably, the body includes two sheets of multilayer material shaped and attached together so as to define the straps and the bladder, and the pillow has releasable fasteners (e.g., hook-and-loop fasteners) defined by or attached to the straps.
    Type: Grant
    Filed: October 9, 2007
    Date of Patent: November 4, 2008
    Inventor: Matthaus Hense
  • Patent number: 7409031
    Abstract: A method and apparatus for 2× oversampling of data having jitter. In some embodiments, the invention is a clock and data recovery device including an alternating edge sampling binary phase detector, and which is configured to stabilize loop characteristics in various jitter environments and can be implemented with small hardware overhead. A transceiver that embodies the invention can be implemented as a CMOS integrated circuit using a 0.18 ?m CMOS process, with the transceiver chip being capable of recovering data having a data rate of up to 11.5 Gbps from a signal received over a serial link, while consuming no more than 540 mW from 1.8V supply, and with a bit error rate of less than 10?12.
    Type: Grant
    Filed: August 15, 2003
    Date of Patent: August 5, 2008
    Assignee: Silicon Image, Inc.
    Inventors: Bong-Joon Lee, Moon-Sang Hwang, Sang-Hyun Lee, Deog-Kyoon Jeong
  • Patent number: 7375960
    Abstract: In some embodiments, an assembly in which storage components (e.g., at least two bare SATA disk drives) can be removably secured. The assembly can secure bare storage components in an enclosure without the need first to mount any of them in or to a carrier, and such that they can be conveniently removed from the enclosure and replaced (e.g., when they fail). Some embodiments include a flexible assembly for each storage component, including at least one flexible element and at least one swaged cam for each flexible element. The flexible assembly has two states: a locking state in which each cam deforms a flexible element into a locking position; and an unlocking state in which each cam and each flexible element have relative positions that allow the storage component to move past each flexible element. Other embodiments include a spring-biased assembly for each storage component, having a locking state in which at least one spring element (e.g.
    Type: Grant
    Filed: May 6, 2005
    Date of Patent: May 20, 2008
    Assignee: Silicon Image, Inc.
    Inventors: Kathleen A. Blaalid, legal representative, James Pat Young, Jeffrey Scott Blaalid
  • Patent number: 7374385
    Abstract: A method of fabricating a book from a stack of sheets and a hardcover assembly having first and second relatively rigid cover sections separated by a spine region. A layer of pressure sensitive adhesive is disposed over the inner surfaces of the cover sections, with there being a pair of release liners covering both the pressure sensitive adhesive layers. The first cover section is then secured to one side of the stack by sequentially removing the corresponding release liners so as to expose the underlying adhesive. The second cover section is then applied by folding the second cover section over the other side of the stack, removing the release liners and securing the cover section to the stack by way of the adhesive.
    Type: Grant
    Filed: September 2, 2003
    Date of Patent: May 20, 2008
    Assignee: Powis Parker Inc.
    Inventor: Kevin P. Parker
  • Patent number: 7360757
    Abstract: Apparatus for conditioning an edge of a stack of sheets to be bound so that sheets having coated surfaces and the like can be reliably bound. The apparatus includes a stack clamping mechanism configured to secure the stack of sheets and a piercing member configured to produce a piercing action substantially in a piercing plane. Also provided is a positioning mechanism configured to control relative movement of the stack clamping mechanism and the piercing mechanism so that the sheets of the stack pass through the piercing plane, with the drive mechanism being configured to drive the piercing member into the edge of the stack at least once for each sheet of the stack passing through the piercing plane.
    Type: Grant
    Filed: February 9, 2004
    Date of Patent: April 22, 2008
    Assignee: Powis Parker Inc.
    Inventors: Kevin P. Parker, Harold P. Hocking, Eugene E. Anderson
  • Patent number: 7359437
    Abstract: A communication system including a transmitter, a receiver, and a serial link, in which encoded data (e.g., encoded video data and encoded auxiliary data) are transmitted from the transmitter to the receiver. The serial link can but need not be a TMDS or TMDS-like link. In typical embodiments, alternating bursts of encoded video data and encoded auxiliary data are transmitted over each of one or more channels of the link. Other aspects of the invention are transmitters for use in encoding data for transmission over a serial link, and methods for sending encoded data over a serial link. In accordance with the invention, the data to be transmitted are encoded using a subset (sometimes referred to as a selected set of code words) of a full set of code words.
    Type: Grant
    Filed: December 24, 2001
    Date of Patent: April 15, 2008
    Assignee: Silicon Image, Inc.
    Inventors: Seung Ho Hwang, Jano Banks, Paul Daniel Wolf, Eric Lee, Baegin Sung, Albert M. Scalise
  • Patent number: 7351024
    Abstract: A book binding apparatus for binding a stack of sheets, including a cover element having a first cover section that corresponds to the dimensions of the sheets and a first section of pressure sensitive adhesive and an associated release liner disposed along a first edge of the first cover section. A flap member is attached to the first cover section and is movable between a closed position disposed over the first pressure sensitive adhesive layer and an open position moved away from the layer. A second adhesive layer and associated release liner is disposed on an inner surface of the flap member. The binding apparatus may be used in combination with second cover section and associated binder spine element having heat activated adhesive to bind the stack of sheets. The spine element is folded around the edge of the stack to be bound and is secured in place by the first section of pressure sensitive adhesive.
    Type: Grant
    Filed: September 25, 2003
    Date of Patent: April 1, 2008
    Assignee: Powis Parker Inc.
    Inventor: Kevin P. Parker
  • Patent number: 7339216
    Abstract: An array of vertical color filter (VCF) sensor groups, optionally including or coupled to circuitry for converting photogenerated carriers produced in the sensors to electrical signals, and methods for reading out any embodiment of the array. The array has a top layer (including the top sensors of the sensor group) and at least one low layer including other ones of the sensors. Only the top layer can be read out with full resolution. Each low layer can only be read out with less than full resolution to generate fewer sensor output values than the total number of pixel sensor locations. Typically, the sensor groups are arranged in cells, each cell including a S sensor groups (e.g., S=4), with S sensors in the top layer and fewer than S sensors in each low layer of the cell. Typically, each cell includes at least one shared sensor (a sensor shared by two or more VCF sensor groups) in each low layer, and each cell includes sensor selection switches (e.g., transistors) between the cell's sensors and a sense node.
    Type: Grant
    Filed: November 22, 2005
    Date of Patent: March 4, 2008
    Assignee: Foveon, Inc.
    Inventors: Richard F. Lyon, Paul M. Hubel, Mark O. Bagula, Richard B. Merrill
  • Patent number: 7334067
    Abstract: In some embodiments, a wall-mountable, programmable controller having control keys (e.g., less than eight keys or another small number of keys), a subassembly including circuitry, and a control key insert removably mountable to the subassembly and including at least one of the control keys. The controller can have first and second key sets in distinct regions of the controller's surface and programmable switches that are actuatable by pressing control keys in the key sets. At least one switch actuatable by pressing a key of the first key set is programmed to perform a control operation of a first type (e.g., a power control operation), at least one switch actuatable by pressing a key of the second key set is programmed to perform a control operation of a second type (e.g.
    Type: Grant
    Filed: June 3, 2004
    Date of Patent: February 19, 2008
    Assignee: SP Controls, Inc.
    Inventors: Paul Anson Brown, Aaron Daniel Thieme
  • Patent number: 7333924
    Abstract: A method for device level simulation of a circuit modeled by a set of CCR graphs, a computer system programmed to perform such a method, and a computer readable medium which stores code for implementing such a method. Typically, the circuit includes MOS transistors having unknown gate potentials, each CCR graph includes a top rail, and a bottom rail, and variable nodes, each of the transistors having unknown gate potential is modeled in the CCR graphs as a selectable resistor having a selected one of a first resistance and a much larger second resistance, and the method includes the steps of determining potentials at variable nodes of one of the CCR graphs with each selectable resistor of the graph having its first resistance (and also with each selectable resistor of the graph having its second resistance) without determining effective resistances between the variable nodes of the graph and the top rail or bottom rail.
    Type: Grant
    Filed: June 28, 2004
    Date of Patent: February 19, 2008
    Assignee: National Semiconductor Corporation
    Inventors: Tathagato Rai Dastidar, Partha Ray
  • Patent number: 7296313
    Abstract: In some embodiments, an inflatable knee pillow including a body having an outer fabric surface, and an inflation valve, wherein the body defines straps (preferably two pairs of straps) and encloses a bladder (an inflatable volume), and the inflation valve is in fluid communication with the bladder. When deflated, the pillow has a thin profile and can be folded into a compact configuration. The straps are releasably fastenable around a user's leg so as to position an inflatable portion of the pillow against the inside of the user's knee (for example, to cushion and separate the user's knees from each other while the user sleeps on his or her side with the pillow inflated). Preferably, the body includes two sheets of multilayer material shaped and attached together so as to define the straps and the bladder, and the pillow has releasable fasteners (e.g., hook-and-loop fasteners) defined by or attached to the straps.
    Type: Grant
    Filed: January 13, 2006
    Date of Patent: November 20, 2007
    Inventor: Matthaus Hense
  • Patent number: 7298599
    Abstract: A snapback ESD protection network coupled across first and second integrated circuit pads and including first and second snapback devices, such as SCR devices, with the second device having a turnoff current ITOFF which is greater than the turnoff current of the first device. Each of the snapback devices has an anode terminal and a cathode terminal, with the first device anode and cathode terminals being coupled to the respective first and second integrated circuit pads through a first effective series resistance and the second device being coupled to the respective first and second integrated circuit pads through a second effective series resistance, with the first effective series resistance being smaller than the second so as to cause the first and second snapback devices to tend to turn on at about the same time at the beginning of an ESD event. The differences in turnoff current cause the second snapback device to turn off prior to the first snapback device at the conclusion of an ESD event.
    Type: Grant
    Filed: August 13, 2004
    Date of Patent: November 20, 2007
    Assignee: National Semiconductor Corporation
    Inventors: Vladislav Vashchenko, Peter J. Hopper, Yuri Mirgorodski, Philip Lindorpher