Abstract: A switched capacitor array circuit for use in a voltage regulator, including L, M and N banks of capacitor positions disposed intermediate an input node and a ground node, between the input and output nodes and between the output node and the ground node, respectively. Switching circuitry operates to switch three capacitors between a common phase configuration and a gain phase configuration. Two of the capacitors are disposed in one of the L, M and N banks of capacitor positions, with the third capacitor being disposed in a different one of the L, M and N banks of capacitor positions in the common phase configuration. When switched from the common phase to the gain phase configuration, at least one of the three capacitors is moved to a different capacitor position.

Abstract: A method and apparatus for encoding or decoding data in accordance with an NB/(N+1)B block code, and a method for determining codebooks for use in such encoding or decoding. Some such methods select positive and negative codebooks that are complements of each other, including by eliminating all candidate code words having negative disparity and filtering the remaining candidate code words in automated fashion based on predetermined spectral properties to select a subset of the candidate code words as the code words of the positive codebook. Preferably, all but a small subset of the (N+1)-bit code words (determined by a primary mapping) can be decoded by simple logic circuitry, and the remaining code words (determined by a secondary mapping) can be decoded by other logic circuitry or table lookup.

Abstract: A method for forming metal salicide regions and metal salicide exclusion regions in an integrated circuit (IC) that requires a minimum number of steps and is compatible with standard MOS processing techniques. An IC structure is first provided, with the IC structure including a plurality of MOS transistor structures with exposed silicon surfaces, such as source regions, drain regions and polysilicon gates. A metal layer (e.g., cobalt, titanium, tantalum, nickel or molybdenum) is then deposited over the IC structure in a controlled manner. A photoresist masking layer is then formed on those MOS transistor structures where metal salicide regions are to be formed. The metal layer from those MOS transistor structures where metal salicide exclusion regions are to be formed is then removed.

Abstract: A method for binding together a plurality of paper sheets. The binding process comprises providing a book binding sheet coated on one side with hot-melt adhesive, orienting and securing sheets of paper that will comprise the book to be bound relative to the binding sheet, securing the leading edge of the binding sheet to the front of the book to be bound, severing the secured portion from the remaining binding sheet material, wrapping the binding severed strip around the spine and rear cover and heating the adhesive to produce a permanent bond with the edges of the spine and covers.

Abstract: A computer implemented method of storing, manipulating, assessing, and displaying data and its relationships, and a computer system (with memory) programmed to implement such method. The data are stored as linked nodes, and can be visualized as a displayed sea of node representations. Interactions with the user organize the data from a defined, and then refined, point of view, with relevant data preferably brought to the user's attention by smooth changes in the displayed appearance of the data. The data (stored as linked nodes) can be queried by establishing a first point of view and displaying representations of the nodes as a sea of node representations whose point of view is the first point of view, and responding to a command (which determines a query) by displaying a changed sea of node representations which emphasizes information having greater relevance, and deemphasizes information having less relevance, to the query.

Abstract: A bookbinding structure for binding a stack of sheets including an elongated substrate having a first surface on which a first, heat activated, adhesive matrix is disposed and a second surface on which a second, pressure activated adhesive is disposed. The first adhesive matrix will be used to binding an edge of the stack so as to form a bound book with no cover. The second adhesive matrix includes first and second spaced-apart segments which extend along the length of the substrate. First and second release liners are disposed over the first and second adhesive segments, with the release liners remaining in place until the stack of sheets have been bound with the bookbinding structure. One of the release liners is manually removed from the bound stack and the stack is positioned in a cover assembly with the edge of the stack being positioned opposite a spine section of the cover assembly.

Abstract: An amplifier circuit which includes a differential amplifier, drive circuitry for driving an output of the amplifier circuit in response to an output of the differential amplifier and frequency compensation circuitry switchable between a low current mode and a high current mode of operation. Control circuitry is provided configured to switch the frequency response circuitry between the low and high current modes in response to a magnitude of current provided to a load connected to the amplifier circuit output. In the low current mode, the frequency compensation circuitry produces a frequency response having a first pole located at a first frequency. In the high current mode, the frequency compensation circuitry produces a zero at a second frequency sufficiently close to the first frequency so as to stabilize the amplifier circuit, with the first zero being absent for the frequency response in the low current mode.

Abstract: A bookbinding structure and method. The bookbinding structure is used to bind pages together in existing, commercially available binding machines. The bookbinding structure has a heat activated adhesive matrix for binding the pages. To attach a wrap-around book cover once the pages have been bound with the bookbinding structure, an adhesive on the outer surface of the bookbinding structure may be exposed by removing a release liner covering the adhesive. The book cover may then be adhered to the exposed adhesive either by a heat method or by applying pressure over the adhesive, depending on the particular type of adhesive of the bookbinding structure. The book cover may be printed with information and/or graphics prior to being wrapped around the pages of the book.

Abstract: A wireless communication system (e.g., GSM) receiver including analog (e.g., analog channel select) and digital filters, and bandwidth control circuitry which operates during at least one mode (e.g., a synchronization mode) to effectively narrow the combined pass band of the analog and digital filters thus reducing the bandwidth of noise passing therethrough, and a method for reducing noise pass band (preferably by data rotation) in at least one mode (e.g., a synchronization mode) but not all modes of wireless communication system receiver. Preferably,the bandwidth control circuitry passes through the output of an analog-to-digital converter (indicative of data) to the digital filter during at least one operating mode, and the bandwidth control circuitry rotates the data in the complex domain (during at least one other mode) before the data is digitally filtered.

Abstract: A method and apparatus for performing a multi-stage wavelet transform on a block of image data, using a smaller memory than would be required to implement an equivalent conventional multi-stage wavelet transform on the same block, and a method and apparatus for performing compression on a block of image data by performing a multi-stage wavelet transform on the block, quantizing coefficients resulting from the multi-stage wavelet transform, and performing entropy encoding on the quantized coefficients. Typically, the input image data is generated by a document scanner, and is compressed in a manner allowing fast decompression (by employing simple entropy encoding) and imposing low memory requirements.

Abstract: An apparatus for and method of transmitting and synchronizing isochronous data on a USB endpoint pipe are disclosed. Also disclosed are a double buffering capability, a transmission delay capability, a synchronization capability, and a clock adjustment capability.

Abstract: Apparatus for scoring a cover to be applied to a bound stack of sheets to form a book. A base unit is provided having a surface for receiving the cover, an lower die holder disposed below the surface and an upper die holder disposed above the surface. A lower die is supported on an upper surface of the lower die holder and an upper die is supported on the lower surface of the upper die holder. An actuating structure such as a handle, is used to move the upper and lower die between an open position and a closed where the upper and lower die score the cover. The upper die holder is fabrication using a transparent material so that a user can view the upper die and underlying cover to facilitate proper alignment.

Abstract: A cascode amplifier integrated circuit (IC) with frequency compensation capability that possesses a tight overall variation in transient rise and fall time, is relatively small in size and has a relatively high RC series circuit breakdown voltage. The cascode amplifier IC includes an input bias terminal configured to receive a bias voltage Vb, a power supply input terminal configured to receive a power supply voltage Vcc, an input signal terminal configured to receive an input voltage signal Vin, and an output signal terminal. The cascode amplifier IC also includes a gain stage circuit, an output buffer stage circuit and a resistance-capacitance (RC) series circuit configured to provide frequency compensation during operation of the cascode amplifier IC. The RC series circuit has a peaking bipolar transistor configured to provide a bipolar junction peaking capacitance between the output signal terminal and the gain stage circuit.

Abstract: An integrated circuit power supply controller for use in a power supply that provides voltage regulating and current limiting functions. A current limit circuit is provided that includes a band-gap circuit for producing a reference voltage for precisely setting the current limit point, with the band-gap circuit being powered by a current sense voltage indicative of the load current rather than being powered by the regulated output voltage. Thus, the current limit circuit will operate even the power supply output is shorted. Voltage control circuitry is provided also includes a band-gap circuit for precisely controlling the magnitude of the regulated output voltage.

Abstract: A method of testing a circuit having an interface which includes data and clock information where phase jitter is introduced into the clock that produces the clock information. The clock is cycled by increasing the period of the clock for a predetermined number of clock cycles so as to introduce an increasing phase shift advance in the clock. The clock is also cycled by decreasing the period of the clock for a predetermined number of clock cycles so as to introduce an increasing phase shift delay in the clock. The circuit under test is caused to sample the data using a clock derived from the clock information. The sampled data is then compared with reference data to determine the error rate.

Abstract: An encoded binder strip having an adhesive matrix and an encoded pattern formed on a surface of the matrix to identify the type of binder strip. The encoded pattern includes relatively high reflectivity regions and relatively low reflectivity regions. Preferably, the encoded pattern is read as the binder strip is fed into a binding machine, with the encoded pattern controlling operation of the machine.

Abstract: A correlated double sampler (CDS) circuit having a ping/pong architecture which employs only a single amplifier, and a CCD image sensor output processing circuit including such a CDS circuit and preferably also an analog-to-digital converter for processing the output of the CDS circuit and a black level correction feedback loop. In one cycle of operation (during processing of the raw output of a CCD sensor), the CDS circuit receives a first set of control signals followed by a second set of control signals, its output signal in response to the first set is indicative of the value of one pixel of a sensed image, and its output signal in response to the second set is indicative of the value of the next pixel of the image. Preferably, each set of control signals consists of a clamp signal, a sample signal, and a hold signal.

Abstract: A capacitor array circuit having at least two capacitors, switching circuitry coupled to the capacitors and to input, output and common nodes and control circuitry. The control circuitry operates to sequentially switch the array through three different states so that a voltage is developed across each of the capacitors which is at a fixed value proportional to a voltage present at the input node. The fixed and thus determinate voltage drop across each of the capacitors operates to define voltages at any nodes intermediate the capacitors thereby, among other things, insuring reliable operation of the capacitor array circuit.

Abstract: A fully differential continuous-time current-mode high-speed complimentary metal oxide semiconductor comparator is disclosed. The comparator includes an input and an output; a pre-amplifier clement coupled to each respective one of the plurality of inverters; an application switch operative to couple the pre-amplifier element to the input of a corresponding one of the plurality of inverters, the application switch having a first duty cycle; a current source operative to provide a bias current; and a bias switch operative to couple the bias current to each of the plurality of inverters, the bias switch having a duty cycle that is complementary to the duty cycle of the application switch, wherein the output of each of the plurality of inverters is pulled to about one-half the maximum output voltage level before a comparison between input signals is performed.