Patents Represented by Attorney Gray Cary Ware & Freidenrich, LLP
  • Patent number: 6750866
    Abstract: In accordance with a set of embodiments of the present invention, a method can be used to filter the motion of a body or a system of articulated bodies so that the motion conforms to the laws of classical dynamics. Based on a specified set of kinematic inputs, on a dynamic model that represents the articulated bodies, and on a set of tunable filter parameters, an optimization-based inverse dynamics algorithm can be used to determine values of control variables and each time step during a forward simulation so that the model is driven toward the specified set of desired kinematics while at the same time potentially optimizing various other aspects of the motion. The embodiments may be useful in the areas of biomechanics, medicine, ergonomics, computer animation, or other areas where realistic motion generation is desired.
    Type: Grant
    Filed: April 20, 2001
    Date of Patent: June 15, 2004
    Assignee: Realistic Dynamics, Inc.
    Inventor: Frank C. Anderson, III
  • Patent number: 6750090
    Abstract: A self aligned method of forming a semiconductor memory array of floating gate memory cells in a semiconductor substrate having a plurality of spaced apart isolation regions and active regions on the substrate substantially parallel to one another in the column direction. Floating gates are formed in each of the active regions, each having a pair of upwardly extending sharp edges that extend lengthwise parallel to, and are adjacent to, one of the isolation regions. Control gates are each formed with a substantially vertical face portion by covering a portion of a conductive layer with a protective layer, and performing an anisotropic etch to remove the exposed portion of the conductive layer. An insulation sidewall spacer is formed against the vertical face portion. The control gates have protruding portions that extend over the floating gates, including portions of the pair of upwardly extending sharp edges.
    Type: Grant
    Filed: January 24, 2003
    Date of Patent: June 15, 2004
    Assignee: Silicon Storage Technology, Inc.
    Inventor: Geeng-Chuan Chern
  • Patent number: 6751118
    Abstract: Memory array architectures and operating methods suitable for super high density in the giga bits for multilevel nonvolatile memory integrated circuit system. The array architectures and operating methods include: (1) an Inhibit and Select Segmentation Scheme; (2) a Multilevel Memory Decoding Scheme that includes a Power Supply Decoded Decoding Scheme, a Feedthrough-to-Memory Decoding Scheme, a Feedthrough-to-Driver Decoding Scheme, and a Winner-Take-All Kelvin Memory Decoding Scheme; (3) a constant-total-current-program scheme; (4) includes fast-slow and 2-step ramp rate control programming; and a reference system method and apparatus, which includes a Positional Linear Reference System, a Positional Geometric Reference System, and a Geometric Compensation Reference System. The apparatus and method enable multilevel programming, reading, and margining.
    Type: Grant
    Filed: August 13, 2001
    Date of Patent: June 15, 2004
    Assignee: Silicon Storage Technology, Inc.
    Inventors: Hieu Van Tran, Sakhawat M. Khan, George J. Korsh
  • Patent number: 6746867
    Abstract: The invention relates to a family of mammalian genes that are transcribed in the immediate early phase following exposure to Fibroblast Growth Factors (FGF) during mesoderm induction, termed Mesoderm Induction Immediate Early Response (MIER) genes. Defining features of the members of this family include that these genes are a) transcribed in response to fibroblast growth factors (FGF); b) are expressed within 40 minutes of FGF treatment; and c) do not require protein synthesis for transcription. There are at least eleven members within this family. The invention relates generally to compositions of and diagnostic methods relating to the M-MIER gene family, cDNA, nucleotide fragments, polypeptides coded thereby, recombinant host cells and vectors containing M-MIER encoding polynucleotide sequences, recombinant M-MIER polypeptides, and antibodies. By way of example, the invention discloses the cloning and functional expression of different M-MIER polypeptides.
    Type: Grant
    Filed: October 13, 1998
    Date of Patent: June 8, 2004
    Assignee: Genesis Group Inc.
    Inventors: Laura Lee Gillespie, Gary David Paterno
  • Patent number: 6747007
    Abstract: A class of cationic, polyphemusin-like peptides having antimicrobial activity is provided. Examples of such peptides include FRWCFRVCYKGRCRYKCR (SEQ ID NO:3), RRWCFRVCYKGFCRYKCR (SEQ ID NO:4), and RRWCFRVCYRGRFCYRKCR (SEQ ID NO:11). Also provided are methods for inhibiting the growth of microbes such as bacteria, yeast and viruses utilizing the peptides of the invention. The peptides are particularly useful for inhibiting endotoxemia in a subject.
    Type: Grant
    Filed: January 8, 2002
    Date of Patent: June 8, 2004
    Assignee: The University of British Columbia
    Inventors: Robert E. W. Hancock, Lijuan Zhang
  • Patent number: 6747013
    Abstract: The present invention provides a novel method for the treatment of cellular accumulation in chronic inflammatory diseases such as rheumatoid arthritis. The method includes gene delivery and gene expression that is capable of enhancing apoptosis of accumulating cells and those cells which recruit accumulating cells. Also provided are diagnostic methods for detecting cellular accumulation diseases.
    Type: Grant
    Filed: July 29, 1999
    Date of Patent: June 8, 2004
    Assignees: The Regents of the University of California, La Jolla Institute for Allergy and Immunology
    Inventors: Gary S. Firestein, Nathan J. Zvaifler, Douglas R. Green
  • Patent number: 6747771
    Abstract: Systems and methods are described for off-axis illumination direct-to-digital holography.
    Type: Grant
    Filed: September 3, 2002
    Date of Patent: June 8, 2004
    Assignee: UT-Battelle, L.L.C.
    Inventors: Clarence E. Thomas, Jeffery R. Price, Edgar Voelkl, Gregory R. Hanson
  • Patent number: 6744806
    Abstract: A fast-synchronizing receiver having a circuit including an equalizer configured for manipulating an analog signal; a detector in communication with the equalizer; a filter in communication with the detector; an oscillator in communication with the filter; a gate for receiving the manipulated signal; a circuit portion for synchronizing and tracking the manipulated signal; a summing circuit in communication with the circuit portion; and an output gate.
    Type: Grant
    Filed: September 13, 2000
    Date of Patent: June 1, 2004
    Assignee: UT-Battelle, L.L.C.
    Inventors: Michael Roy Moore, Stephen Fulton Smith, Michael Steven Emery
  • Patent number: 6745210
    Abstract: A method and system for examining historical records of backup activity consolidated from a plurality of backup engines, utilizing a data processing system, is disclosed. In the first aspect, a method comprises the steps of reorganizing historical records of backup activity originating from a plurality of backup engines into unique visual representations to facilitate the speedy and reliable identification of backup activity failures. The method also includes sending prepared requests from BRG to RDB, and then receiving data from RDB. In another aspect, it is disclosed a method of representing a uniquely high number of levels of data extraction relating to backup successes and failures. In another aspect, it is disclosed a method of representing variations other than simply Failure or Success of backup activities, namely Partial failures.
    Type: Grant
    Filed: September 19, 2000
    Date of Patent: June 1, 2004
    Assignee: Bocada, Inc.
    Inventors: Liam Scanlan, Cory Bear
  • Patent number: 6745172
    Abstract: An expert system adapted data network guidance engine. The invention allows an agent to interact with a customer and to provide selection and recommendation of data network products and/or services for the customer. The invention allows for the use of agents of varying skill levels, including relatively low skill level, without suffering deleterious performance. The data network guidance engine is operable to perform generation and selection of configurations that are generated using various heuristics. If desired, numerous iterations are performed within each of the heuristic operations. The data network guidance engine is operable to select recommended configurations from among a number of potential options. In addition, compatible configurations may also be identified. The data network guidance engine is one of the underlying engines within the expert system that allows the agent to provide real time interaction with a customer and to provide a real time recommended solution to that customer.
    Type: Grant
    Filed: July 19, 2001
    Date of Patent: June 1, 2004
    Assignee: Whisperwire, Inc.
    Inventors: Rod Mancisidor, Rob Norris, Charles R. Erickson, Ahmed Gheith
  • Patent number: 6743674
    Abstract: A self aligned method of forming a semiconductor memory array of floating gate memory cells in a semiconductor substrate, along with strap regions interlaced within the array. The array includes word lines and source lines that connect together control gates and source regions from memory cells contained in row within the array. The strap regions include word line strap cells through which the word lines traverse, wherein the word lines completely traverse across the strap regions, and source line strap cells in which the source lines terminate without completely traversing across the strap region. The control gate polysilicon is formed over the substrate, and protected by a layer of protective material, before the formation of other polysilicon elements associated with the memory array, to ensure the proper remove of residual polysilicon stringers.
    Type: Grant
    Filed: July 24, 2002
    Date of Patent: June 1, 2004
    Assignee: Silicon Storage Technology, Inc.
    Inventor: Chih Hsin Wang
  • Patent number: 6741915
    Abstract: Systems and methods are described for a usage monitoring HVAC control system. A method, includes: providing a usage monitoring heating ventilation and air conditioning control system, the usage monitoring heating ventilation and air conditioning control system including a programmable digital thermostat with an on board memory, issuing personal identification numbers to each of a plurality of system users; associating each of the plurality of system users with at least one of a plurality of user types; storing the personal identification numbers in a first data structure in the on board memory; and linking each one of a plurality of entries in the first data structure by reference to at least one of a plurality of entries in a second data structure in the on board memory, the second data structure including a list of user types.
    Type: Grant
    Filed: August 22, 2001
    Date of Patent: May 25, 2004
    Assignee: MMI Controls, Ltd.
    Inventor: Robert J. Poth
  • Patent number: 6741449
    Abstract: A tunable element in the microwave frequency range is described that may include one or more tunable elements that are directly digitally controlled by a digital bus connecting a digital control circuit to each controlled element. In particular, each digital signal is filtered by a digital isolation technique so that the signal reaches the tunable elements with very low noise. The low noise digital signals are then converted to analog control voltages. The direct D/A conversion is accomplished by a special D/A converter which is manufactured as an integral part of a substrate. This D/A converter in accordance with the invention may consist of a resistor ladder or a directly digitally controlled capacitor. The direct digitally controlled capacitor may be a cantilevered type capacitor having multiple separate electrodes or sub-plates representing binary bits that may be used to control the capacitor.
    Type: Grant
    Filed: August 18, 1999
    Date of Patent: May 25, 2004
    Assignee: Bridgewave Communications, Inc.
    Inventor: Eliezer Pasternak
  • Patent number: 6738434
    Abstract: A satellite communications system provides an information channel between remotely located transmitters and receivers. A virtual satellite system provides the same service, but divides the signal either in power or in data content into subchannels such that any particular signal is conducted to the intended receiver via a plurality of traditional satellite channels. The receiving terminal accepts the plurality of signals simultaneously from a possible plurality of satellites, combining the subchannels comprising the virtual channel into the original signal content as if conducted via a single channel. The receiving antenna system receives satellite subchannel signals from a plurality of directions using multiple antennas or a single antenna with multi-direction capability. Prior to signal combining, the receiver necessarily time- synchronizes the plurality of subchannels by introducing time delay in some channels before combining the subsignals into the original composite.
    Type: Grant
    Filed: August 28, 2002
    Date of Patent: May 18, 2004
    Assignee: Virtual Satellite Corporation
    Inventor: Robert F. Friedman
  • Patent number: 6738854
    Abstract: A storage router (56) and storage network (50) provide virtual local storage on remote SCSI storage devices (60, 62, 64) to Fibre Channel devices. A plurality of Fibre Channel devices, such as workstations (58), are connected to a Fibre Channel transport medium (52), and a plurality of SCSI storage devices (60, 62, 64) are connected to a SCSI bus transport medium (54). The storage router (56) interfaces between the Fibre Channel transport medium (52) and the SCSI bus transport medium (54). The storage router (56) maps between the workstations (58) and the SCSI storage devices (60, 62, 64) and implements access controls for storage space on the SCSI storage devices (60, 62, 64). The storage router (56) then allows access from the workstations (58) to the SCSI storage devices (60, 62, 64) using native low level, block protocol in accordance with the mapping and the access controls.
    Type: Grant
    Filed: June 19, 2002
    Date of Patent: May 18, 2004
    Assignee: Crossroads Systems, Inc.
    Inventors: Geoffrey B. Hoese, Jeffry T. Russell
  • Patent number: 6736986
    Abstract: Systems and methods are described for a chemical reaction synthesis of films, coatings or layers using surfactants. A method includes providing a surfactant as an impurity within at least one of a first precursor layer that is coupled to a first substrate and a second precursor layer that is coupled to a second substrate; forming a composition layer; and moving the first substrate relative to the second substrate, wherein the composition layer remains coupled to the second substrate. The first precursor layer includes a first chemical reactant, the second precursor layer includes a second chemical reactant, and the composition layer includes a chemical product yielded by a chemical reaction between the first chemical reactant and the second chemical reactant.
    Type: Grant
    Filed: September 20, 2001
    Date of Patent: May 18, 2004
    Assignee: Heliovolt Corporation
    Inventor: Billy J. Stanbery
  • Patent number: 6733220
    Abstract: A cargo bar including first and second bars extending from opposite sides of a grip housing, with distal ends thereof defining a cargo bar length. An advancement pawl moves the first bar away from the second bar to increase the cargo bar length. A holding pawl prevents the first bar from moving back toward the second bar to decrease the cargo bar length. First and second handles are rotatably attached to the housing between folded positions proximate to the housing and operating positions extending away from the housing. The first handle has an engagement portion that engages with and operates the advancement pawl as the first and second handles are squeezed together. The holding pawl includes a release tab that extends from the housing that when pressed, causes the holding pawl to release the first bar and allow it to move to decrease the cargo bar length.
    Type: Grant
    Filed: August 15, 2002
    Date of Patent: May 11, 2004
    Assignee: USA Products Group, Inc.
    Inventors: Raymond S. Brown, Ami Nadav Shapiro
  • Patent number: 6734659
    Abstract: Systems and methods for determining differential currents in a pair of circuits. In a preferred embodiment, an excitation voltage and a tightly coupled differencing current transformer are coupled to a differential capacitance manometer to generate a differential current. This differential current is input to a low-impedance summing node of a charge amplifier that effectively integrates the differential current. A shielding structure surrounding the current transformer and amplifier is driven to the excitation voltage potential. The output of the charge amplifier is passed through a common mode transformer which is coupled to the excitation voltage source in order to remove the guard potential (corresponding to the excitation signal) from the output signal. A synchronous detector then converts the resulting signal to a DC level indicative of the differential capacitance of the sensor.
    Type: Grant
    Filed: June 13, 2002
    Date of Patent: May 11, 2004
    Assignee: Mykrolis Corporation
    Inventor: Michael W. Fortner
  • Patent number: 6733971
    Abstract: The present invention provides transcription factors associated with the hedgehog signaling pathway that are regulated by dephosphorylation by phosphatases. Hedgehog response elements (HRE) that interact with the dephosphorylated transcription factors are also provided as well as methods for identifying compounds that are phosphatase inhibitors. Methods of treating tumors in a subject by modulating the phosphorylation of the transcription factor are also included.
    Type: Grant
    Filed: August 21, 2001
    Date of Patent: May 11, 2004
    Assignees: Baylor College of Medicine, The Johns Hopkins University School of Medicine
    Inventors: Philip A. Beachy, Ming-Jer Tsai, Sophia Tsai, Venkatesh Krishnan, Chien-Huan Chen
  • Patent number: 6735139
    Abstract: A system 100 which provides asynchronous SRAM functionality with a DRAM device. The system 100 includes an address transition detector circuit 102, a memory clock generator circuit 104, a refresh timer 106, a refresh address counter 108, a memory access controller 110, a memory control sequencer 112, an address buffer 114, a write data buffer 116, a three-input address multiplexer 118, a two-input data multiplexer 120, inverters 122, 124, 126, and 128, AND gates 130, 132, and 134, NOR gates 136, 138, 140, and 142, OR gate 156, and a DRAM array 144 of memory cells. The components of system 100 cooperate to selectively interrupt external memory commands, such as read and write commands, in order to perform refresh operations on array 144.
    Type: Grant
    Filed: December 14, 2001
    Date of Patent: May 11, 2004
    Assignee: Silicon Storage Technology, Inc.
    Inventor: Robin Tang