Patents Represented by Attorney Graybeal Jackson Haley
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Patent number: 8338230Abstract: A system and method are provided in which a first chip in a stacked multi-chip module configuration is affixed via one or more adhesion layers to a first portion of a partitioned interposer unit. Planar partitions of the interposer are physically bonded via multiple solder “bumps,” which possess high tensile strength but low resistance to horizontal shear force or torque. A second chip is affixed via one or more adhesion layers to the second portion of the partitioned interposer. The chips may thus be separated by horizontally and oppositely shearing or twisting the first and second portions of the partitioned interposer away from one another.Type: GrantFiled: September 27, 2011Date of Patent: December 25, 2012Assignee: BAE Systems Information and Electronic Systems Integration Inc.Inventors: John A. Hughes, Thomas E. Love, Eugene Lemoine, David H. Lee, Christopher Ebel
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Patent number: 8036023Abstract: A circuit and method are provided in which a six-transistor (6-T) SRAM memory cell is hardened to single-event upsets by adding isolation-field effect transistors (“iso-fets”) connected between the reference voltage Vdd and the field-effect transistors (“fets”) respectively corresponding to first and second inverters of the memory cell. According to certain embodiments, the control gates of first and second P-iso-fets are respectively tied to the control gates of first and second pull-up P-fets. According to certain embodiments, first and second N-iso-fets are connected between the output nodes of the memory cell and the pull-down N-fets respectively corresponding to the first and second inverters. The control gates of the first and second N-iso-fets are respectively tied to the control gates of the first and second pull-down N-fets. Again according to certain embodiments, one or more of the iso-fets are physically removed from the proximity of other transistors which comprise the memory cell.Type: GrantFiled: October 7, 2010Date of Patent: October 11, 2011Assignee: BAE Systems Information and Electronic Systems Integration Inc.Inventors: Reed K. Lawrence, Nadim F. Haddad
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Patent number: 7876602Abstract: A circuit and method are provided in which a six-transistor (6-T) SRAM memory cell is hardened to single-event upsets by adding isolation-field effect transistors (“iso-fets”) connected between the reference voltage Vdd and the field-effect transistors (“fets”) respectively corresponding to first and second inverters of the memory cell. According to certain embodiments, the control gates of first and second P-iso-fets are respectively tied to the control gates of first and second pull-up P-fets. According to certain embodiments, first and second N-iso-fets are connected between the output nodes of the memory cell and the pull-down N-fets respectively corresponding to the first and second inverters. The control gates of the first and second N-iso-fets are respectively tied to the control gates of the first and second pull-down N-fets. Again according to certain embodiments, one or more of the iso-fets are physically removed from the proximity of other transistors which comprise the memory cell.Type: GrantFiled: June 18, 2008Date of Patent: January 25, 2011Assignee: BAE Systems Information and Electronic Systems Integration Inc.Inventors: Reed K. Lawrence, Nadim F. Haddad
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Patent number: 7508855Abstract: A mid-infrared emitter sub-system includes a heat sink and a diamond thermal diffusion layer connected to the heat sink through a first thermal bonding layer. The first thermal bonding layer has a first melting point. A semiconductor slab portion of a semiconductor laser is connected to the diamond thermal diffusion layer through a second thermal bonding layer. The second thermal bonding layer has a second melting point that is less than the first melting point.Type: GrantFiled: March 28, 2005Date of Patent: March 24, 2009Assignee: BAE Systems Information and Electronic Systems Integration Inc.Inventor: Christopher J. Chao
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Patent number: 7443146Abstract: Conduction loss in the body-diode of a low side MOSFET of a power switching stage of one phase of a coupled-inductor, multi-phase DC-DC converter circuit, associated with current flow in the output inductor of that one phase that is induced by current flow in a mutually coupled output inductor of another phase, during normal switching of that other stage, is effectively prevented by applying auxiliary MOSFET turn-on signals, that coincide with the duration of the induced current, to that low side MOSFET, so that the induced current will flow through the turned-on low side MOSFET itself, thereby by-passing its body-diode.Type: GrantFiled: September 12, 2006Date of Patent: October 28, 2008Assignee: Intersil Americas Inc.Inventors: Jia Wei, Kun Xing
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Patent number: 7412045Abstract: A method of deploying a telecommunications service implemented in a service graph formed from a plurality of service independent building blocks includes developing the service graph from a plurality of service independent building blocks interconnected to execute a service process. From the service graph, a service script is generated and the service script is transferred to a customer.Type: GrantFiled: October 30, 2003Date of Patent: August 12, 2008Assignee: Hewlett-Packard Development Company, L.P.Inventor: James H. VanGilder
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Patent number: 7373432Abstract: A programmable circuit receives configuration data from an external source, stores the firmware in a memory, and then downloads the firmware from the memory. Such a programmable circuit allows a system, such as a computing machine, to modify the programmable circuit's configuration, thus eliminating the need for manually reprogramming the configuration memory. For example, if the programmable circuit is an FPGA that is part of a pipeline accelerator, a processor coupled to the accelerator can modify the configuration of the FPGA. More specifically, the processor retrieves from a configuration registry firmware that represents the modified configuration, and sends the firmware to the FPGA, which then stores the firmware in a memory such as an electrically erasable and programmable read-only memory (EEPROM). Next, the FPGA downloads the firmware from the memory into its configuration registers, and thus reconfigures itself to have the modified configuration.Type: GrantFiled: October 9, 2003Date of Patent: May 13, 2008Assignee: Lockheed MartinInventors: John W. Rapp, Larry Jackson, Mark Jones, Troy Cherasaro
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Patent number: 7362616Abstract: A non-volatile memory device is proposed.Type: GrantFiled: July 28, 2006Date of Patent: April 22, 2008Assignee: STMicroelectronics S.r.l.Inventors: Angelo Bovino, Rino Micheloni, Roberto Ravasio
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Patent number: 7357396Abstract: In an automotive suspension, a supporting member supporting a wheel hub is connected mechanically to a frame of a car to move in a vertical direction with respect to the frame; movement of the supporting member in the vertical direction is opposed by a spring-shock absorber assembly connected mechanically on one side to the frame of the car, and on the other side to the supporting member by means of a coupling device of variable geometry, which is controlled selectively by an actuator for varying the geometry of the coupling device in such a manner as to vary a suspension ratio between vertical movement of the supporting member and a corresponding variation in length of the spring-shock absorber assembly.Type: GrantFiled: November 3, 2006Date of Patent: April 15, 2008Assignee: Ferrari S.p.A.Inventor: Paolo Dellacha
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Patent number: 7339737Abstract: A beam multiplier includes a beam-multiplying layer and an adjacent optical layer. The beam-multiplying layer is operable to generate output beamlets of light from an input beam of light, and the optical layer has an adjustable index of refraction. By switching the index of refraction of the optical layer between first and second values, one can switch the beam multiplier to a first state (e.g., “on”) where it generates the output beamlets of light, and can switch the beam multiplier to a second state (e.g., “off”) where it passes the input beam of light but does not generate the output beamlets. And by using the beam multiplier as an exit-pupil expander, one can switch the exit-pupil expander to a first state where it generates multiple exit-pupil images, and to a second state where it generates only a single exit-pupil image.Type: GrantFiled: July 12, 2004Date of Patent: March 4, 2008Assignee: Microvision, Inc.Inventors: Hakan Urey, Clarence T. Tegreene
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Patent number: 7328559Abstract: In a device for conveying capsules containing at least one pharmaceutical product, each capsule is fed along a feed line defined by two pocket conveyors connected to each other at a transfer station having a detecting device for determining at least the weight of the pharmaceutical product in the capsule, and is transferred from one pocket conveyor to the other of the feed line with no change in its orientation.Type: GrantFiled: September 11, 2006Date of Patent: February 12, 2008Assignee: MG-2 - S.r.l.Inventor: Ernesto Gamberini
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Patent number: 7321516Abstract: A biasing structure for a memory cell storage element, for setting an operating voltage at an accession electrode of the memory cell storage element. The biasing structure includes a biasing transistor coupled to the accession electrode and adapted to set the operating voltage based on a biasing voltage received at a control electrode of the biasing transistor, and a biasing voltage generator for generating the biasing voltage. The biasing voltage generator includes a feedback voltage regulation structure adapted track changes in a threshold voltage of the biasing transistor, so as to keep the operating voltage at the accession electrode of the memory cell storage element substantially stable against operating condition changes.Type: GrantFiled: February 22, 2005Date of Patent: January 22, 2008Assignee: STMicroelectronics, S.r.l.Inventors: Alberto Jose' Di Martino, Enrico Castaldo, Nicolas Demange, Daniele Salvatore Zompi
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Patent number: 7312765Abstract: A display system includes an image generator that generates an image and a control circuit that reduces or eliminates the viewer's perception of a visual artifact when the viewer's gaze shifts with respect to the image. For example, such a display system may generate a fill-in light to reduce or eliminate the viewer's perception of flicker or other visual artifacts when the viewer shifts his gaze with respect to an exit pupil through which the generated image is viewed. The system may match the fill-in light's brightness, color, or both the brightness and color to the brightness and/or color of the image.Type: GrantFiled: February 6, 2003Date of Patent: December 25, 2007Assignee: Microvision, Inc.Inventors: Gerard de Wit, John Lewis, Bernie Murray, Clarence Tegreene
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Patent number: 7310174Abstract: A beam scanner is operable to scan light in two or more axes, typically in a raster pattern that includes a fast scan axis and a slow scan axis. Plural beams of light are scanned, each beam of light producing a scanned region that at least partially overlaps at least one adjoining scanned region. Scanned regions may be aligned to adjoin and overlap along a dimension corresponding to the slow scan axis. The beam scanner may comprise a scanned beam display and/or a scanned beam image capture device. In a display, the power level of overlapping displayed pixels may be scaled to provide smooth transitions between adjoining regions to improve the image quality presented to a viewer. In an image capture device, one or more detectors is operable to collect light scattered from adjoining regions and a controller is operable to produce an image from the scanned regions.Type: GrantFiled: November 28, 2005Date of Patent: December 18, 2007Assignee: Microvision, Inc.Inventors: David W. Wine, Mark P. Helsel, Clarence T. Tegreene
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Patent number: 7302243Abstract: A method and apparatus is disclosed for detecting the frequency to which a broadcast receiver is tuned. In one embodiment, a sensing unit emits a chirp signal over a range of broadcast bands and monitors the output of the radio receiver to detect the frequency to which the radio receiver is tuned. In another embodiment, a sensing unit demodulates radio signals across a range of frequencies and compares the demodulated signals to observed audio output of the radio receiver.Type: GrantFiled: October 14, 2003Date of Patent: November 27, 2007Assignee: Microvision, Inc.Inventor: Philippe Tarbouriech
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Patent number: 7277213Abstract: An aperture plate includes an opening and a surface adjacent to the opening. The opening passes electromagnetic energy such as light to a reflector that is aligned with the opening and that directs the electromagnetic energy to a location. The surface reflects incident electromagnetic energy away from the location in a direction that is outside of the range of directions. Such an aperture plate insures that electromagnetic energy, e.g., light, strikes only the desired portions of the reflector, and that peripheral light that is outside of the aperture opening is reflected away from the location, e.g., display screen, toward which the reflector directs the electromagnetic energy. Furthermore, because such an aperture plate is mounted near the reflector, the alignment tolerances are typically less stringent than for an aperture plate mounted near the energy source.Type: GrantFiled: December 3, 2004Date of Patent: October 2, 2007Assignee: Microvision, Inc.Inventors: Mathew D. Watson, Christopher A. Wiklof
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Patent number: 7124392Abstract: A method for mapping an electronic digital circuit to a Look Up table (LUT) based Programmable Logic Deviceoperates by selecting an unmapped or partially mapped LUT, and identifying a group of circuit elements for mapping on the selected LUT based on the available capacity of the selected LUT and the mapping constraints. The identified circuit elements are mapped onto the selected LUT. The identification of circuit elements and mapping is carried out while taking into consideration the Cascade Logic associated with the selected LUT. The process continues until all circuit elements have been mapped. The group of circuit elements is mapped to the cascade logic prior to mapping on the LUTs. Conversely, the cascade logic is incorporated only after all circuit elements have initially been mapped onto LUTs or some elements remain unmapped after all LUTs have been utilized. The mapping constraints include timing, placement, and size constraints.Type: GrantFiled: September 29, 2003Date of Patent: October 17, 2006Assignee: STMicroelectronics, Pvt. Ltd.Inventor: Sunil Kumar Sharma
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Patent number: 7116806Abstract: Systems, methods, etc., that assist a print examiner to thoroughly search and compare a print or substantial portion thereof against a known print database contained within an AFIS system. In certain embodiments, the prints can be definitively matched to a corresponding same print in the database. A result of a more thorough search and comparison can be a higher hit score and accuracy rate. In certain embodiments, the database comprises a candidate list of previously obtained prints to assist in the identification.Type: GrantFiled: October 12, 2004Date of Patent: October 3, 2006Assignee: LumenIQ, Inc.Inventors: Kasey Werthiem, Jeff Walajtys
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Patent number: 7115841Abstract: Optical systems that provide for simultaneous images and spectra from an object, such as a tissue sample, an industrial object such as a computer chip, or any other object that can be viewed with an optical system such as a microscope, endoscope, telescope or camera. In some embodiments, the systems provide multiple images corresponding to various desired wavelength ranges within an original image of the object, as well as, if desired, directional pointer(s) that can provide both an identification of the precise location from which a spectrum is being obtained, as well as enhancing the ability to point the device.Type: GrantFiled: February 14, 2005Date of Patent: October 3, 2006Assignee: Perceptronix Medical, Inc.Inventors: Haishan Zeng, Stephen Lam, Branko Mihael Palcic
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Patent number: 7110741Abstract: A radiofrequency unit comprising a first dielectric substrate supporting a first conductive antenna layer; a second dielectric substrate supporting circuit elements connected or coupled to ground formed in a second conductive layer, and comprising a radiofrequency antenna line; and a third screen conductive layer arranged between the first and second substrates, provided with a slot to couple the antenna line to the antenna layer, this conductive layer being floating; in which the thickness and the nature of the second substrate are chosen by taking into account the surface of said circuit elements for the screen layer to be coupled to ground by a capacitor forming a short-circuit for radiofrequencies.Type: GrantFiled: November 25, 2003Date of Patent: September 19, 2006Assignee: STMicroelectronics, S.A.Inventors: Vincent Knopik, Didier Belot