Abstract: A peer-vector machine includes a host processor and a hardwired pipeline accelerator. The host processor executes a program, and, in response to the program, generates host data, and the pipeline accelerator generates pipeline data from the host data. Alternatively, the pipeline accelerator generates the pipeline data, and the host processor generates the host data from the pipeline data. Because the peer-vector machine includes both a processor and a pipeline accelerator, it can often process data more efficiently than a machine that includes only processors or only accelerators. For example, one can design the peer-vector machine so that the host processor performs decision-making and non-mathematically intensive operations and the accelerator performs non-decision-making and mathematically intensive operations.

Abstract: A columbarium apparatus comprises a columbarium structure defining a plurality of niches. Each niche has an open end, and a horizontal ledge extends from the structure near the bottom wall of each niche. An inside door is configured to cover the open end of the niche and is attached by a first set of tamper resistant hardware, and an outside door is configured to cover the inside door and conceal the first set of tamper proof hardware, and is attached by a second set of tamper resistant hardware such that an inner face of the outer door is supported by an outer face of the inside door, and such that a lower edge of the outside door is supported by the ledge. A vertical channel is provided to facilitate attachment of the outside doors.

Abstract: A circuit comprises a first circuit portion that includes an electrically insulative first body having a first connector and a first circuit element coupled to the first body. The circuit further comprises a second circuit portion that includes an electrically insulative second body having a second connector coupled to the first connector and a second circuit element coupled to the second body. The circuit further comprises a first electrical conductor coupled to the first and second circuit elements.

Abstract: A semiconductor memory device, including a plurality of programmable memory cells each one adapted to be brought into one among at least a first status and a second status, said plurality of memory cells including memory cells intended to store data, and means for accessing the memory cells for reading/modifying their status. At least one memory cell in said plurality is used as detector memory cell, and control means operatively associated with the at least one detector memory cell are provided, said control means being adapted to establishing a potential loss of the data stored in the memory cells of said plurality based on a detected first status of the at least one detector memory cell.

Abstract: A portable terminal has the dual display module structure in which a plurality of panels provided in the portable terminal are combined with clear conjunction to display a distortionless large screen display. The portable terminal includes a first display panel unit for displaying a first image, a second display panel unit for displaying a g the second display panel unit with the first display panel unit with supporting rotational shift, and a film connecting unit facing the hinge unit. A film is inserted in the connecting unit for connecting the first display panel unit with the second display panel unit electrically.

Abstract: A method of deploying a telecommunications service implemented in a service graph formed from a plurality of service independent building blocks includes developing the service graph from a plurality of service independent building blocks interconnected to execute a service process. From the service graph, a service script is generated and the service script is transferred to a customer.

Abstract: A chemical vapor deposition method comprises steps of: a) injecting a source gas into a chamber so that the source gas is adsorbed on a substrate; b) injecting a purge gas into the chamber for a predetermined period of time so that the source gas remaining in the chamber is purged; c) injecting a reactant gas into a plasma generating portion, and generating plasma at the plasma generating portion by applying a first-level RF power source to a RF electrode plate so that radical of the reactant gas is adsorbed on the substrate; d) injecting a purge gas into the chamber for a predetermined period of time so that the reactant gas remaining in the chamber is purged; and e) applying a second-level RF power source to the plasma generating portion at the step a), b) and d) while the steps a) to d) are being repeated.

Abstract: The present invention discloses a coolant header for hot rolled strip cooling devices, which cools a hot rolled strip fed from a finish rolling mill.

Abstract: A phase locked loop circuit comprising a phase detector having a first input for receiving a first frequency signal and an output, a first filter adapted to filter the output electric signal of the phase detector, a voltage controlled oscillator adapted to generate a second frequency signal in response to the output filtered signal of the phase detector. The phase detector has a second input for receiving the second frequency signal and is adapted to compare it with the first frequency signal. The circuit comprises means adapted to amplify the difference between an electric signal coupled with the output of the phase detector and a reference electric signal and a second filter adapted to receive the output electric signal of the amplification means and to send an output electric signal to the voltage controlled oscillator. The circuit comprises further means adapted to modify the value of the electric signal in input to the second filter to decrease the response time of the second filter.

Abstract: Described herein is an optically readable memory device comprising a molecular memory obtained using carbon nanotubes. In particular, the molecular memory uses, as memory element, a bundle of carbon nanotubes, for which it is possible to obtain at least two stable states by modifying their geometrical configuration and, consequently, their optical transmission properties.

Abstract: A regulator circuit for a charge pump voltage generator includes a voltage comparator circuit that performs a voltage comparison between a charge pump output voltage and a reference voltage. A circuit responsive to the voltage comparator circuit conditions a charge pump clocking to the result of the voltage comparison. The voltage comparator circuit includes a sampling circuit for sampling the charge pump output voltage at a sampling rate. A sampling rate control circuit is responsive to the voltage comparisons for controlling the sampling rate according to the result of the voltage comparison.

Abstract: A power management unit for a non-volatile memory device is proposed. The power management unit includes means for providing a reference voltage, resistive means for deriving a reference current from the reference voltage, means for generating a plurality of operative voltages from a power supply voltage, and means for regulating the operative voltages; in the power management unit of the invention, for each operative voltage the means for regulating includes means for deriving a scaled reference current from the reference current according to a scaling factor, further resistive means for deriving a rating voltage from the scaled reference current, means for deriving a measuring voltage from the operative voltage and the rating voltage, and means for controlling the operative voltage according to a comparison between the measuring voltage and the reference voltage.

Abstract: Disclosed herein are a transmission line of coaxial type and a manufacturing method thereof, capable of preventing a radiative signal loss of signal lines during transmission of an RF signal and removing signal interference between adjacent signal lines, thus allowing signal lines to be compactly arrayed during a manufacture of IC, and reducing a dimension of the IC. The transmission line of coaxial type includes grooves provided on a semiconductor substrate, a first ground layer, an electrically conductive epoxy coated on a flat part of the first ground layer except the grooves, second ground layers provided on the electrically conductive epoxy, a dielectric film provided at a position above the grooves and the second ground layers, a third ground layer provided on an upper surface of the dielectric film, and signal lines placed in spaces defined by the grooves and a lower surface of the dielectric film.

Abstract: A spread-spectrum clock signal generator includes a circuit loop receiving a reference signal at a reference frequency and adapted to generate an output signal at an output frequency dependent on and locked to the reference frequency, and a modulator circuit generating a modulation signal at a modulation frequency; the modulation signal is injected into the circuit loop to induce a modulation of the frequency of the output signal with respect to the frequency dependent on the reference frequency. The circuit loop is a frequency-locked loop and has a bandwidth sufficiently higher than the modulation frequency, so that the output frequency tracks the modulation signal. Frequency-offset correction circuit is further provided, for evaluating a frequency offset between an average frequency of the output signal and the frequency dependent on the reference frequency, and for generating a frequency-offset correction signal which is injected into the circuit loop for correcting the evaluated frequency offset.

Abstract: A pipeline accelerator includes a bus and a plurality of pipeline units, each unit coupled to the bus and including at least one respective hardwired-pipeline circuit. By including a plurality of pipeline units in the pipeline accelerator, one can increase the accelerator's data-processing performance as compared to a single-pipeline-unit accelerator. Furthermore, by designing the pipeline units so that they communicate via a common bus, one can alter the number of pipeline units, and thus alter the configuration and functionality of the accelerator, by merely coupling or uncoupling pipeline units to or from the bus. This eliminates the need to design or redesign the pipeline-unit interfaces each time one alters one of the pipeline units or alters the number of pipeline units within the accelerator.

Abstract: A voltage-down converter for providing an output voltage lower than a power supply voltage of the converter is proposed. The converter includes voltage regulation means for obtaining an intermediate voltage corresponding to the output voltage from the power supply voltage by controlling a variable-conductivity element with a control signal resulting from a comparison between the intermediate voltage and a reference voltage, and an output stage for obtaining the output voltage from the power supply voltage by controlling a further variable-conductivity element with the control signal, wherein the further variable-conductivity element has a modular structure with at least one set of multiple basic modules, the converter further including means for enabling and/or disabling the modules of each set in succession according to a comparison between the output voltage and the intermediate voltage.

Abstract: A supply identifier takes precise decision on the range of the external supply to manage a proper internal supply to the core of the IC by controlling a regulator or a switch connected to external supply. This supply identifier defers the decision until everything that influences the decision settles after power-up, then makes a decision only once depending on the external supply range and switches itself off, keeping the decision stored, to avoid noise-induced wrong behavior and to reduce power consumption.